Explains interrupts in Atmega328P

1. Interrupts in Atmega328P
(Lecture-13)
R S Ananda Murthy
Associate Professor and Head
Department of Electrical & Electronics Engineering,
Sri Jayachamarajendra College of Engineering,
Mysore 570 006
R S Ananda Murthy Interrupts in Atmega328P

2. Methods of I/O Operation
Synchronous I/O operation.
This is possible when the I/O device operates at the same
speed as that of MCU.
In this case the I/O operation with the device is performed
by the MCU assuming that the device is always ready.
Asynchronous I/O Operation.
In this case, generally the I/O device is very slow when
compared to the MCU. Then, it can perform I/O operation
by the following methods:
By polling.
By using interrupts.
R S Ananda Murthy Interrupts in Atmega328P

3. I/O Operation by Polling
Is
the device
ready
?
Request device to get ready
Service the device
No
Yes
Polling results in waste of MCU time and power and does
not permit masking of devices since all devices have to be
checked.
R S Ananda Murthy Interrupts in Atmega328P

4. Polling Example
R S Ananda Murthy Interrupts in Atmega328P

5. I/O Operation by Interrupts
The MCU keeps on doing some useful operation, or it
remains in a low-power state after enabling interrupts.
When I/O device is ready, it interrupts the MCU.
The MCU completes execution of the current instruction,
saves the return address on the stack, and then jumps to
the Interrupt Service Routine (ISR) to serve the device.
After this, the MCU returns back to the interrupted program
by loading the return address from the stack to the
Program Counter.
Interrupts can be enabled or disabled dynamically and
when multiple interrupts come simultaneously priorities
can be assigned.
R S Ananda Murthy Interrupts in Atmega328P

6. Interrupt Example
R S Ananda Murthy Interrupts in Atmega328P

7. Default Interrupt Vectors in Atmega328P
R S Ananda Murthy Interrupts in Atmega328P

8. Interrupt Vectors in Atmega328P
Interrupt vector is a definite address in the program
memory where a JMP instruction should be written to jump
to the ISR corresponding to the interrupt.
Each interrupt vector occupies two program memory words
in order to provide space for JMP instruction.
In Atmega328P, the RESET Vector is affected by
BOOTRST fuse and the Interrupt Vector start address is
affected by IVSEL bit in the MCUCR.
R S Ananda Murthy Interrupts in Atmega328P

9. Enabling and Disabling Interrupts in Atmega328P
In SREG if I = 1, then all interrupts are enabled.
We can make I = 1 by using SEI instruction in ALP and
sei() function in C program.
In SREG if I = 0, then all interrupts are disabled.
We can make I = 0 by using CLI instruction in ALP and
cli() function in C program.
Upon reset I = 0 so all interrupts are disabled.
R S Ananda Murthy Interrupts in Atmega328P

10. Bits of EICRA Control Nature of INT1 and INT0
Bits 7, 6, 5, and 4 are not used and are always read as 0.
R S Ananda Murthy Interrupts in Atmega328P

11. Bits of EIMSK Mask/Unmask INT1 and INT0
Masking/unmasking means disabling/enabling respectively.
When INT1 = 1 INT1 is unmasked if I = 1 in SREG.
When INT1 = 0 INT1 is masked even if I = 1 in SREG.
When INT0 = 1 INT0 is unmasked if I = 1 in SREG.
When INT0 = 0 INT0 is masked even if I = 1 in SREG.
Activity on the pins of INT1/INT0 will cause an interrupt
request even if the corresponding pins are configured as
output pins.
Bits 2 to 7 are unused and will always be read as 0.
R S Ananda Murthy Interrupts in Atmega328P

12. Bits of EIFR Show Status of INT1 and INT0
Bits 2 to 7 are unused and will always be read as 0.
When INT1 interrupt is triggered, INTF1 becomes 1. This
flag is cleared when ISR is executed.
When INT0 interrupt is triggered, INTF0 becomes 1. This
flag is cleared when ISR is executed.
INTF1/INTF0 flags can be cleared by writing a logical 1 to
the respective bit.
INTF1/INTF0 flags are always cleared when the respective
interrupts are configured as a level interrupt.
R S Ananda Murthy Interrupts in Atmega328P

13. C-Code to use INT0
R S Ananda Murthy Interrupts in Atmega328P

14. Problem Statement to use INT0/INT1
Assume that a push button is connected to the INT0/PD2 pin of
Atmega328P MCU with internal pull-up resistor enabled and
that a 7-segment common cathode display is connected to
PORTB lines of the MCU through 330Ω current limiting
resistors. Let a high-to-low logic change on this pin cause an
INT0 interrupt. Sketch a diagram showing the hardware
connections. Write a program in C which displays on the LED
display any integer in the range 1 to 6, both inclusive, when
ever the push button is pressed, thus simulating throwing of a
die. Sketch a flow chart to show the logic.
Also write ALP to achieve the task mentioned above.
Modify the programs written above to use INT1/PD3.
R S Ananda Murthy Interrupts in Atmega328P

15. License
This work is licensed under a
Creative Commons Attribution 4.0 International License.
R S Ananda Murthy Interrupts in Atmega328P