This talk will serve as the basis for the following talks presenting the rationale and the directions behind the Machine Learning research works we are doing at the NECST Laboratory.
7. DReAMS
System Architectures System Security
MaTA
Malware and Threat Analysis
FraudSec
Frauds Analysis and Detection
MoSec
Mobile Security
CyPhy
Security of Cyber-physical systems
DReAMS
Reconfigurable computing and
FPGA-based systems
ORCA
Unleashed Computing Architectures
and Operating Systems
STeEL
Smart Technology Easy Life
!7
NECST Research
8. !8
Exploiting ML @NECST
Banksealer
M. Carminati
Framework for banking fraud detection
Models user’s behavior through his/her interaction with
the online banking services to detect fraudulent activities
Behaviors Identification in Social Individuals
G. Muscioni
Develop a hierarchical model to extract behavior at multiple
levels of aggregation (individual behavior, dyadic interactions
and group-level activities)
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SeNSE
P. Cancian, L. Cerina, G. Franco
Accelerate Features Extraction and for Electromyography
signals on FPGA (with applications to robotic prostheses)
Exploits Recurrent Neural Networks for Classification
9. !9
Exploiting ML @NECST
Banksealer
M. Carminati
Framework for banking fraud detection
Models user’s behavior through his/her interaction with
the online banking services to detect fraudulent activities
0,02% false positives
98% detection rate of fraud anomalies
10. !10
Exploiting ML @NECST
Behaviors Identification in Social Individuals
G. Muscioni
Develop a hierarchical model to extract behavior at multiple
levels of aggregation (individual behavior, dyadic interactions
and group-level activities)
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RESULT-INDIVIDUAL RESULT-GROUP
11. !11
Exploiting ML @NECST
SeNSE
P. Cancian, L. Cerina, G. Franco
Accelerate Features Extraction and for Electromyography
signals on FPGA (with applications to robotic prostheses)
Exploits Recurrent Neural Networks for Classification
13. !13
Optimizing ML for the Cloud
Pretzel
A. Scolari
Prediction-serving system for scheduling trained ML
models on cloud machines
White box approach
Optimize execution for lower
latency and higher throughput
Sharing operators' common
state, to increase model density
per machine
15. !15
FPGA in Datacenters
CONDOR
N. Raspa, M. Bacis, G. Natale
Acceleration of Convolutional Neural Network
inference on FPGAs
Cloud Integration
via Amazon F1 Instances
Automatic creation of
an hardware accelerator
for FPGA
Support main deep
learning libraries
16. !16
FPGA in Embedded Systems
Deep Learning on PYNQ
L. Stornaiuolo
Framework to help implementing Deep Learning
algorithms on the PYNQ-Z1
Exploits the PYNQ platform
SpiNN
L. Cavinato, E. Migliorini, P. Cancian, M. Arnaboldi
Use Spiking Neural Networks for Reinforcement Learning in
Robotics
Implement efficiently Spiking Neural Networks on FPGAs
17. SESSION AGENDA
Title: Pretzel: optimized Machine Learning framework for low-latency
and high throughput workloads
Speaker: Alberto Scolari, PhD Student @ Politecnico di Milano
Title: CONDOR: An automated framework to accelerate convolutional
neural networks on FPGA
Speakers: Niccolo’ Raspa, MSc Student @ Politecnico di Milano,
Marco Bacis, MSc Student @ Politecnico di Milano
Title: On how to efficiently implement Deep Learning algorithms on
PYNQ platform
Speaker: Luca Stornaiuolo, PhD Student @ Politecnico di Milano
Title: SpiNN, learning through spiking neural networks
Speaker: Lara Cavinato, MSc Student @ Politecnico di Milano
San Jose, CA
May 25, 2018
Giuseppe Natale - giuseppe.natale@polimi.it