The document discusses different types of adders used in digital circuits, including half adders and full adders. It explains that a half adder adds two binary digits and produces a sum and carry output, while a full adder adds three binary digits including an input carry and produces a sum and output carry. Truth tables are provided for half adders and full adders to illustrate their functionality. The document also covers binary subtraction using 1's and 2's complement methods.

1. Submitted By
T. Janani
I-MSc(CS&IT)
Nadar Saraswathi College Of
` Arts &Science, Theni.

3. Adder:
In electronics an adder is digital circuit that perform
addition of numbers. In modern computer adder reside in
the arithmetic logic unit(ALU).
Adders are important not only in the computer but
also in many types of digital systems in which the numeric
data are processed.
Types of adder:
• Full adder
•Half adder

4. The half adder accepts two binary digits on its inputs
and produce two binary digits outputs, a sum bit and a carry
bit.
The half adder is an example of a simple, functional
digital circuit built from two logic gates. The half adder adds
to one-bit binary numbers(AB). The output is the sum o the
two bits(S) and the carry(C).

5. The same two inputs are directed to two different
gates. The inputs to the XOR gate are also the inputs to the
AND gate.
The input “wires” to the XOR gate are tied to the input
wires o the AND gate, thus, When voltage is applied to the A
input of the XOR gate, the A input to the AND gate receives
the same voltage.

6. The full adder accepts two inputs bits and an input
carry and generates a sum output and an output carry.
The Full –adder circuit adds three one-bit binary
numbers (C in, A,B) and outputs two one-bit binary numbers,
a sum (S) and a Carry(C out). The full-adder is usually a
component in a cascade o adders, which add 8,16,32,etc.
Binary numbers.

7. If you look closely, you’ll see the full adder is simply
two half adders joined by an OR.
We can implement a full adder circuit with the help of
two half adder circuits. The first half adder will be used to
add A and B to produce a partial Sum. The second half adder
logic can be used to add CIN to the Sum produced by the first
half adder to get the final S output. I any of the half adder
logic produces a carry, there will be an output carry. Thus,
COUT will be an OR unction of the half-adder carry outputs.

8. Half Adder Truth Table:
S = A B (Exclusive OR)
C = A.B (AND)
A B Sum Carry-Out
0 0 0 0
0 1 1 0
1 0 1 0
1 1 1 1
+

9. Full Adder Truth Table:
S= A B Cin
C= AB + Cin (A B)
A B Carry In Sum Carry Out
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
+ +
+

10. Logics 1 and 0 are generally represented by voltage
levels.
In a Positive logic system, the most positive voltage level
(HIGH) represents the logical 1 state, and the most negative
voltage level (LOW) represents the logical 0 state.
In a Negative logic system, the most positive (HIGH)
voltage level represents logical 0 state and the most negative
(LOW) voltage level represents logical 1 state.

11. For example:
if the voltage levels are -0.1 V and -5 V, then in a
positive logic system the -5V level represents a 0 state and
the -0.1 V level represents a 1 state; in a negative logic
system, -0.1 V level represents a 0 state and -5 V represents
a 1 state.
Conversely, if the voltage levels are 0.1V and 5 V,
then in a positive logic system the 5 V level represents a 1
state and the 0.1 V represents a 0 state; in a negative logic
system, the 0.1 V represents a 1 state and the 5 V level
represents a 0 state.

12. In Subtraction by 1’s complement we subtract two binary
numbers using carried by 1’s complement.
The Steps to be followed in subtraction by 1’s
complement are:
i) To write down 1’s complement of the subtrahend.
ii) To add this with the minuend.
iii) If the result of addition has a carry over then it is
dropped and an 1 is added in the last bit.
iv) If there is no carry over, then 1’s complement of the
result of addition is obtained to get the final result and
it is negative.

13. 101011-111001
1’s complement of 111001 is 000110. Hence
Minued - 1 0 1 0 1 1
1’s Complement - 0 0 0 1 1 0
-----------
1 1 0 0 0 1
-----------
Hence the difference is = -1110

14. With the help o subtraction by 2’s complement method
we can easily subtract two binary numbers.
The operation is carried out by means of the
following steps:
i) At first , 2’s complement of the subtrahend is found.
ii) Then it is added to the minuend.
iii) If the final carry over of the sum is 1, it is dropped
and the result is positive.
iv) If there is no carry over, the two’s complement of
the sum will be the result and it is negative.

15. The following examples on subtraction by 2’s complement
will make the procedure clear:
10110 – 11010
Solution:
2’s complement of 11010 is(00101+1) i.e. 00110. Hence
Minued – 1 0 1 1 0
2’s complement of subtrahend – 0 0 1 1 0
---------
Result of addition - 1 1 1 0 0
As there is no carry over, the result of subtraction is negative
and is obtained by writing the 2’s complement of 11100
i.e.(00011+1) or 00100.
Hence the difference is -100

16. In binary addition using 1’s complement:
A. Addition of a positive and a negative binary number
Case 1: When the positive number has greater magnitude.
In this case addition of numbers is performed after taking 1’s
complement of the negative number and the end-around
carry Of the sum is added to the least significant bit.
The following examples will illustrate this method in binary
addition using 1’s complement:

17. 1) +1101 and -1011 (Assume that the representation is in
a signed 5-bit register)
Solution:
+ 1 1 0 1 = 0 1 1 0 1
- 1 0 1 1 = 1 0 1 0 0 (taking 1’s
complement)
---------
0 0 0 0 1
1 Carry
----------
0 0 0 1 0
Hence the required sum is +0010

18. Case II: When the negative number has greater magnitude.
In this case the addition is carried in the same way as in case 1
but there will be no end-around carry. The sum is obtained by
taking 1’s complement of the magnitude bits of the result and
it will be negative.
Ex: +0011 and -1101
Solution:
+0011 = 0 0 0 1 1
-1101 = 1 0 0 1 0 (1’s complement)
------------
1 0 1 0 1
Hence the required sum is -1010

19. B. When the two numbers are negative
For the addition of two negative numbers 1’s complements
of both the numbers are to be taken and then added. In this case an
end-around carry will always appear. This along with a carry
from the MSB will generate a 1in the sign but. 1’s complement of
the magnitude bits of the result of addition will give the final sum.
-1010 and -0101
-1010 = 1 0 1 0 1 (1’s Complement)
-0101 = 1 1 0 1 0 (1’s Complement)
-----------
0 1 1 1 1
1 Carry
------------
1 0 0 0 0
1’s Complement of the magnitude bits of sum is 1111 and the sign
bit is 1. Hence the required sum is -1111

20. 6. Binary Addition using 2’s Complement
When negative numbers are expressed in binary
addition using 2’s complement the addition of binary
numbers becomes easier. This operation is almost similar to
that in 1’s complement system and is explained with
examples given below:
A. Addition of a positive number and a negative number:
We consider the following cases:
Case1: When the positive number has a greater magnitude
In this case the carry which will be generated is
discarded and the final result is the result of addition
The following examples will illustrate this method in binary
addition using 2’s complement:

21. Ex: +0111 and -0011
Solution:
+ 0111 = 0 0 1 1 1
- 0011 = 1 1 1 0 1
----------
(Carry 1 discarded) 0 0 1 0 0
Hence the sum is +0100
Case II: When the negative number has greater. When the
negative numbers is greater no carry will be generated in the
sign bit. The result of addition will be negative and the final
result is obtained by taking 2’s complement of the magnitude
bits of the result.

22. Ex: +0011 and -0101
Solution:
+0011 = 0 0 0 1 1
-0101 = 1 1 0 1 1 (2’s complement)
------------
1 1 1 1 0
2’s Complement of 1110 is(0001+0001) or 0010.
Hence the required sum is -0010
B. When the two numbers are negative
When two negative numbers are added a carry will
be generated from the sign bit which will be discarded. 2’s
complement of the magnitude its of the operation will be the
final sum.

23. -0011 and -0101
-0011 = 1 1 1 0 1 (2’s Complement)
-0101 = 1 1 0 1 1 (2’s Complement)
-----------
0 1 1 1 1
------------
(Carry 1 discarded) 1 1 0 0 0
2’s Complement of 1000 is(0111+0001) or 1000
Hence the required sum is -1000

24. Subtraction of a smaller decimal number from a larger
one in the 9’s complement system is done by the addition of
the 9’s complement of the subtrahend to the minuend and
then adding the carry to the result.
Subtraction of a larger number from a smaller one
does not produce a carry, and the result is a negative in the
9’s complement from.
This procedure has a distinct advantage in certain
types of arithmetic logic.

25. Example:
Regular Subtraction 9’s complement Subtraction
18 18
-06 +93 9’s complement of 6
----- -----
12 (1) 11
---- +1 Add carry to result
-----
12
-----

26. Binary multiplication is much simpler than decimal
multiplication. The procedure is same as that of decimal
multiplication. The binary multiplication procedure is as
follows.
Step 1: The least significant bit of the multiplier is taken.
If the multiplier bit is 1, the multiplicant is copied as such and, if
the multiplier bit is 0, a 0 is placed in all the bit positions.
Step 2: The next higher significant bit of the multiplier is
taken and the partial product is written with a shift to the let, as
in step 1.
Step 3: Step 2 is repeated for all other higher significant
its and each time a let shift is given.

27. Step 4: When all the bits in the multiplier have been taken into
account, the partial product terms are added, which give the actual
product of the multiplier and the multiplicant. The following
examples illustrate the multiplication procedure:
Ex: 1011 and 1101
1 0 1 1
x 1 1 0 1
-------------------
1 0 1 1
0 0 0 0
1 0 1 1
1 0 1 1
--------------------
1 0 0 0 1 1 1 1
--------------------