SlideShare a Scribd company logo

PLL (Tsmc 0.18 process)

•Download as PPT, PDF•
•
C
chenzhai

Class presentation

1 of 17
EE486 Digital VLSI- Final Project Clock Multiplying DPLL Chen Zhai Klipsch School of Electrical and Computer Engineering New Mexico State University [email_address]
Presentation Outline ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Block Diagram
Specification ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Loop Filter Spec: Input Frequency Natural Frequency (~Bandwidth) Damping Factor Results: Design Values: R, C1, C2, Ipump Performance: Lock time, etc
Linearized Current-Starved VCO with Output Buffers
Linearized Current-Starved VCO Tuning Curve Vin_max=1.8V Vin_min=Vtn=0.5V Fmax=1.068GHz Fmin=83.26MHz Kvco=758MHz/V
Divide by 5 Circuit Sequence: 000 001 0 1 0 0 1 1 100 Synchronous Reset
High-speed Phase Frequency Detector
Charge-pump
DPLL Schematic
DPLL Test-bench
Simulation Result
Simulation Result
Simulation Result
Simulation Result-Locked
Measurement Result Key Parameters of DPLL: Natural Frequency (Bandwidth) Matching (delay, current of charge-pump) Speed (Divide-by-5) Output Frequency 750.00MHz Jitter 10.2ps Lock time ~0.5 us

Recommended

Tutorials proteus schematic
Tutorials proteus schematicTutorials proteus schematic
Tutorials proteus schematicLITS IT Ltd,LASRC.SPACE,SAWDAGOR BD,FREELANCE BD,iREV,BD LAW ACADEMY,SMART AVI,HEA,HFSAC LTD.
 
Fabrication of Floating Gate MOS (FLOTOX)
Fabrication of Floating Gate MOS (FLOTOX)Fabrication of Floating Gate MOS (FLOTOX)
Fabrication of Floating Gate MOS (FLOTOX)Sudhanshu Janwadkar
 
Introduction to pll
Introduction to pllIntroduction to pll
Introduction to pllsartaj ahmed
 
Speed Torque Characteristics of BLDC Motor with Load Variations
Speed Torque Characteristics of BLDC Motor with Load VariationsSpeed Torque Characteristics of BLDC Motor with Load Variations
Speed Torque Characteristics of BLDC Motor with Load Variationsijtsrd
 
Analog vlsi
Analog vlsiAnalog vlsi
Analog vlsiKhuong Lamborghini
 
Eeg381 electronics iii chapter 2 - feedback amplifiers
Eeg381 electronics iii chapter 2 - feedback amplifiersEeg381 electronics iii chapter 2 - feedback amplifiers
Eeg381 electronics iii chapter 2 - feedback amplifiersFiaz Khan
 
Low voltage low power vlsi subsystems by kiat seng yeo kaushik roy
Low voltage low power vlsi subsystems by kiat seng yeo kaushik royLow voltage low power vlsi subsystems by kiat seng yeo kaushik roy
Low voltage low power vlsi subsystems by kiat seng yeo kaushik roysartaj ahmed
 
Triac and diac
Triac and diacTriac and diac
Triac and diactaranjeet10
 

Recommended

Tutorials proteus schematic
Tutorials proteus schematicTutorials proteus schematic
Tutorials proteus schematicLITS IT Ltd,LASRC.SPACE,SAWDAGOR BD,FREELANCE BD,iREV,BD LAW ACADEMY,SMART AVI,HEA,HFSAC LTD.
 
Fabrication of Floating Gate MOS (FLOTOX)
Fabrication of Floating Gate MOS (FLOTOX)Fabrication of Floating Gate MOS (FLOTOX)
Fabrication of Floating Gate MOS (FLOTOX)Sudhanshu Janwadkar
 
Introduction to pll
Introduction to pllIntroduction to pll
Introduction to pllsartaj ahmed
 
Speed Torque Characteristics of BLDC Motor with Load Variations
Speed Torque Characteristics of BLDC Motor with Load VariationsSpeed Torque Characteristics of BLDC Motor with Load Variations
Speed Torque Characteristics of BLDC Motor with Load Variationsijtsrd
 
Analog vlsi
Analog vlsiAnalog vlsi
Analog vlsiKhuong Lamborghini
 
Eeg381 electronics iii chapter 2 - feedback amplifiers
Eeg381 electronics iii chapter 2 - feedback amplifiersEeg381 electronics iii chapter 2 - feedback amplifiers
Eeg381 electronics iii chapter 2 - feedback amplifiersFiaz Khan
 
Low voltage low power vlsi subsystems by kiat seng yeo kaushik roy
Low voltage low power vlsi subsystems by kiat seng yeo kaushik royLow voltage low power vlsi subsystems by kiat seng yeo kaushik roy
Low voltage low power vlsi subsystems by kiat seng yeo kaushik roysartaj ahmed
 
Triac and diac
Triac and diacTriac and diac
Triac and diactaranjeet10
 
PLL Note
PLL NotePLL Note
PLL NotePei-Che Chang
 
A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design chiportal
 
MOSFET Discription Presentation
MOSFET Discription PresentationMOSFET Discription Presentation
MOSFET Discription PresentationPrashant Soni
 
Short channel effect on FET
Short channel effect on FETShort channel effect on FET
Short channel effect on FETMahsa Farqarazi
 
MOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active ResistorMOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active ResistorSudhanshu Janwadkar
 
IGBT
IGBTIGBT
IGBTjohny renoald
 
BLDC motor control reference design press presentation
BLDC motor control reference design press presentationBLDC motor control reference design press presentation
BLDC motor control reference design press presentationSilicon Labs
 
Ujt
UjtUjt
UjtRakesh kumar jha
 
Phase locked loop
Phase locked loopPhase locked loop
Phase locked loopAniruddha Chandra
 
Short channel effects
Short channel effectsShort channel effects
Short channel effectsEsmaeil Javadi
 
Amplificador de 200w
Amplificador de 200wAmplificador de 200w
Amplificador de 200wVideorockola Digital
 
Very Large Scale Integration -VLSI
Very Large Scale Integration -VLSIVery Large Scale Integration -VLSI
Very Large Scale Integration -VLSIPRABHAHARAN429
 
Triac and Diac
Triac and DiacTriac and Diac
Triac and DiacRahul Sahu
 
EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.CKSunith1
 
Rotor earth fault protection of electric generator
Rotor earth fault protection of electric generatorRotor earth fault protection of electric generator
Rotor earth fault protection of electric generatormytechinfo
 
PLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLABPLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLABkartik pal
 
Logic Gate
Logic GateLogic Gate
Logic GateCông Mai Văn
 
Design of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition timeDesign of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition timeeSAT Journals
 
TRIAC Y UJT
TRIAC Y UJTTRIAC Y UJT
TRIAC Y UJTcristina_jimez
 
Predefined speed control of bldc motor
Predefined speed control of bldc motorPredefined speed control of bldc motor
Predefined speed control of bldc motorEdgefxkits & Solutions
 
Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2Fuyun Ling
 
Boiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problemBoiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problemVudugundla Kodandapani
 

More Related Content

What's hot

A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design chiportal
 
MOSFET Discription Presentation
MOSFET Discription PresentationMOSFET Discription Presentation
MOSFET Discription PresentationPrashant Soni
 
Short channel effect on FET
Short channel effect on FETShort channel effect on FET
Short channel effect on FETMahsa Farqarazi
 
MOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active ResistorMOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active ResistorSudhanshu Janwadkar
 
BLDC motor control reference design press presentation
BLDC motor control reference design press presentationBLDC motor control reference design press presentation
BLDC motor control reference design press presentationSilicon Labs
 
Very Large Scale Integration -VLSI
Very Large Scale Integration -VLSIVery Large Scale Integration -VLSI
Very Large Scale Integration -VLSIPRABHAHARAN429
 
Triac and Diac
Triac and DiacTriac and Diac
Triac and DiacRahul Sahu
 
EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.CKSunith1
 
Rotor earth fault protection of electric generator
Rotor earth fault protection of electric generatorRotor earth fault protection of electric generator
Rotor earth fault protection of electric generatormytechinfo
 
PLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLABPLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLABkartik pal
 
Design of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition timeDesign of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition timeeSAT Journals
 
Predefined speed control of bldc motor
Predefined speed control of bldc motorPredefined speed control of bldc motor
Predefined speed control of bldc motorEdgefxkits & Solutions
 

What's hot (20)

PLL Note
PLL NotePLL Note
PLL Note
 
A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design A comprehensive formal verification solution for ARM based SOC design
A comprehensive formal verification solution for ARM based SOC design
 
MOSFET Discription Presentation
MOSFET Discription PresentationMOSFET Discription Presentation
MOSFET Discription Presentation
 
Short channel effect on FET
Short channel effect on FETShort channel effect on FET
Short channel effect on FET
 
MOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active ResistorMOS as Diode, Switch and Active Resistor
MOS as Diode, Switch and Active Resistor
 
IGBT
IGBTIGBT
IGBT
 
BLDC motor control reference design press presentation
BLDC motor control reference design press presentationBLDC motor control reference design press presentation
BLDC motor control reference design press presentation
 
Ujt
UjtUjt
Ujt
 
Phase locked loop
Phase locked loopPhase locked loop
Phase locked loop
 
Short channel effects
Short channel effectsShort channel effects
Short channel effects
 
Amplificador de 200w
Amplificador de 200wAmplificador de 200w
Amplificador de 200w
 
Very Large Scale Integration -VLSI
Very Large Scale Integration -VLSIVery Large Scale Integration -VLSI
Very Large Scale Integration -VLSI
 
Triac and Diac
Triac and DiacTriac and Diac
Triac and Diac
 
EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.EST 130, Transistor Biasing and Amplification.
EST 130, Transistor Biasing and Amplification.
 
Rotor earth fault protection of electric generator
Rotor earth fault protection of electric generatorRotor earth fault protection of electric generator
Rotor earth fault protection of electric generator
 
PLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLABPLL & DLL DESIGN IN SIMULINK MATLAB
PLL & DLL DESIGN IN SIMULINK MATLAB
 
Logic Gate
Logic GateLogic Gate
Logic Gate
 
Design of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition timeDesign of all digital phase locked loop (d pll) with fast acquisition time
Design of all digital phase locked loop (d pll) with fast acquisition time
 
TRIAC Y UJT
TRIAC Y UJTTRIAC Y UJT
TRIAC Y UJT
 
Predefined speed control of bldc motor
Predefined speed control of bldc motorPredefined speed control of bldc motor
Predefined speed control of bldc motor
 

Viewers also liked

Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2Fuyun Ling
 
Boiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problemBoiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problemVudugundla Kodandapani
 
Managing Downhole Failures in a Rod Pumped Well
Managing Downhole Failures in a Rod Pumped Well Managing Downhole Failures in a Rod Pumped Well
Managing Downhole Failures in a Rod Pumped Well Ramez Abdalla, M.Sc
 
Preliminary HR Proposal
Preliminary HR ProposalPreliminary HR Proposal
Preliminary HR Proposalonecell
 
Divide by N clock
Divide by N clockDivide by N clock
Divide by N clockMantra VLSI
 
Problem Solving and Decision Making
Problem Solving and Decision MakingProblem Solving and Decision Making
Problem Solving and Decision MakingIbrahim M. Morsy
 
How to Become a Thought Leader in Your Niche
How to Become a Thought Leader in Your NicheHow to Become a Thought Leader in Your Niche
How to Become a Thought Leader in Your NicheLeslie Samuel
 

Viewers also liked (9)

Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2Pll carrier synch f-ling_v1.2
Pll carrier synch f-ling_v1.2
 
Boiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problemBoiler feed pump recirculation valve problem
Boiler feed pump recirculation valve problem
 
Managing Downhole Failures in a Rod Pumped Well
Managing Downhole Failures in a Rod Pumped Well Managing Downhole Failures in a Rod Pumped Well
Managing Downhole Failures in a Rod Pumped Well
 
Problem Solving
Problem SolvingProblem Solving
Problem Solving
 
Preliminary HR Proposal
Preliminary HR ProposalPreliminary HR Proposal
Preliminary HR Proposal
 
Divide by N clock
Divide by N clockDivide by N clock
Divide by N clock
 
Problem Solving and Decision Making
Problem Solving and Decision MakingProblem Solving and Decision Making
Problem Solving and Decision Making
 
PUMPS
PUMPS PUMPS
PUMPS
 
How to Become a Thought Leader in Your Niche
How to Become a Thought Leader in Your NicheHow to Become a Thought Leader in Your Niche
How to Become a Thought Leader in Your Niche
 

Similar to PLL (Tsmc 0.18 process)

ECE 17 Final Presentation Portable Ultrasound Driver
ECE 17 Final Presentation Portable Ultrasound DriverECE 17 Final Presentation Portable Ultrasound Driver
ECE 17 Final Presentation Portable Ultrasound Driverrivasd1214
 
Flyback Converter using PWM IC(LTspice Version)
Flyback Converter using PWM IC(LTspice Version)Flyback Converter using PWM IC(LTspice Version)
Flyback Converter using PWM IC(LTspice Version)Tsuyoshi Horigome
 
電流臨界モード方式PFC制御回路の解説書
電流臨界モード方式PFC制御回路の解説書電流臨界モード方式PFC制御回路の解説書
電流臨界モード方式PFC制御回路の解説書spicepark
 
Resume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalResume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalArizona State University
 
Resume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalResume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalArizona State University
 
Critical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitCritical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitTsuyoshi Horigome
 
Critical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitCritical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitTsuyoshi Horigome
 
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 New
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 NewOriginal Mosfet MC33151DR2G 33151 MC33151 SOP-8 New
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 NewAUTHELECTRONIC
 
Challenges of Parallel Simulation of Power Systems_english
Challenges of Parallel Simulation of Power Systems_englishChallenges of Parallel Simulation of Power Systems_english
Challenges of Parallel Simulation of Power Systems_englishOPAL-RT TECHNOLOGIES
 
Design of CMOS operational Amplifiers using CADENCE
Design of CMOS operational Amplifiers using CADENCEDesign of CMOS operational Amplifiers using CADENCE
Design of CMOS operational Amplifiers using CADENCEnandivashishth
 
ACPL-K49T - Datasheet - Broadcom Corporation
ACPL-K49T - Datasheet - Broadcom CorporationACPL-K49T - Datasheet - Broadcom Corporation
ACPL-K49T - Datasheet - Broadcom CorporationMarioFarias18
 
Project_Kaveh & Mohammad
Project_Kaveh & MohammadProject_Kaveh & Mohammad
Project_Kaveh & MohammadKaveh Dehno
 
Clock Generator/Jitter Cleaner with Integrated VCOs
Clock Generator/Jitter Cleaner with Integrated VCOsClock Generator/Jitter Cleaner with Integrated VCOs
Clock Generator/Jitter Cleaner with Integrated VCOsPremier Farnell
 
ZXLD1350 - High Power LED Driver
ZXLD1350 - High Power LED DriverZXLD1350 - High Power LED Driver
ZXLD1350 - High Power LED DriverPremier Farnell
 
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARKSPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARKTsuyoshi Horigome
 
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARKSPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARKTsuyoshi Horigome
 
SESD_Lect8_OpAmp_limitations.pdf
SESD_Lect8_OpAmp_limitations.pdfSESD_Lect8_OpAmp_limitations.pdf
SESD_Lect8_OpAmp_limitations.pdfCarlosGamio5
 

Similar to PLL (Tsmc 0.18 process) (20)

ECE 17 Final Presentation Portable Ultrasound Driver
ECE 17 Final Presentation Portable Ultrasound DriverECE 17 Final Presentation Portable Ultrasound Driver
ECE 17 Final Presentation Portable Ultrasound Driver
 
Flyback Converter using PWM IC(LTspice Version)
Flyback Converter using PWM IC(LTspice Version)Flyback Converter using PWM IC(LTspice Version)
Flyback Converter using PWM IC(LTspice Version)
 
電流臨界モード方式PFC制御回路の解説書
電流臨界モード方式PFC制御回路の解説書電流臨界モード方式PFC制御回路の解説書
電流臨界モード方式PFC制御回路の解説書
 
Resume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalResume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed Signal
 
Resume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed SignalResume_Karthik_Koneru_Analog_and_Mixed Signal
Resume_Karthik_Koneru_Analog_and_Mixed Signal
 
Critical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitCritical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC Circuit
 
Critical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC CircuitCritical Conduction Mode (CRM) PFC Circuit
Critical Conduction Mode (CRM) PFC Circuit
 
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 New
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 NewOriginal Mosfet MC33151DR2G 33151 MC33151 SOP-8 New
Original Mosfet MC33151DR2G 33151 MC33151 SOP-8 New
 
Challenges of Parallel Simulation of Power Systems_english
Challenges of Parallel Simulation of Power Systems_englishChallenges of Parallel Simulation of Power Systems_english
Challenges of Parallel Simulation of Power Systems_english
 
IO Circuit_1.pptx
IO Circuit_1.pptxIO Circuit_1.pptx
IO Circuit_1.pptx
 
Design of CMOS operational Amplifiers using CADENCE
Design of CMOS operational Amplifiers using CADENCEDesign of CMOS operational Amplifiers using CADENCE
Design of CMOS operational Amplifiers using CADENCE
 
ACPL-K49T - Datasheet - Broadcom Corporation
ACPL-K49T - Datasheet - Broadcom CorporationACPL-K49T - Datasheet - Broadcom Corporation
ACPL-K49T - Datasheet - Broadcom Corporation
 
Project_Kaveh & Mohammad
Project_Kaveh & MohammadProject_Kaveh & Mohammad
Project_Kaveh & Mohammad
 
Clock Generator/Jitter Cleaner with Integrated VCOs
Clock Generator/Jitter Cleaner with Integrated VCOsClock Generator/Jitter Cleaner with Integrated VCOs
Clock Generator/Jitter Cleaner with Integrated VCOs
 
Ahmed.ppt
Ahmed.pptAhmed.ppt
Ahmed.ppt
 
ZXLD1350 - High Power LED Driver
ZXLD1350 - High Power LED DriverZXLD1350 - High Power LED Driver
ZXLD1350 - High Power LED Driver
 
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARKSPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Professional+BDP Model) in SPICE PARK
 
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARKSPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCP8R01 (Standard+BDS Model) in SPICE PARK
 
SESD_Lect8_OpAmp_limitations.pdf
SESD_Lect8_OpAmp_limitations.pdfSESD_Lect8_OpAmp_limitations.pdf
SESD_Lect8_OpAmp_limitations.pdf
 
nfc
nfcnfc
nfc
 

PLL (Tsmc 0.18 process)