1. SPI (Serial Peripheral Interface)
INTRODUCTION!
Serial communication is the best and efficient way of transmitting one byte of data between devices
wired or wirelessly. Many newbies may have this doubt about why learning so much about serial
communication if we can simply transfer one bit analog data from one device to the other by
connecting wires simply? You can do that but what if your other device is far away, here you would
require wireless communication. Now only serial data can be transmitted wirelessly, moreover you
can send 8-bits of analog data serially. Thus it’s more efficient & time saving.
Serial Peripheral Interface (SPI) is a type of serial communication between microcontrollers.
Serial communication is also possible via USART Module for communication b/w a microcontroller
and PC. Another alternative of SPI is TWI (I2C) but SPI is faster, reliable and less power consuming.
SPI also has an advantage when there are multiple masters and multiple slaves all interconnected,
SPI communication is the only way to communicate selectively between particular masters and
particular slaves.
What is SPI?
The Serial Peripheral Interface (SPI) is a high-speed synchronous data transfer between a
microcontroller and peripheral devices or between several AVR devices. The ATmega16 SPI
includes Full-duplex (incoming & outgoing data exchange both at the same time), Three-wire
Synchronous Data Transfer through MOSI, MISO & SCK pins. It has Seven Programmable Bit Rates
for data transfer. It is used for Master to Slave Data transfer through these three pins.
How does SPI work?
Through SPI Data is always shifted from Master to Slave on the Master Out – Slave In, MOSI, line,
and from Slave to Master on the Master In – Slave Out, MISO, line.
The SPI is synchronous data transfer protocol, so clock pulse is needed to synchronize both master
and slave device. The clock pulse is generated from master side. The SCK pin of master provides
clock pulse to slave device.
The SS pin is also included in SPI system. To make any device as master, the SS pin must be set as
high. If it is configured as an output pin, then it made high using the software. If the SS is considered
as input pin, it should make high externally. In slave mode SS is always an input pin, which should be
connected to ground (to make it slave device).
The system consists of two Shift Registers, and a Master clock generator. The SPI Master initiates
the communication cycle when pulling low the Slave Select SS pin of the desired Slave. Master and
Slave prepare the data to be sent in their respective Shift Registers, and the Master generates the
required clock pulses on the SCK line to interchange data. After each data packet being transferred,
the Master will synchronize the Slave by pulling high the Slave Select, SS, line.
Following table explains the functionality of the pins involved in SPI interface:
MOSI (Master Output Slave
Input)
An output data transfer pin for a Master device while is an input
pin for a Slave device
MISO (Master Input Slave
Output)
An output data transfer pin for a Slave device while is an input pin
for a Master device
SCK (Slave Clock) On this pin Master generates the required clock pulses to
interchange data
SS’ (Slave Select) When set as input, the SS’ pin should be given as HIGH (Vcc) on
as Master device, and a LOW (Grounded) on a Slave device
2. Registers of SPI System:
The SPI system consists of three registers which are described below:
SPI Control Register – SPCR
Bit: 7 6 5 4 3 2 1 0
SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0
o SPIE (SPI Interrupt Enable): This bit if set causes the SPI interrupt to be executed if SPIF bit
in the SPSR Register is set and if the global interrupt enable bit in SREG is set.
o SPE (SPI Enable): When the SPE bit is written to one, the SPI system is enabled. This bit
must be set to enable any SPI operations.
o DORD (Data Order): For DORD=1, LSB will be transmitted first.
For DORD=0, MSB will be transmitted first.
{Hardly matters, whether you transmit MSB/LSB first because finally you would get the same result.}
o MSTR (Master/Slave Select): For MSTR=1, to select device as master.
For MSTR=0, to select device as slave.
o The CPHA and CPOL control bits collectively determine SCK phase and polarity with respect
to serial data.
o SPR [1:0] (SPI clock Rate): This SPR [1:0] and SPI2X bit of SPSR register decides frequency
of SCK. The combinations of these three bits to select SCK frequency are shown in following
table:
Relationship between SCK and the Oscillator Frequency
SPI2X SPR1 SPR0 SCK Frequency
0 0 0 fosc/4
0 0 1 fosc/16
0 1 0 fosc/64
0 1 1 fosc/128
1 0 0 fosc/2
1 0 1 fosc/8
1 1 0 fosc/32
1 1 1 fosc/64
When the SPI is configured as Slave, the SPI is only guaranteed to work at fosc/4 or lower.
SPI Status Register – SPSR
Bit: 7 6 5 4 3 2 1 0
SPIF WCOL - - - - - SPI2X
o SPIF (SPI Interrupt Flag): This bit becomes set automatically after completion of serial data
transfer. The SPIF bit is cleared by first reading the SPI Status Register with SPIF set, then
accessing the SPI Data Register (SPDR).
o WCOL (Write Collision Flag): This bit is set if SPDR is written during data transfer.
o SPI2X (Double SPI Bit): By setting 1 to this bit SCK frequency becomes double.
SPI Data Register – SPDR:
Bit: 7 6 5 4 3 2 1 0
MSB LSB
The SPI Data Register is an 8-bit read/write buffer register used for data transfer between the
Register File and the SPI Shift Register. Writing to the register initiates data transmission.
Reading the register causes the Shift Register Receive buffer to be read.
Master transfers one bit from its SPDR to slave device in every clock cycle. It means to send
one byte data (8-bits), 8 clock pulses are needed. Here is a pictorial representation of how
a single bit is transmitted in MOSI & MISO lines.
3. SPI Master-Slave Interconnection for Data Transfer
For DORD = 0
The Slave Select (SS’) Pin
SS’ (means SS complemented) works in active low configuration, which means to use its
functionality it must be set as an input pin.
When set as input, the SS’ pin should be given a HIGH (Vcc) signal on a Master device, and a
LOW (Grounded) on a Slave device.
When as an output pin on the Master microcontroller, the SS’ pin can be used as a GPIO
(General Input-Output) pin.
The importance of this pin comes into picture when we are communicating between multiple
(master/slave) devices on SPI through the same bus; this SS’ pin is used to select the slave or the
master b/w which we want communication to take place.
Let us consider the following two cases to understand this well:
1. When there are multiple slaves and a single master.
In this case, the SS’ pins of all the slaves are connected to the master microcontroller. Since
we want only a specific slave to receive the data, a low signal must be given to the SS’ pin of
that specific slave microcontroller, and hence only that slave device would receive data in the
stage.
2. When there are multiple masters and a single slave.
In this case, the SS’ pins of all the masters are connected to a slave microcontroller. Since we
want only a specific master to transmit the data, a high signal must be given to the SS’ pin of
that specific master microcontroller, and hence only that master device would transmit data to
the slave device.
Now the above cases can be handled with two SPI slave configurations, namely The Daisy
chained multi slave system and The Parallel multi slave system. To understand this watch –
https://www.youtube.com/watch?v=oWLriIreYRU
What are the Applications of SPI?
SPI interface is chiefly used for In-system programming (ISP) of the AVR microcontrollers.
On the other hand, this “3-wire interface” protocol is also widely being used to communicate with a
wide variety of peripherals like sensors, memory devices, real time clocks, communication protocols
like Ethernet. SPI can be used when we are using multiple slave or master systems, as addressing is
much simpler in SPI. The full-duplex capability makes SPI very simple and efficient for single
master/single slave applications. For Multiple Slave devices or Multiple Master devices appropriate
switching of SS’ pin is required to communicate b/w a particular Slave or a particular Master device.
Some devices use the full-duplex mode to implement an efficient, swift data stream for applications
such as digital audio, digital signal processing, or telecommunications channels. It also consumes
less power as compared to I2C. In today’s technologies this interface is being increasingly used for
artificial intelligence in Swarm Robotics! This Master to Slave operation between robots is also used
for making mutual decisions. Many Autonomous Robotics competitions like Robo-soccer require
similar Master-Slave operation.
4. SPI in USE:-
Objective: To interface between two ATmega16 microcontrollers using SPI protocol. Consider one
AVR device as master and the other as slave. The master would control the led switching operation
on the slave device via its push buttons.
Circuit Diagram:
AVR code for Master:
#include <ioavr.h>
#include <intrinsics.h>
#define SCK PB7
#define MOSI PB5
#define SW1 PINC5 //All Switches are connected to PORTC
#define SW2 PINC4
#define SW3 PINC3
#define CHECKBIT(ADDRESS, BIT) (ADDRESS & (1 << BIT))
void SPI_MasterInit(void)
{
/* Set MOSI and SCK output, all others input */
DDRB |= (1<<MOSI)|(1<<SCK);
/* Enable SPI, Master, set clock rate fck/16 */
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
}