Universal Four Leg v4

A.T.L Dijksman, Universal Four Leg V4
1
Universal Four Leg V4
Abstract- This paper presents a major revision of the Universal Four Leg ‘DC Grid
Laboratory Experimental Setup’. This revision includes the reduction of current loops, the
increase of efficiency in the power stage, the expansion of measurement possibilities and the
re-specification of the input/output range.
To deal with an ever present complication in the world of measurements, simple fuse
holders are converted into dedicated probe measurement connectors. These connectors
reduce large ground loops to a minimum.
Key features include a clear board layout and silkscreen, a tremendous reduction of
semiconductor losses resulting in a heatsink-less power stage and easy, reliable probe and
power connections. Provisions are made for a Single Board Computer (SBC) to read and
control the Universal Four Leg V4. The SBC can also be used to communicate with external
devices to allow for remote control of the Universal Four Leg and the presentation of
measurements performed.
The Universal Four Leg is a power management device with a wide range of applications
in both higher educational laboratory courses, as well as a dedicated grid manager in low
voltage DC-grids.
Index terms- Power Electronics, Inverter, Half-Bridge, High Speed, High Side, Current
Measurement, DC/DC, DC/AC/ AC/DC Conversion, Stand-Alone, DC Grid.
1 Introduction
This paper presents the result of the
redesign, expansion and improvement of the
DC Grid Laboratory Experimental Setup [1],
also known as the ‘Universal Four Leg’.
The Universal Four Leg is designed for
use in two areas of application. The first field
of application is the use in educational
laboratory setups, while the second field of
application is DC-grid management.
Although AC has dominated supply grids
for over a century, recent developments in
technology have created an ever increasing
demand for DC supply grids.
DC grids remove AC/DC conversion
losses in nearly every electronic device. This
loss reduction is a cost free efficiency increase
available to nearly all devices [1][2][3].
Furthermore, the reduction in power
consumption lowers transportation losses.
This results in the use of thinner copper wires
in transport cables, reducing the weight and
cost of these cables.
The use of DC-grids enables power
management to loads based on droop control.
This creates a self-regulating system which
A.T.L. Dijksman
Simulation Research
www.caspoc.com
The Netherlands
axel.dijksman@hotmail.com

2
remains operational independent of section
failure.
The PCB contains four half-bridges that
can be configured as 4 DC-DC converters,
two Full-Bridge inverters or a three phase
inverter with an additional DC-DC
converter[2], see Figure 1-1 for a simplified
schematic view of a single half bridge.
Figure 1-2 shows a functional block
diagram of the complete setup. This diagram
provides a clear overview of all the sub-
sections of a single leg. The circuitry of each
leg is identical.
2 Applications
The Universal Four Leg is designed to
support practical laboratory assignments [2]
as well as a low voltage DC-grid manager.
The grid-manager can, for example, be used
as standalone power distribution system in
third-world countries (connecting a solar
panel, a battery, a light source and mobile
phone(s) to the device).
Designed with lab courses in mind (for
both electrical engineering as well as the
mechatronics department) it provides a clear,
safe and easy-to-use lab setup without any
compromises on the maximum handled power
or the systems versatility.
Furthermore the Universal Four Leg can
be used in test and prototype setups for real
life applications. Applications of the
Figure 1-2: Universal Four Leg Block Diagram
Figure 1-1: Simplified schematic overview of a
single half-bridge.

3
Universal Four Leg include, but are not
limited to:
• Bi-directional (standalone) grid-
managers[8];
• Off-grid grid management for Photo
Voltaic, Dynamo and other alternative
energy sources [1];
• DC/DC, DC/AC, AC/DC power
conversion [1][2][6][7];
• Electric motor drive [3];
• Wireless energy transfer [1][2].
2.1 Grid-manager
As a grid manager, the Universal Four
Leg is similar to the one designed by the
Frauenhofer Institut. Major differences are the
60VDC bus voltage instead of ±380VDC, 4
channels instead of 8 and a lower maximum
power rating. Figure 2-1 shows a simple
block diagram of the Frauenhofer Grid-
Manager.
Possible features of a DC-grid manager
include [9]:
• Arbitrarily configurable DC channels (as
voltage/current controlled source or sink)
• High control dynamics for fast fault-
control and lowest fault energy
• Separate channels for single load or grid
sections allow:
o fast fault isolation
o individual current limiting character-
ristics (short circuit behaviour)
o complex control functions (MPP
tracking, charge/discharge control of
batteries, …)
o arc extinction
• Voltage regulation in the DC-Grid is
performed by an advanced voltage droop
control [8]
In practice, a DC-grid manager combines
the entire power electronics to generate, store
and use renewable energy from independent
PV-strings or fuel cells with a very high
efficiency. Each channel can interface to a
different device (e.g. PV string, battery
system or fuel cell). For applications requiring
higher power, the channels can be connected
in parallel [8].
2.2 Droop control [10]
AC grids are controlled and stabilized
centrally by large-scale power plants and
compensatory devices. Two parameters,
voltage and frequency, define the AC grid.
DC grids require their own stabilisation
method. The method to stabilize a DC grid is
comparable to the regulation of an AC grid
with the difference that there is only one
controlled parameter in a DC grid, the voltage.
The regulation of grid voltage is done by
droop control. Droop control provides a
solution to equally distribute load currents
between remote power sources [11]. This
regulation is constant-power controlled.
The real-time value of the bus voltage is
measured and used as an indicator for the
available energy in the grid.
Depending on this value, the output
current of each leg is controlled according to
an individual, pre-determined, control curve.
This control allows each leg to function as a
current source as well as a current sink,
enabling bi-directional power transfer.
Figure 2-1: Frauenhofer DC-Grid-
Manager Block Diagram [9]

4
Droop control means the output currents
are reduced linearly as the bus voltage
increases, while they increase when the bus
voltage decreases as shown in Figure 2-2. If
the bus voltage rises above or falls below pre-
set under-/overvoltage values, the grid
manager shuts down all power outputs.
Because all information about the state of
the grid is contained in the real-time value of
the bus voltage, no communication to any
other device in the same grid is necessary to
ensure voltage stability. This alleviates the
usual complication of protocols, standards and
interfaces essential to device-to-device
communication.
Output regulation curves of different
types of loads are pre-programmed in the
device implementing the droop control.
Examples of the control curves are shown in
Figure 2-3 and Figure 2-4.
-Note that if the voltage of the PV device
increases beyond a certain value, the device is
shut down to prevent overloading the DC-
grid.
-Note that a battery will supply the DC-
grid when sufficiently charged but is charged
otherwise, dependant on the State of Charge
(SoC) of the battery.
• battery charges if Vdc>Vnom
• battery discharges if Vdc<Vnom
SoC of the battery determines charge and
discharge rates.
Due to the absence of communication or
predefined connections, droop control allows
a completely modular connectivity to the grid
as well as stand-alone use.
Unfortunately, droop control is not
entirely without complications. Since it is
based on the measurement of the real-time bus
voltage, line impedances (which can cause a
significant voltage drop) represent a challenge
and can lead to bus voltage-to-set voltage
mismatch. Grid connection cables should
therefore be selected based on the maximum
voltage drop allowed.
The Universal Four Leg has been tested
and used in lab courses for about two years.
During the tests and its use, the need arose for
a revision of the original setup.
The revision of the Universal Four Leg is
described in the following chapters.
3 Revision requirements
While using the Universal Four Leg,
some points of improvement as well as a
number of faults were uncovered.
The general revision contains the re-
calculation/-selection of used components, the
redesign of a number of sub-circuits, the
Figure 2-2: Basic droop control
Figure 2-3: PV based droop control.
Figure 2-4: Battery SoC based droop control

5
addition of a number of sub-circuits and a
complete redesign of the PCB.
The aim of the first stage of the revision
is an easy-to-assemble prototype and mostly
contains Through Hole (TH) components.
During the second stage of the revision,
design flaws of the first stage are corrected, a
definitive selection of the used sub-circuits is
made and the PCB is designed with mostly
SMT components. Using SMT components
drastically reduces the PCB size and thus
costs and assembly time as well as the amount
of benchtop surface required during use.
Redesign focus is placed on the power
supply sub-circuits, the input signal level shift
sub-circuit, the current measurement sub-
circuit and the overcurrent detection sub-
circuit [4]. The component recalculation and
reselection focus is placed of the half-bridge
and gate driver sub-circuit.
The sub-circuits added to the revised
Universal Four Leg are an output current
measurement circuit and an output voltage
buffer. Also, a footprint for an Arduino Nano
is added to complete the Universal Four Leg
design.
The following set of requirements is an
overview of the overall requirements of the
revision of the Universal Four Leg.
• Bus voltage: 18-60VDC
• Maximum output current per leg: 10Arms
• Small signal input capability (>2.5V)
• Up to 200kHz switching frequency
• On PCB Arduino Nano control
• Digital control/read-out of each leg
• Output current measurement
• Analogue overcurrent protection
• Increase of efficiency and reduction of
heat development under heavy loads
• EMI reduction
• Clear and concise component lay-out
(including sub-circuit markings and
labels on the PCB, matching the sub-
circuit markings and labels in the
schematics)
• Easy and proper connecting of
measurement-/test equipment, loads
and/or external monitoring/control units
4 Design
Part of redesigning and complementing
the Universal Four Leg is to provide the user
with a product which is easy to use, reliable
and has a clear and unambiguous layout. This
is achieved by taking a few simple steps.
• All sub-circuits, inputs and outputs have
clearly been defined and named in the
schematics and are frame worked and
named accordingly on the PCB as shown
in Figure 4-1.
• Standard sized 4mm lab terminals are
added to each power in-/output on the
PCB.
• Female headers are used instead of the
usual male headers to allow easy
connections to control and monitoring
circuits.
• LED indicators are added to each supply
rail as well as the shutdown input of each
gate driver IC. The LEDs allow the user to
quickly see if either supply is faulty or an
overcurrent has been detect in any leg.
A large number of the integrated circuits
used in the design are placed on the PCB using
sockets to ensure the operation of each
individual sub-circuit of the legs can be tested
stage by stage. Improving the users’
Figure 4-1: Snippet of the PCB top silkscreen
layer, clearly marking sub-circuit borders and
names matching the sub-circuits and in-/outputs.

6
understanding of the circuit, as well as enable
easy replacement of faulty ICs. The exception
to this is the current sense amplifier IC due to
its availability (or lack of) as through hole
component and the high accuracy and
reliability required for these sub-circuits.
The ‘larger’(re)design elements are
described in the following sub chapters.
4.1 Current sense amplifiers
Due to a number of crucial factors it was
not possible to measure currents accurately.
The largest complication was the length of the
ground loop used for the current
measurements. Even the smallest possible
measurement loop measured only EMI
influences rather than the voltage drop across
the measurement shunt.
To allow accurate current measurements
the loop size is reduced drastically and
differential measurements are done instead of
single-ended measurements.
Loop sizes are reduced by changing THT
components to SMT components and through
careful layout of the components on the PCB
[12]. Figure 4-2 shows one of the current
measurement loops on the PCB. The loop size
has been reduced by approximately 90%.
One of the requirements of the revision is
the addition of an output current
measurement. This measurement circuit is
identical to that of the low-side current
measurement circuit and is shown in Figure
4-3.
The figure shows an AD8210 [13] is used
to amplify the voltage across the shunt
resistor. This amplifier is selected for its high
common mode input voltage range, its gain of
20V/V at a bandwidth of 450kHz, its high
stability at a wide temperature range and its
fully bi-directional operation mode when
provided with a reference voltage.
A TL431FDT [14] precision shunt
regulator is used to provide a stable and EMI
rugged reference voltage.
Large voltage spikes appear across shunt
resistors as a by-product of switch mode
regulation and EMI. As shown in Figure 4-4
the spikes are also amplified by the amplifiers
if left unfiltered. These amplified voltage
spikes result in continuous overcurrent
detection, causing the gate driver IC to shut
down at the start of each cycle.
Figure 4-3: Current measurement circuit.
Figure 4-2: Low-side current measurement loop.
Figure 4-4: Filtered vs unfiltered shunt voltage
after amplification.

7
4.2 Overcurrent detection
Analogue overcurrent detection is done
by feeding the output voltage of the low-side
current sense amplifier to a window detection
circuit [15]. The standard voltage divider in
the window detector circuit is split up into two
separate (adjustable) voltage dividers to allow
the user to set the overcurrent value for both
directions of the current flow independently.
This allows the user to compensate for any
divergences and components tolerances as
well as setting an application specific current
limit. Current limits are adjustable from 0-
10A in both directions.
To reduce board space, costs and
circuit/routing complexity only the low-side
current is processed. This would result in a
partial analogue short circuit protection.
However, to provide a complete short circuit
detection, the load can be connected to the
output terminals of two legs. Using the second
leg as return path, and locking its low-side
transistor in a continuous ON state, the second
leg’s overcurrent detection complements the
first leg’s overcurrent detection to provide
complete short circuit protection.
4.3 Probe Sockets
Noise caused by (large) ground loops is
one of the most prevalent complications when
performing measurements with an
oscilloscope, especially when measuring
small voltages.
As noted earlier in this paper minimizing
ground loops and improving the connection to
measurement equipment is a major part of this
revision.
Reducing both of these issues when
measuring the voltage across shunt resistors
using oscilloscope probes, a special connector
(Probe Socket) is added to the PCB.
These Probe Sockets are commercially
available only for high frequency
measurements. While this is not an issue per
se, the costs involving these connectors
excessively increases the overall costs of the
Universal Four Leg. To avoid the high costs
associated with commercially available Probe
Sockets, custom Probe Sockets have been
developed specifically for this revision and
are shown in Figure 4-5.
A Probe Socket tackles one major
complication with regards to probe
connections; the ground connection of the
probe. To solve this problem commercially
available Probe Sockets are essential a two
piece connector. One part to connect the tip of
the probe to measurement point on the PCB
and the other part to connect the ground ring
of the probe to the ground(plane) of the PCB.
The measurement part of the Probe
Socket is a pair of through hole connections
on the PCB with a diameter corresponding
with the narrow part of a probe tip.
The ground terminal of the Probe Socket
is one of the contacts of a 5x20mm fuseholder
modified to be mounted in an upright position
on the PCB and is provided with additional
mechanical support on either side, see
Figure 4-6 for a detailed image of the Probe
Sockets and their footprint.
Figure 4-5: Probe Sockets, used and unused.

8
As with the commercially available probe
sockets, these custom Probe Sockets severely
reduce the length of ground loops and the
influence of EMI on the measurement.
4.4 Half-bridge and gate driver
One of the important requirements of the
redesign is to increase the efficiency of the
Universal Four Leg. Because the gate
driver/half bridge section is the sub-circuit
where al power conversion are done it’s
inherently the section where the largest gain
in efficiency can be achieved.
The first step in reducing losses is the
reselection of the power transistors used for
switching. Table 4-1 shows a comparison in
relevant specifications between the formerly
used transistors and a number of candidate
transistors.
Based on the loss reduction due to lower
RDS(ON) and Qgate values the IPA086N103G is
selected as the replacement of the IRF640.
The total power loss of the transistors in the
half bridge is reduced by 87.6% [20] by
replacing the IRF640 transistors.*
Only in dead-time losses is replacing the
IRF640 with the IPA086N103G a small step
backwards in efficiency as the dead-time
losses are 17mW higher. However, 17mW is
a good trade-off for the 14.8W gained [20]. To
further reduce switching losses, the body
diodes of the power transistors are bypassed
using low forward voltage Schottky diodes.
The use of the Schottky diodes reduces
forward voltage drop losses by approximately
30% [20].
From a safety perspective the
replacement transistor also has an advantage
over the IRF640 and the other candidates in
that it is supplied in a TO-220 Full Pack
instead of a regular TO-220 package. The
completely isolated nature of the TO-220FP
reduces the risk of short circuits during
operation.
To limit the stray currents in the PCB, the
power return path of the half-bridges is shield
from the low power return paths by the bus
trace as shown in Figure 4-7.
Figure 4-6: Probe Clamp, close up.
Table 4-1: Power transistor comparison.
*1: [16] *2: [17] *3: [18] *4: [19]
Figure 4-7: Confined power return path.

9
4.5 External control/readout
The Universal Four Leg is designed to be
controlled by an external system. Low-side
currents, output currents and output voltages
can all be measured, while both the high-side
as well as the low-side of the bridge can be
controlled separately (or complementary) and
each gate driver IC can be shut down
remotely.
Output voltage sensing is done by
reducing and buffering this voltage to separate
the output voltage processing circuitry from
the output voltage sense circuitry and thus
minimalizing the load by the sensing circuit.
External control signals are level shifted
using a single transistor [21] to allow a wide
range of input signals.
4.6 Trace thickness and width
The revised Universal Four Leg is
equipped with four separate 10ARMS rated
power stages. Even though separate in output,
each leg draws its power from a single supply
bus. To avoid the extensive board space
required for a star configuration and to reduce
the complexity, this bus is routed as a daisy
chain.
As each leg is supplied with a maximum
of 10ARMS, the total current flow from the bus
terminal to the nearest power stage is 40ARMS.
The current flow through the bus trace
decreases by 10ARMS from that stage to the
next one.
High current flows through thin
connections cause excessive heat
development due to trace resistance. Based on
an ambient temperature of 25℃ and a
comfortable temperature to touch of less than
40℃, a maximum temperature rise of 10℃ is
aspired during this revision.
To determine the required trace width, a
number of calculations are made based on the
IPC-2221A standards [22].
The equation for the minimal trace cross
section is shown in equation (4-1).
Table 4-2 shows the required trace width
for each power stage and the bus trace
calculated using equation (4-1).
Each output trace on the PCB is 7.2 mm
or wider. The bus trace is 19.75 mm wide on
average, measured from the bus terminal to
the first power stage and 17 mm wide for the
remaining part of the trace. The 17 mm is
chosen based on the available board space. At
35 µm copper thickness, this would result in
significant temperature increases in the 30 and
40A traces. To reduce these high
temperatures, 60 µm copper thickness is used
in the final design. While the 30 and 40A
traces are still a little narrow, any heat
development in those short traces spreads out
evenly over the entire trace.
5 Tests
After a few minor adjustments, due to a
datasheet inconsistency and some tweaking of
the level shift switching times, the revised
Universal Four Leg functioned as intended.
Except where noted, all test are done
using a single phase 50kHz, TTL-level square
wave, see Figure 5-1 for an overview of the
test setup.
5.1 Basic functionality tests
Initial tests are performed without
attached load over a variety of bus voltage
*5: trace cross section is converted from sq. mills to mm at two
standard copper thicknesses
Table 4-2: Trace width at 35 and 60 µm.

10
levels to confirm the Universal Four Leg
functions at the required input voltage range
of 18-60VDC. These tests are performed
using single phase 50kHz and 100kHz, 50%
duty cycle, TTL-level square waveforms
generated by an arbitrary waveform generator.
Square waveform output voltages with the
expected ringing are measured.
5.2 No load configuration tests
After confirming basic operation, the
Universal Four Leg is tested with a variety of
configurations:
• Arbitrary waveform generator controlled
o Single phase input at TTL-level
o Single phase input at 0-3 Vp-p
o Two phase input
o Three phase input
• Arduino Nano controlled
o Single phase input
o Three phase input
As with the basic functionality tests,
square waveform output voltages with the
expected ringing are measured.
5.3 Tests under load
The load tests are performed by
connecting one end of a 1Ω, 9.3mH load to the
output terminal of one of the legs on the PCB
and the other end to the corresponding ground
terminal.
The tests under load are performed in
current controlled mode to assess the thermal
behaviour of the power stage of the Universal
Four Leg.
Figure 5-1: Test setup overview.

11
Figure 5-2 shows the MOSFET’s thermal
behaviour as a function of the output current.
Note that the highest measured temperature is
66.1℃. This temperature is measured at the
high side transistor with an output current of
10ARMS.
Following the ascending current test, the
Universal Four Leg is submitted to an
endurance stress test to provide an indication
of the long term behaviour. The leg is tested,
free air and without heatsink, for
approximately four hours at an output current
of 10ARMS. During the four hours, the
MOSFET temperature showed no meaningful
deviation from the 66.1℃ measured earlier.
The final test under load is a short
duration overload test of approximately 5
minutes at an output current of 12ARMS. The
test showed a significant increase in
temperature of both the power transistors as
well as the shunt resistors. Before stopping the
test, the transistors reached a temperature of
approximately 90℃ (well within their SOA)
while the shunt resistors reached their
operating limit at approximately 80℃ [23].
5.4 Current measurement and
overcurrent detection
Two different configurations are tested
with regards to the current measurement
circuitry. The voltage across the shunt
resistors is measured both filtered as well as
unfiltered after which the overcurrent
detection circuitry is activated to confirm the
leg shuts down when an overcurrent is
measured.
Figure 5-3 shows the unamplified
voltage across the low side shunt as well as the
output current and voltage curves. Note the
large spikes on the grey line. These spikes
occur when the low side transistor turns on or
off and cap-out well beyond the limits of the
graph.
As shown earlier in Figure 4-4 the
amplified unfiltered values far exceed the,
more realistic, filtered values.
These excessive values prove to be a
problem when the overcurrent detection IC is
in place. While the overcurrent detection
circuitry is operational, the amplified,
unfiltered shunt voltage exceeds the
overcurrent thresholds and triggers a
shutdown at each spike. The filtered values
only trigger a shutdown when an actual
overcurrent event occurs.
6 conclusion
An important part of this revision is to
improve the ease, accuracy and accessibility
of measurements. To improve on this subject,
lab terminals and female headers are used
instead of the usual screw terminals and male
headers. Also a clear layout of components as
well as markings matching the schematics are
used. This significantly reduces connection
time and difficulties as well as increasing
Figure 5-2: MOSFET temperature vs output current.
Figure 5-3: Low-side shunt spikes.

12
connection reliability. However, the largest
improvement made is the use of Probe
Sockets. These sockets are used to perform
measurements across the shunt resistors.
These measurements are otherwise nearly
impossible to perform due to EMI pick-up
through long ground loops, as well as
requiring the user to continuously hold the
probe while measurements are performed.
The (re)design of the current
measurement circuits and the use of low-pass
filters allow the user to reliably measure
current flow through the shunt resistors. These
values can be used to detect overcurrent
events and as feedback signals for control.
EMI is reduced by the migration to SMT
components, the reduction of current loops
and the use of a shielded inductor in the
auxiliary power supply.
Another result of the use of SMT
components is a large size reduction of 42.5%
from the first revision stage into the second
revision stage (this also includes trimming
redundant circuity). The second revision stage
is also a size reduction of 20.8% compared to
the unrevised version. This reduction occurs
despite of the added circuitry of an additional
current measurement, the Probe Sockets, clear
markings and an Arduino Nano footprint
(which takes up approximately 15% of the
final version).
The highest measured temperature during
normal operation is 66.1℃. Although
components at this temperature are not
comfortable to hold, it is not harmful to do so.
This temperature is well within the SOA of the
components measured, which shows that no
heatsink is required.
7 Recommendations
To further improve the Universal Four
Leg and number of possible additions and
adjustments are listed below:
• Overvoltage protection on the bus and
outputs, to further protect the circuitry
from voltage spikes and human errors;
• An adjustable voltage divider in the
output voltage sense circuitry to allow
more accurate voltage sensing at lower
output voltages, or to match control
circuitry input voltage range;
• The use of fine serrated washers to mount
the lab terminals on the PCB;
• The addition of low-pass filters to the
Probe Sockets to allow identical
amplified and unamplified current
measurements to be performed;
• The addition of a MUX to allow all
twelve analogue signals to be processed;
• The design of a RaspberryPi expansion
board with onboard ADC to allow more
complex control algorithms as well as
IoT based control;
• Output 𝑑𝑖
𝑑𝑡⁄ measurement via inductor
(invasive) or transformer (non-invasive),
to allow lowest fault energy shutdown;
• Onboard measurement of bus voltage to
allow droop control without external
components;
• Overcurrent shutdown feedback to
external control systems.
8 References
[1] van Duijsen P.J. , Woudstra J.B. , van
Willigenburg P. , DC Grid Laboratory
Experimental Setup, THUAS, 2018
[2] Woudstra J.B. , van Duijsen P.J. , van
Willigenburg P. , Witte P.M. , DC
Educational Development –
Improving understanding of DC to DC
/ DC to AC conversion, 46th
SEFI
Conference, THUAS, September 17-
21, 2018
[3] van Duijsen P.J. , Woudstra J.B. , van
Willigenburg P. , Educational setup
for Power Electronics and IoT,
THUAS, 2018
[4] van Duijsen P.J. , Practicumhandleiding
Vermogenselektronica II DC-AC
Inverter, THUAS, 2017

13
[5] Witte P.M. , Practicumhandleiding
Vermogenselektronica I –
Boostconverter, THUAS, 2017
[6] van Duijsen P.J. , Lecture notes:
Vermogenselectronica I, DC-DC
vermogensomzetters, THUAS, 2016
[7] van Duijsen P.J. , Lecture notes:
Vermogenselectronica II, DC-AC
vermogensomzetters, THUAS, 2017
[8] Fraunhofer Institute for Integrated
Systems and Device Technology IISB,
DC-Grid Manager 2.0 for DC
Microgrids in Buildings, June 5, 2017
[9] März M. , DC Micro Grids -
Challenges and Perspectives, 12th
ISPS • E2SG Workshop, Fraunhofer
IISB, August 26, 2014
[10] Ott L. , Wunder B. , Han Y. , Kaiser J.,
März M. , Power Electronics for Low-
Voltage DC Grids in Commercial
Buildings, , Fraunhofer IISB, October,
2014
[11] Guerrero, J. M. , Vásquez, J. V. , &
Teodorescu, R. , Hierarchical Control
of Droop-Controlled DC and AC
Microgrids - A General Approach
Towards Standardization, Aalborg
University, 2009
[12] Brown Matty, Fairchild
Semiconductor, AN1031 -
Considerations in Designing the
Printed Circuit Boards of Embedded
Switching Power Supplies, April 30,
1999
[13] Analog Devices, AD8210 - High
Voltage, Bidirectional Current Shunt
Monitor Data Sheet, Rev. D, June,
2013
[14] NXP, TL431 family - Adjustable
precision shunt regulator Product data
sheet, Rev. 5, September 1, 2015
[15] TI, SBO221 Analog Engineer’s
Circuit: Amplifiers - Window
Comparator Circuit, Texas
Instruments, January, 2018
[16] NXP, PSMN9R5-100PS - N-channel
100 V 9.6 mΩ standard level
MOSFET in T0-220 Product data
sheet, October 17, 2013
[17] International Rectifier, IRFB4410 –
HEXFET® Power MOSFET
Datasheet, April 25, 2014
[18] Infineon, IPA086N10N3-G -
OptiMOS™3 Power-Transistor Data
Sheet, Rev. 2.4, August 27, 2015
[19] International Rectifier, IRF640NPbF -
5th Gen. HEXFET® Power MOSFET
Datasheet, July 23, 2010
[20] ROHM, Application Note, Switching
Regulator IC Series - Calculation of
Power Loss (Synchronous), Rev. 003,
October, 2016
[21] ON Semiconductor, NTR5103N/D -
Small Signal MOSFET 60 V, 310 mA,
Single, N - Channel, SOT-23, Rev. 1,
October, 2016
[22] IPC, IPC-2221A, Generic Standard on
Printed Circuit Board Design.
Northbrook, IL, May, 2003
[23] Vishay, D/CRCW e3 Standard Think
Film Resistors, Document Number:
20035, Revision: 04-Jun-12

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