1. Design and Analysis of Sequential Reversible Logic
Structures Using Nanomagnet Logic
Alexander Gunter and Dr. Matthew Morrison
VLSI System Design Research Laboratory
Department of Electrical Engineering
University of Mississippi
{akgunter@go.olemiss.edu, morrison@olemiss.edu}
Introduction
• Reversible logic is a promising design
paradigm that mitigates energy dissipation.
• Quantum-dot Cellular Automation
performs binary logic through nanomagnet
coupling.
• Recent research has produced rules for
permissibility of reversible logic in sequential
computing.
• Rules for implementation of nanomagnet
logic are known
• Implementation of sequential reversible logic
(SRL) using nanomagnet logic (NML) has not
been explored
• SRL could minimize energy dissipation in NML
and allow for quantum computing
Definitions and Rules for NML
Proposed Definitions and Rules for SRL Using NML
• Feedback-producing path: a set of wires that
begins at the inputs and ends at a feedback-
producing output
• Feedback data: the binary data produced by a
feedback-producing path which is sent through a
feedback path
Feedback data may not arrive at a feedback-
dependent input after the next clocking cycle begins
For every magnet in a feedback path, the new state
for a magnet must depend only on the preceding
magnet's state for the current clock cycle
A clocking zone may not contain portions of both a
feedback-producing path and its corresponding
feedback path.
• Snake clock: clocking zones are vertical stripes,
bounded in only one direction.
• Cell clock: clocking zones are of similar size and
bounded in both directions
Citations
[1] Morrison, M.; Ranganathan, N., "Analysis of Reversible Logic
Based Sequential Computing Structures Using Quantum
Mechanics Principles," VLSI (ISVLSI), 2012 IEEE Computer Society
Annual Symposium on, pp.219,224, 19-21 Aug. 2012.
[2] Palit, Indranil; Hu, X.Sharon; Nahas, Joseph; Niemier,
Michael, "Systematic design of Nanomagnet Logic circuits,"
Design, Automation & Test in Europe Conference & Exhibition
(DATE), 2013, pp.1795,1800, 18-22 March 2013.
[3] Giri, D.; Vacca, M.; Causapruno, G.; Wenjing Rao; Graziano,
M.; Zamboni, M., "A standard cell approach for MagnetoElastic
NML circuits," Nanoscale Architectures (NANOARCH), 2014
IEEE/ACM International Symposium, pp.65,70, 8-10 July 2014.
Mr. Gunter is currently pursing his B.S. in Computer Science at the University of Mississippi,
and is performing research with Dr. Morrison. He is also a Sally McDonnell Barksdale Honors
College scholar.
Example Graphical Representations
Definitions and Rules for SRL
• Feedback-dependent input: an input that
receives a feedback wire
• Feedback-producing output: an output from
which a feedback wire begins
• Feedback path: a wire that begins at a
feedback-producing output and ends at a
feedback-dependent input
1) There must be d feedback-dependent inputs
and p feedback-producing outputs.
2) Each feedback-dependent input is dependent
on only one feedback path.
3) There are also n feedback paths, and each
path is reversible => d = n.
4) For the initial clock cycle, the number of
input and output states are both 2N – d – a
where N is the total number of inputs and a
is the number of ancillary inputs.
5) For each subsequent clock cycle, the number
of statesare where si is the
possible states for a feedback-producing
output, and sk is the possible states for a
feedback-dependent input.
6) All past and future states are unique and
determinable.
7) The system must be physically reversible.
• Hx: horizontal external magnetic field
• HminExtra: minimum additional Hx necessary to push
magnets into metastable state
• HmaxExtra: maximum tolerable
additional Hx such that all
magnets are in a binary state
• Hclk: Hx currently produced by
the clocking field
When Hclk = 0, HmaxExtra must be greater than 0.
When Hclk ≠ 0, HminExtra must be 0.
Future Considerations
• Representation: What other models may more
clearly illustrate the relationship between
clocking layouts and data propagation?
• Fabrication: How easily can a clocking layout be
produced?
• Standardization: Can a clocking layout be
condensed into a universal library?
• Design: Given a clocking layout, how easily can
design of a circuit layout be automated?
• Robustness: How susceptible to manufacturing
defects is a clocking layout and how easily can it
be made less so?
• Testability: How can significant manufacturing
defects be detected, and does testing impose
additional rules?
Graph Representation of a NML Circuit
• M = {m0, m1, …, mnumMagnets}
• Z = {z1, z2, …, znumZones}
• Z is a partition of M
• Circuit layout: Lcrt = (M, EM )
• Clocking layout: Lclk = (Z, EZ )
• Propagation layout: Lprop = (M, EP )
• Lcrt shows which magnets interact with one
another.
• Lclk shows the order in which zones are activated.
• Lprop shows the direction in which data may
propagate between magnets.
• Lprop can be derived from Lcrt and Lclk and
determines whether the clocking layout supports
feedback.
DAC 2015
Lclk
Lcrt
Lprop
Lclk Lprop
Lcrt
2 si
i1
1
  2 sk
k1
1


2 si
i1
1
  2 sk
k1
1

022)2ln(
11






  


p
k
k
d
i
iB ssk
T
dQ