Tocci ch 7 counters and registers modified x

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Chapter 7
Counters and Registers

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Asynchronous (Ripple) Counters

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Asynchronous (Ripple) Counters

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Asynchronous (Ripple) Counters

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Asynchronous (Ripple) Counters
Mod Number = 2N

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Frequency Division

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Digital Clock

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Propagation Delay in Ripple Counters

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Propagation Delay in Ripple Counters

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Propagation Delay in Ripple Counters
max
1
clock pd
pd
T N t
f
N t
 


To avoid losing states

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Synchronous (Parallel) Counters

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Synchronous (Parallel) Counters

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Advantages of Synchronous Counters
     Pd Pd Pdt Counter t FF t AND 

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Counters With Mod Number ≠ 2N

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Counters With Mod Number ≠ 2N

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Counters With Mod Number ≠ 2N
CLRCLRCLR
2Q
1Q
MOD = 6

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Counters With Mod Number ≠ 2N

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Displaying Counter State

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Decade Counters and BCD Counters
Decade Counters: 10 States
BCD Counters: 0 1 … 9 States

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Synchronous Down

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Synchronous Down and Up/Down Counters

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Presettable Counters

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Decoding a Counter

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Decoding a Counter

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A
A
B
BC
C
ABC
Decoding a Counter

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Active Low Decoding

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BCD Counter Decoding

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BCD Counter Decoding

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Analyzing Synchronous Counter

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Analyzing Synchronous Counter
Self-correcting counter: unused states → normal count sequence

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Analyzing Synchronous Counter

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Analyzing Synchronous Counter

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Analyzing Synchronous Counter

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Synchronous Counter Design
1. Number of Flip Flops
2. Type of Flip Flop
3. Flip Flop Excitation Table
4. Counter Excitation Table
5. Design Inputs for Different Flip Flops

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Synchronous Counter Design
Flip Flop Excitation Table

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Synchronous Counter Design

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Synchronous Counter Design

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Synchronous Counter Design

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Synchronous Counter Design
Qn Qn+1 T
0 0 0
0 1 1
1 0 1
1 1 0
Excitation Table for T Flip Flop

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Synchronous Counter Design
Example

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Synchronous Counter Design
Example
Counter State Transion Table

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Synchronous Counter Design
Example
Counter Excitation Table

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Synchronous Counter Design
Example
𝐾𝐴 = 1

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Synchronous Counter Design
Example

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Synchronous Counter Design
Example
Counter State Transion Digram

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Synchronous Counter Design
Counter Excitation Table (T FF)

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Synchronous Counter Design

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Synchronous Counter Design
Example
1x 
1x 
0x 
0x 
0x 
0x 

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Synchronous Counter Design

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Synchronous Counter Design

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Synchronous Counter Design

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Synchronous Counter Design

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Synchronous Counter Design
Stepper Motor Control

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Synchronous Counter Design
Stepper Motor Control

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Synchronous Counter Design
Stepper Motor Control

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Synchronous Counter Design
Stepper Motor Control

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Synchronous Counter Design
Stepper Motor Control

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Part 2

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Integrated-Circuit Registers

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Parallel In/Parallel Out

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Parallel In/Parallel Out
Connecting 74ALS174 as a serial shift register

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Serial In/Serial Out

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Serial In/Serial Out

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Parallel In/Serial Out

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Parallel In/Serial Out

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Serial In/Parallel Out

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Serial In/Parallel Out

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Shift Register Counters
1. Ring Counter
2. Johnson Counter

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Ring Counter

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Ring Counter

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Starting a Ring Counter

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Decoding Ring Counter

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Johnson Counter

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Johnson Counter

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Johnson Counter

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Johnson Counter
Clock # Q0 Q1 Q2 Q3
0 1 0 0 0
1 1 1 0 0
2 1 1 1 0
3 1 1 1 1
4 0 1 1 1
5 0 0 1 1
6 0 0 0 1
7 0 0 0 0
8 1 0 0 0

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Johnson Counter
1000
0111
0001 1110
11000000
0011 1111

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Decoding Johnson Counter