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1Sem-Basic Electronics Notes-Unit8-Digital Logic

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Dr. Shivananda Koteshwar
Dr. Shivananda Koteshwar

1st Semester Basic Electronics UNIT 8 Notes - Digital Logic

Education
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ODD   SEMESTER   12   BASIC  ELECTRONICS-­‐1-­‐CLASS  NOTES  –  UNIT8   Shivoo  Koteshwar   Professor,  E&C  Department,  PESIT  SC       Digital  Logic   • Boolean  algebra   • Logic  gates   • Half-­‐adder   • Full-­‐adder   • Parallel  Binary  adder       Reference  Books:   • Basic  Electronics,  RD  Sudhaker  Samuel,  U  B  Mahadevaswamy,  V.  Nattarsu,  Saguine-­‐Pearson,   2007     UNIT  8:  DIGITAL  LOGIC:  Boolean  algebra,  Logic  gates,  Half-­‐adder,  Full-­‐adder,  Parallel  Binary  adder               7  Hours       P e o p l e s   E d u c a t i o n   S o c i e t y   S o u t h   C a m p u s   ( w w w . p e s . e d u )  
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Boolean Algebra: Boolean Algebra is an algebra developed by George Boole. The Laws of Boolean Algebra are used to simplify and evaluate logic expressions. Just as operations like addition (+), subtraction (-), multiplication (x) and division (/) are used to evaluate arithmetic expressions, logic expressions have their own operators – AND (.), OR (+) and NOT (^ or ~) Logic expressions evaluate to TRUE or FALSE. In a positive logic system true is represented by 1 while false is represented by 0 NOT GATE:   Shivoo  Koteshwar’s  Notes                                          2                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   AND GATE OR GATE   Shivoo  Koteshwar’s  Notes                                          3                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   XOR GATE NAND GATE NOR GATE   Shivoo  Koteshwar’s  Notes                                          4                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   XNOR GATE REVISION   Shivoo  Koteshwar’s  Notes                                          5                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   BOOLEAN ALGEBRA DUALITY • Axioms and single-variable theorems are expressed in pairs. This reflects the importance of duality • Given any logic expression, its dual is formed by replacing all + with ·, and vice versa and replacing all 0s with 1s and vice versa o f(a,b)=a+b dual of f(a,b)=a·b o f(x)=x+0 dual of f(x)=x·1 • The dual of any true statement is also true o If a function f is described in a truth table, then an expression that generates f can by obtained (synthesized) by considering all rows in the table where f=1, or by considering all rows in the table where f=0   Shivoo  Koteshwar’s  Notes                                          6                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Logic Minimization and Implementation – Proof by Induction Method Hint: Induction is Truth Table approach   Shivoo  Koteshwar’s  Notes                                          7                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   DeMorgan’s Theorem   Shivoo  Koteshwar’s  Notes                                          8                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Universal Gate: NAND and NOR both are called as universal gate. You can build any circuit or design using either only NAND or NOR   Shivoo  Koteshwar’s  Notes                                          9                                                                                          shivoo@pes.edu        
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   NAND as a Universal Gate XOR Using only NAND:   Shivoo  Koteshwar’s  Notes                                          10                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   AND Gate Construction: Construction of an AND gate:   Shivoo  Koteshwar’s  Notes                                          11                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   OR Gate Construction: Construction of an OR gate:   Shivoo  Koteshwar’s  Notes                                          12                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Logic Gates Minimization and Implementation:   Shivoo  Koteshwar’s  Notes                                          13                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   IMPLEMENTING USING UNIVERSAL GATE – NAND IMPLEMENTING USING UNIVERSAL GATE – NOR   Shivoo  Koteshwar’s  Notes                                          14                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   HALF ADDER: FULL ADDER:   Shivoo  Koteshwar’s  Notes                                          15                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   FULL ADDER WTH 2 HALF ADDERS: Parallel Binary Adder • The use of one half-adder or one full-adder alone are great for adding up two binary numbers with a length of one bit each, but what happens when the computer needs to add up two binary numbers with a longer length? • Well, there are several ways of doing this. The fastest way by far is to use the Parallel Binary Adder. • The parallel binary adder uses one half-adder, along with one or more full adders. • The number of total adders needed depends on the length of the largest of the two binary numbers that are to be added. • For example, if we were to add up the binary numbers 1011 and 1, we would need four adders in total, because the length of the larger number is four • Keeping this in mind, here is a demonstration of how a four- bit parallel binary adder works, using 1101 and 1011 as the two numbers to add:   Shivoo  Koteshwar’s  Notes                                          16                                                                                    shivoo@pes.edu              
Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Check your understanding: • Circuit Analysis: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698228.cw/content/index.html • Checkup: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698239.cw/content/index.html • True or False: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698250.cw/content/index.html • Multiple Choice Questions: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698261.cw/content/index.html   Shivoo  Koteshwar’s  Notes                                          17                                                                                    shivoo@pes.edu              

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1Sem-Basic Electronics Notes-Unit8-Digital Logic

  • 1. ODD   SEMESTER   12   BASIC  ELECTRONICS-­‐1-­‐CLASS  NOTES  –  UNIT8   Shivoo  Koteshwar   Professor,  E&C  Department,  PESIT  SC       Digital  Logic   • Boolean  algebra   • Logic  gates   • Half-­‐adder   • Full-­‐adder   • Parallel  Binary  adder       Reference  Books:   • Basic  Electronics,  RD  Sudhaker  Samuel,  U  B  Mahadevaswamy,  V.  Nattarsu,  Saguine-­‐Pearson,   2007     UNIT  8:  DIGITAL  LOGIC:  Boolean  algebra,  Logic  gates,  Half-­‐adder,  Full-­‐adder,  Parallel  Binary  adder               7  Hours       P e o p l e s   E d u c a t i o n   S o c i e t y   S o u t h   C a m p u s   ( w w w . p e s . e d u )  
  • 2. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Boolean Algebra: Boolean Algebra is an algebra developed by George Boole. The Laws of Boolean Algebra are used to simplify and evaluate logic expressions. Just as operations like addition (+), subtraction (-), multiplication (x) and division (/) are used to evaluate arithmetic expressions, logic expressions have their own operators – AND (.), OR (+) and NOT (^ or ~) Logic expressions evaluate to TRUE or FALSE. In a positive logic system true is represented by 1 while false is represented by 0 NOT GATE:   Shivoo  Koteshwar’s  Notes                                          2                                                                                          shivoo@pes.edu        
  • 3. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   AND GATE OR GATE   Shivoo  Koteshwar’s  Notes                                          3                                                                                          shivoo@pes.edu        
  • 4. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   XOR GATE NAND GATE NOR GATE   Shivoo  Koteshwar’s  Notes                                          4                                                                                          shivoo@pes.edu        
  • 5. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   XNOR GATE REVISION   Shivoo  Koteshwar’s  Notes                                          5                                                                                          shivoo@pes.edu        
  • 6. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   BOOLEAN ALGEBRA DUALITY • Axioms and single-variable theorems are expressed in pairs. This reflects the importance of duality • Given any logic expression, its dual is formed by replacing all + with ·, and vice versa and replacing all 0s with 1s and vice versa o f(a,b)=a+b dual of f(a,b)=a·b o f(x)=x+0 dual of f(x)=x·1 • The dual of any true statement is also true o If a function f is described in a truth table, then an expression that generates f can by obtained (synthesized) by considering all rows in the table where f=1, or by considering all rows in the table where f=0   Shivoo  Koteshwar’s  Notes                                          6                                                                                          shivoo@pes.edu        
  • 7. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Logic Minimization and Implementation – Proof by Induction Method Hint: Induction is Truth Table approach   Shivoo  Koteshwar’s  Notes                                          7                                                                                          shivoo@pes.edu        
  • 8. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   DeMorgan’s Theorem   Shivoo  Koteshwar’s  Notes                                          8                                                                                          shivoo@pes.edu        
  • 9. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Universal Gate: NAND and NOR both are called as universal gate. You can build any circuit or design using either only NAND or NOR   Shivoo  Koteshwar’s  Notes                                          9                                                                                          shivoo@pes.edu        
  • 10. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   NAND as a Universal Gate XOR Using only NAND:   Shivoo  Koteshwar’s  Notes                                          10                                                                                    shivoo@pes.edu              
  • 11. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   AND Gate Construction: Construction of an AND gate:   Shivoo  Koteshwar’s  Notes                                          11                                                                                    shivoo@pes.edu              
  • 12. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   OR Gate Construction: Construction of an OR gate:   Shivoo  Koteshwar’s  Notes                                          12                                                                                    shivoo@pes.edu              
  • 13. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Logic Gates Minimization and Implementation:   Shivoo  Koteshwar’s  Notes                                          13                                                                                    shivoo@pes.edu              
  • 14. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   IMPLEMENTING USING UNIVERSAL GATE – NAND IMPLEMENTING USING UNIVERSAL GATE – NOR   Shivoo  Koteshwar’s  Notes                                          14                                                                                    shivoo@pes.edu              
  • 15. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   HALF ADDER: FULL ADDER:   Shivoo  Koteshwar’s  Notes                                          15                                                                                    shivoo@pes.edu              
  • 16. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   FULL ADDER WTH 2 HALF ADDERS: Parallel Binary Adder • The use of one half-adder or one full-adder alone are great for adding up two binary numbers with a length of one bit each, but what happens when the computer needs to add up two binary numbers with a longer length? • Well, there are several ways of doing this. The fastest way by far is to use the Parallel Binary Adder. • The parallel binary adder uses one half-adder, along with one or more full adders. • The number of total adders needed depends on the length of the largest of the two binary numbers that are to be added. • For example, if we were to add up the binary numbers 1011 and 1, we would need four adders in total, because the length of the larger number is four • Keeping this in mind, here is a demonstration of how a four- bit parallel binary adder works, using 1101 and 1011 as the two numbers to add:   Shivoo  Koteshwar’s  Notes                                          16                                                                                    shivoo@pes.edu              
  • 17. Digital  Logic    (1st  Semester)                                                                                                            UNIT  8  Notes  v2.0   Check your understanding: • Circuit Analysis: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698228.cw/content/index.html • Checkup: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698239.cw/content/index.html • True or False: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698250.cw/content/index.html • Multiple Choice Questions: o http://wps.prenhall.com/chet_floyd_digitalfun_10/86/22258/ 5698261.cw/content/index.html   Shivoo  Koteshwar’s  Notes                                          17                                                                                    shivoo@pes.edu