PART-01 Single electron devices (SEDs) are the promising candidates where the bits can be defined using only a few electrons, leading to circuits with immunity from statistical fluctuations in the number of electrons per bit and very low power consumption

1. Computer assisted decision support system for
anomaly detection in EEG Signals
BY
Dr. AMIRTHALAKSHMI T M
Assistant Professor
Department of CSE
SRM Of Science And Technology
Ramapuram
Chennai-600089
SINGLE ELECTRON TRANSISTOR
1

2. • Research Motivation
• Challenges in downscaling of MOSFETs
• Literature Review
• Proposed System
• Need of Single electron transistor (SET)
• Design of low power reversible logical circuits for ALU
• Design of low power reversible arithmetic circuits for ALU
• Results and discussions
• Conclusion
• Future Work
• References
Outline of the Presentation
2

3. Research Motivation
• Past few decades have evidenced a dramaturgical decrease
in feature size coexisted with an enhancement in processing
speed..
• But further scaling down the conventional MOSFET designs
would lead to
increased gate oxide leakage
sub-threshold leakage
increased transistor reliability and parameter variability.
• Major problems with CMOS technology are
increased power consumption,
interconnect delay
 limited integration density and device scaling limits.
3

4. Research Motivation
• These foreknown stumbling stones turn out to be the
motivation for the development of new devices and
designs at the nanometer scale.
• Single electron devices (SEDs) are the romising
candidates where the bits can be defined using only a
few electrons, leading to circuits with immunity from
statistical fluctuations in the number of electrons per
bit and very low power consumption.
4

5. Literature Review
5
EXISTING
DESIGN
POWER
CONSUMPTION
OPERATIONS YEAR
Irreversible 4-bit
ALU
1.7 µW Add, Sub, Mul,
few logical
operations
2017
8-bit ALU with
11-MOS
transistor full
adder and GDI
based
multiplexer
32.9µW Add, Sub, Inc,
Dec, few logical
operations
2016
1-bit ALU using
Finfet technology
24µW Add, Sub, few
logical
operations
2016
4-bit ALU using
GDI technique
1.4mW Add, Sub, few
logical
operations
2015

6. Literature Review
6
EXISTING
DESIGN
POWER
CONSUMPTION
OPERATIONS YEAR
4-bit ALU using
hybrid CMOS-
SET
0.291nW addition, OR,
XOR & AND
operations
2015
4-bit ALU using
TSG gate and PV
gate
7.4nW Add, Sub, few
logical operations
2014
8-bit ALU using
pass transistor
logic
52.28mW Add, Sub, few
logical operations
2014
8-bit ALU using
32nm CMOS
technology
7.29mW Add, Sub, few
logical operations
2012

7. (a) FET (b) SET
7
s
Field effect transistor(FET) and Single electron
transistor(SET)

8. Need of SET
• Millions of electrons flows through the channel in its
operation and maximum of them dissipated as heat,
which ultimately heats up the device and radiates out.
The resulting effect is therefore power loss.
• Further miniaturization and power dissipation are the
challenges, which lead to the exploration of possible
successor technology with greater scaling potential
• The breakthrough of nanotech as well as its successful
combination with semiconductor technologies gives
hope to Single electron transistor (SET).
8
s

9. Quantum dot (QD)
9
s
• When all the three dimensions of a material
reduced to the nanometer range, then this
material is called quantum dot (QD). It may have
cubical or spherical shape.
• When the material dimensions reduce then the
delocalized electrons become localized and
confined with discrete energy levels, which can
be called quantized.
• The metallic QD used in the construction of SET.
The density of quantum energy states of
localized electrons depend on the size of QD.

10. Quantum dot (QD)
10
s
• The smallest QDs have the compressed quantum
energy states whereas the biggest QDs have
spaced quantum energy states of localized
electrons.
(a) Smallest QD (b) biggest QD

11. Concept of Single electronics
.
11
s
•An electron feeling a small attractive force as it
approaches a sphere.
• Once sphere gets charge by a single electron; other
electrons will feel a strong repelling force. Which is
called coulomb blockade.
•When coulomb blockade exists, SET is OFF.
•When coulomb blockade does not exist, SET is ON.

12. Construction of Single electron transistor(SET)
12
s
•A single electron transistor (SET) is a new type of switching device
that uses controlled electron tunneling to amplify current. This
transistor is constructed based on quantum mechanical principle.
•The single electron transistor is similar to the normal transistor
(FET) except the channel is replaced by QD. The QD is separated
by thin insulators from both the source and drain.
• The thin insulators act as tunnel barrier between source to QD and
QD to drain. The gate is connected to the QD by a capacitor, Cg
• In SET, electron tunnels in two steps such as source to dot and
dot to drain. The gate voltage Vg controls the charge on this
capacitor Cg.

13. Operation principle
13
s
The energy needed to charge the capacitor is e2 /2. It is
typically 80 meV. If this energy is not supplied to the system
electron transport will be blocked, this is known as coulomb
blockade (CB).
gate
C
g
Vg
Vb
Source Drain
Tunnel junctions
island
C1 C2
+q1 -q1 +q2 -q2
q
V2
V1

14. Single electron transistor(SET)
• Under no bias condition, the transportation of electron from
source to drain will not take place because the Fermi levels of
both the source and drain will be in the same level and the
localized as well as quantized electrons are in quantum
mechanically confinement as discrete energy levels and
provides coulomb blockade in QD.
• Now if a bias voltage applied between drain to source (VDS),
then the Fermi level of sources, S will go up and of drain, D
go down by the amount of energy /2, which cause off Fermi
levels between source and drain.
14
s
(a) With no bias (b) with bias VDS © with gate voltage VG

15. Single electron transistor(SET)
• In this case, electron may transfer from source to QD but
without gate voltage (VG) it will not happened because for
an extra electron, the energy of QD will be increased by
the same amount, which is contrary to the principle of
conservation of energy of the system.
• As such, by sweeping the gate voltage for a fixed drain to
source voltage, VDS, the tunneling of one electron
through the QD in a fashion source to QD and QD to drain
is possible to make.
• In that, when a gate voltage, VG is changed by ΔVg=e
/Cg, then for a certain situation, the whole energy levels of
QD go down below the Fermi level of source region but
remain above the Fermi level in the drain region.
15
s

16. Single electron transistor(SET)
• Under this condition, electron from source will hope to the
QD and from QD to drain. Accordingly, the laws of
conservation of energy will be maintained inside the QD.
• By thus gate controls tunneling of one electron from source
to drain. This is the working principle of SET.
• If the charge stored in a nanostructure could be controlled
at the one electron level, then the number of electrons
necessary to define a single bit could be dramatically
reduced, leading to a large reduction in the power
consumption of the device.
• Operation is based on the discrete nature of electrons
tunneling through thin potential barriers.
16
s

17. The current-drain voltage characteristics of SET
17
s
Any tunneling event would lead to an increase of the total
energy and also the tunneling rate is exponentially low.
Therefore the I-V curve has staircase shape, which is
called as Coulomb staircases.

18. The current-gate voltage characteristics of SET
18
s
•The current is a periodic function of the gate voltage VG
because the tunneling of one electron in or out of the dot is
induced by the gate voltage. This periodic oscillation is also
known as Coulomb oscillation.
•These ID-VDS and ID-VGS characteristics of SET are called
Coulomb blockade oscillation characteristics.

19. Merits of SET
• No requirement of a new process technology.
• Two metal layers are only required
• By employing a finite electron number for signal
processing, extremely low power can be obtained in
circuits.
• Switching speed is high.
• Small device dimensions make extremely high integration
densities on-chip possible.
19
s

20. SET vs MOSFET
• Structure
– Two tunneling barrier vs. inversion channel
• Size
– Extremely small vs. large (although scaled down)
• Main physical principle
– Coulomb blockade vs. electron diffusion
• Threshold voltage & source-drain current
– Periodic vs. not periodic
• Sensitivity
– High vs. low (10000X)
• Power
– Low vs. high
• Charge carriers
– Electrons in CBs in semiconductor used as channel vs.
electrons are densely packed in QD 20
s

21. Inherent problems of SET and its possible
solutions
• Low operating temperature
-Focused ion beam based etch, SWNT to be
used.
• Interconnecting problems
- to keep parasitic capacitances as low as
possible.
• Random background charge
- hardware redundancy circuit, neural network.
21
s

22. COMPONENTS OF 8-BIT ALU
• NAND/AND , NOR/OR –Reversible Logic gates
• ADDITION/SUBTRACTION- performed by
reversible complementing adder circuit.
• COMPRESSORS- to reduce partial product
addition in multiplication process.
• MULTIPLICATION- performed by tree based
reversible multiplier.
• MULTIPLEXER- output of ALU selected by 4:1
reversible multiplexer.
s

23. • To be continued in next PPT