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MOSFET: History, Trends and
Structure
References
Weste: Introduction
Kang: MOS System
• It is a well-known premise in
engineering that the conception of a
complex construction
• without a prior understanding of the
underlying building blocks is a sure
road to failure.
• This surely holds for digital circuit
design as well
Introduction
• It is a well-known
premise in
engineering that the
conception of a
complex construction
without a prior
understanding of the
underlying building
blocks is a sure road
to failure.
• This surely holds for
digital circuit design
as well
• The basic building blocks in today’s
digital circuits are the silicon
semiconductor devices, more
specifically the MOS transistors
and to a lesser degree the parasitic
diodes, and the interconnect wires.
• The role of the semiconductor
devices has been appreciated for a
long time in the world of digital
integrated circuits. On the other
hand, interconnect wires have only
recently started to play a dominant
role as a result of the advanced
scaling of the semiconductor
technology.
Feature Size/Technology Node
The feature size of a CMOS manufacturing process
refers to the minimum dimension of a transistor
(channel length) that can be reliably built.
The 4004 processor had a feature size of 10 µm in
1971. The Core-2 Duo had a feature size of 45 nm in
2008.
 Manufacturers introduce a new process generation
known as a technology node every 2–3 years with a ~30%
smaller feature
Figure: Process Generations
Moore’s Law
• In 1965, Gordon Moore observed that plotting the number of transistors that can be
economically manufactured on chip gives a straight line on a semilogarithmic scale.
• At the time, he found transistor count doubling every 18 months.
• This observation is called Moore’s Law .
• Moore’s Law is driven primarily by scaling down the size of transistors and, to a
minor extent, by building larger chips.
• In 1947, John Bardeen and Walter
Brattain built the first functioning
point contact transistor at Bell
Laboratories, shown in Figure (left)
(won Noble Prize in 1956)
• Ten years later, Jack Kilby at Texas
Instruments realized the potential
for miniaturization. Figure (right)
shows his first prototype of an
integrated circuit, constructed from
a germanium slice and gold wires.
(won Noble Prize in 2000)
History and Trend
History and Trend
• In 1958, Jack Kilby built the first integrated circuit with two
transistors at Texas Instruments.
• In 2008, Intel’s microprocessor contained more than 2 billion
transistors and a 16 GB Flash memory contained more than 4
billion transistors.
• This corresponds to a compound annual growth rate of 53% over
50 years.
• No other technology in history has sustained such a high growth
rate lasting for so long.
This incredible growth has come from
steady miniaturization of transistors and
improvements in manufacturing processes.
Transistor
•Transistors can be viewed as electrically controlled switches with a
control terminal and two other terminals that are connected or
disconnected depending on the voltage or current applied to the
control.
•Bipolar transistors require a small current into the control (base)
terminal to switch much larger currents between the other two
(emitter and collector) terminals.
•The quiescent power dissipated by these base currents, drawn even
when the circuit is not switching, limits the maximum number of
transistors that can be integrated onto a single die.
Bipolar Transistors
MOSFETs
The original idea of FET dated back to the German scientist Julius Lilienfield in
1925 [US patent 1,745,175] and a structure closely resembling the MOSFET
was proposed in 1935 by Oskar Heil [British patent 439,457], but materials
problems foiled early attempts to make functioning devices.
By the 1960s, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)
began to enter production.
MOSFETs offer the compelling advantage that they draw almost zero control
current while idle.
Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)
Key Developments
In 1963, Frank Wanlass at Fairchild described the first logic gates using
MOSFETs [Wanlass63].
Fairchild’s gates used both nMOS and pMOS transistors, earning the
name Complementary Metal Oxide Semiconductor, or CMOS.
The circuits used discrete MOSFET’s but consumed only nanowatts of
power, six orders of magnitude less than their bipolar counterparts.
With the development of the silicon planar process, MOS integrated
circuits became attractive for their low cost because the fabrication process
was simpler
Scale of Integration
• Small-scale integration (SSI) circuits: such as the 7404 inverter, have fewer
than 10 gates, with roughly half a dozen transistors per gate.
• Medium-scale integration (MSI) circuits, such as the 74161 counter, have
up to 1000 gates.
• Large-scale integration (LSI) circuits, such as simple 8-bit
microprocessors, have up to 10,000 gates.
• Very Large-Scale Integration (VLSI) Circuits: It soon became apparent that
new names would have to be created every five years if this naming trend
continued and thus the term Very Large-Scale Integration (VLSI) is used to
describe most integrated circuits from the 1980s onward.
• VLSI Design Flow
Application Specific Integrated Circuit (ASIC)
An application-specific integrated circuit (ASIC) is a microchip
designed for a special application, such as a kind of transmission
protocol or a hand-held computer.
ASICs can broadly be classified as:
1. Full Custom ASIC
2. Gate Array ASIC
Application-Specific Integrated Circuit
Full Custom
Design
• The ASIC vendor does not prefabricate
any components on the silicon and does
not provide any libraries of predefined
logic gates and functions.
• By means of appropriate tools, the
engineers can handcraft the dimensions
of individual transistors and then create
higher-level functions based on these
elements.
• For example, if the engineers require a
slightly faster logic gate, they can alter
the dimensions of the transistors used to
build that gate.
• The design of full-custom devices is
complex and time-consuming, but the
resulting chips contain the maximum
amount of logic with minimal waste of
silicon real estate.
• Gate arrays are based on the idea of a basic cell consisting of a collection
of unconnected transistors and resistors, primitive gates, multiplexers, and
registers that can be used by the design engineers.
• The ASIC vendor commences by prefabricating silicon chips containing
arrays of these basic cells.
• Interconnectivity have to be defined.
Figure: Gate Array IC
Figure: Basic Cell of Gate Array
Gate Array/sea-of-gates or sea-of-cells
VLSI Trends.pptx

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VLSI Trends.pptx

  • 1. MOSFET: History, Trends and Structure References Weste: Introduction Kang: MOS System
  • 2. • It is a well-known premise in engineering that the conception of a complex construction • without a prior understanding of the underlying building blocks is a sure road to failure. • This surely holds for digital circuit design as well
  • 3. Introduction • It is a well-known premise in engineering that the conception of a complex construction without a prior understanding of the underlying building blocks is a sure road to failure. • This surely holds for digital circuit design as well
  • 4. • The basic building blocks in today’s digital circuits are the silicon semiconductor devices, more specifically the MOS transistors and to a lesser degree the parasitic diodes, and the interconnect wires. • The role of the semiconductor devices has been appreciated for a long time in the world of digital integrated circuits. On the other hand, interconnect wires have only recently started to play a dominant role as a result of the advanced scaling of the semiconductor technology.
  • 5. Feature Size/Technology Node The feature size of a CMOS manufacturing process refers to the minimum dimension of a transistor (channel length) that can be reliably built. The 4004 processor had a feature size of 10 µm in 1971. The Core-2 Duo had a feature size of 45 nm in 2008.  Manufacturers introduce a new process generation known as a technology node every 2–3 years with a ~30% smaller feature
  • 7. Moore’s Law • In 1965, Gordon Moore observed that plotting the number of transistors that can be economically manufactured on chip gives a straight line on a semilogarithmic scale. • At the time, he found transistor count doubling every 18 months. • This observation is called Moore’s Law . • Moore’s Law is driven primarily by scaling down the size of transistors and, to a minor extent, by building larger chips.
  • 8. • In 1947, John Bardeen and Walter Brattain built the first functioning point contact transistor at Bell Laboratories, shown in Figure (left) (won Noble Prize in 1956) • Ten years later, Jack Kilby at Texas Instruments realized the potential for miniaturization. Figure (right) shows his first prototype of an integrated circuit, constructed from a germanium slice and gold wires. (won Noble Prize in 2000) History and Trend
  • 9. History and Trend • In 1958, Jack Kilby built the first integrated circuit with two transistors at Texas Instruments. • In 2008, Intel’s microprocessor contained more than 2 billion transistors and a 16 GB Flash memory contained more than 4 billion transistors. • This corresponds to a compound annual growth rate of 53% over 50 years. • No other technology in history has sustained such a high growth rate lasting for so long. This incredible growth has come from steady miniaturization of transistors and improvements in manufacturing processes.
  • 10. Transistor •Transistors can be viewed as electrically controlled switches with a control terminal and two other terminals that are connected or disconnected depending on the voltage or current applied to the control. •Bipolar transistors require a small current into the control (base) terminal to switch much larger currents between the other two (emitter and collector) terminals. •The quiescent power dissipated by these base currents, drawn even when the circuit is not switching, limits the maximum number of transistors that can be integrated onto a single die. Bipolar Transistors
  • 11. MOSFETs The original idea of FET dated back to the German scientist Julius Lilienfield in 1925 [US patent 1,745,175] and a structure closely resembling the MOSFET was proposed in 1935 by Oskar Heil [British patent 439,457], but materials problems foiled early attempts to make functioning devices. By the 1960s, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) began to enter production. MOSFETs offer the compelling advantage that they draw almost zero control current while idle. Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)
  • 12. Key Developments In 1963, Frank Wanlass at Fairchild described the first logic gates using MOSFETs [Wanlass63]. Fairchild’s gates used both nMOS and pMOS transistors, earning the name Complementary Metal Oxide Semiconductor, or CMOS. The circuits used discrete MOSFET’s but consumed only nanowatts of power, six orders of magnitude less than their bipolar counterparts. With the development of the silicon planar process, MOS integrated circuits became attractive for their low cost because the fabrication process was simpler
  • 13. Scale of Integration • Small-scale integration (SSI) circuits: such as the 7404 inverter, have fewer than 10 gates, with roughly half a dozen transistors per gate. • Medium-scale integration (MSI) circuits, such as the 74161 counter, have up to 1000 gates. • Large-scale integration (LSI) circuits, such as simple 8-bit microprocessors, have up to 10,000 gates. • Very Large-Scale Integration (VLSI) Circuits: It soon became apparent that new names would have to be created every five years if this naming trend continued and thus the term Very Large-Scale Integration (VLSI) is used to describe most integrated circuits from the 1980s onward.
  • 15. Application Specific Integrated Circuit (ASIC) An application-specific integrated circuit (ASIC) is a microchip designed for a special application, such as a kind of transmission protocol or a hand-held computer. ASICs can broadly be classified as: 1. Full Custom ASIC 2. Gate Array ASIC Application-Specific Integrated Circuit
  • 16. Full Custom Design • The ASIC vendor does not prefabricate any components on the silicon and does not provide any libraries of predefined logic gates and functions. • By means of appropriate tools, the engineers can handcraft the dimensions of individual transistors and then create higher-level functions based on these elements. • For example, if the engineers require a slightly faster logic gate, they can alter the dimensions of the transistors used to build that gate. • The design of full-custom devices is complex and time-consuming, but the resulting chips contain the maximum amount of logic with minimal waste of silicon real estate.
  • 17. • Gate arrays are based on the idea of a basic cell consisting of a collection of unconnected transistors and resistors, primitive gates, multiplexers, and registers that can be used by the design engineers. • The ASIC vendor commences by prefabricating silicon chips containing arrays of these basic cells. • Interconnectivity have to be defined. Figure: Gate Array IC Figure: Basic Cell of Gate Array Gate Array/sea-of-gates or sea-of-cells