This module implements a 4-bit binary up/down counter that increments or decrements on each clock pulse depending on the value of the UpOrDown input. It uses a D-flip flop to store the count value, which is reset to 0 when the reset input is asserted. The count is incremented if UpOrDown is 1, otherwise it is decremented, wrapping from 15 to 0 or 0 to 15 accordingly.

1. Code:
module BCDUPDOWN(Clk, reset, UpOrDown, Count ); // module Declaration
// input and output declarations
input Clk,reset,UpOrDown;
output [3 : 0] Count;
reg [3 : 0] Count = 0;
always @(posedge(Clk),UpOrDown)
begin
if(reset == 1)
Count <= 0;
else
begin
if(UpOrDown == 1) // High for Up Counter and Low for Down Counter
begin
if(Count == 15)
Count <= 0;
else
Count <= Count + 1;
end
else
begin
if(Count == 0)
Count <= 15;
else
Count <= Count - 1;
end
end
end
endmodule

2. Output:

3. RTL schematic:
Hardware: