sc_vector
Learn in 2 minutes
Why?
Ever wondered if it is possible to create a series of port,
export, modules or any object of other type.
Well, sc_vector to rescue and save your time.
Systemc has a class sc_vector which provide member function
for picking out elements of vector and port binding.
What?
sc_vector<T> where T is a type derived from sc_object
The size of vector can be set only once when the vector is
constructed or using a call to member function init()
Vector cannot be resized dynamically
Two ways of setting size of vector
sc_vector<sc_port<i_f>> ports;
sc_vector<sc_signal<bool>> signals;
SC_CTOR(my_module): ports(“my_ports”,4)
{
signals.init(8);
}
When? & where?- Port binding
sc_vector<sc_inout<int> > port_type;
sc_vector<sc_signal<int> > signal_type;
struct M: sc_module {
port_type ports;
M(sc_module_name name, int N): ports(“my_ports”,N){}
};
struct Top: sc_module {
signal_type sigs;
M *m1, *m2;
Top(sc_mdoule_name name), sigs(“sigs”,4){
M1 = new M(“m1”,4);
M2 = new M(“m2”,4);
port_type::iterator it;
it = m1->port.bind(sigs); // Bind all 4 element of vector
port to all 4 element of vector sigs

sc vector

  • 1.
  • 2.
    Why? Ever wondered ifit is possible to create a series of port, export, modules or any object of other type. Well, sc_vector to rescue and save your time. Systemc has a class sc_vector which provide member function for picking out elements of vector and port binding.
  • 3.
    What? sc_vector<T> where Tis a type derived from sc_object The size of vector can be set only once when the vector is constructed or using a call to member function init() Vector cannot be resized dynamically
  • 4.
    Two ways ofsetting size of vector sc_vector<sc_port<i_f>> ports; sc_vector<sc_signal<bool>> signals; SC_CTOR(my_module): ports(“my_ports”,4) { signals.init(8); }
  • 5.
    When? & where?-Port binding sc_vector<sc_inout<int> > port_type; sc_vector<sc_signal<int> > signal_type; struct M: sc_module { port_type ports; M(sc_module_name name, int N): ports(“my_ports”,N){} };
  • 6.
    struct Top: sc_module{ signal_type sigs; M *m1, *m2; Top(sc_mdoule_name name), sigs(“sigs”,4){ M1 = new M(“m1”,4); M2 = new M(“m2”,4); port_type::iterator it; it = m1->port.bind(sigs); // Bind all 4 element of vector port to all 4 element of vector sigs