1. Maths is not everything
Embedded Systems
5 - Development of microprocessor-based systems
Architectures and components
Debugging
Manufacturing Testing
RMR©2012
Example

2. Maths is not everything
Development of Microprocessor-based Systems
Architectures and Components
RMR©2012

3. Software architecture
Functional description must be broken into
pieces:
division among people;
conceptual organization;
Maths is not everything
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© 2008 Wayne Wolf
performance;
testability;
maintenance.

4. Hardware and software architectures
Hardware and software are intimately
related:
software doesn’t run without hardware;
Maths is not everything
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© 2008 Wayne Wolf
how much hardware you need is
determined by the software
requirements:
speed;
memory.

5. Software components
Need to break the design up into pieces
to be able to write the code.
Maths is not everything
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© 2008 Wayne Wolf
Some component designs come up often.
A design pattern is a generic description
of a component that can be customized
and used in different circumstances.

6. Software state machine
State machine keeps internal state as a
variable, changes state based on inputs.
Uses:
control-dominated code;
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reactive systems.

7. State machine specification
A
in1=1/x=a
B
r=0/out2=1
r=1/out1=0
in1=0/x=b
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s=0/out1=0
C
D
s=1/out1=1

8. C code structure
Current state is kept in a variable.
State table is implemented as a switch.
Cases define states.
Maths is not everything
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States can test inputs.
Switch is repeatedly evaluated in a while
loop.

9. Software design techniques
Want to develop as much code as possible
on a standard platform:
friendlier programming environment;
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easier debugging.
May need to devise software stubs to
allow testing of software elements
without the full hardware/software
platform.

10. Host/target design
Use a host system to prepare software
for target system:
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target
system
host system
serial line

11. Host-based tools
Cross compiler:
compiles code on host for target system.
Cross debugger:
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displays target state, allows target system to
be controlled.

12. Evaluation boards
Designed by CPU manufacturer or others.
Includes CPU, memory, some I/O devices.
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© 2008 Wayne Wolf
May include prototyping section.
CPU manufacturer often gives out
evaluation board netlist---can be used as
starting point for your custom board
design.

13. Adding logic to a board
Programmable logic devices (PLDs) provide
low/medium density logic.
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Field-programmable gate arrays (FPGAs)
provide more logic and multi-level logic.
Application-specific integrated circuits
(ASICs) are manufactured for a single
purpose.

14. The PC as a platform
Advantages:
cheap and easy to get;
rich and familiar software environment.
Disadvantages:
Maths is not everything
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© 2008 Wayne Wolf
requires a lot of hardware resources;
not well-adapted to real-time.

15. Maths is not everything
Development of Microprocessor-based Systems
Debugging Embedded Systems
RMR©2012

16. Debugging embedded systems
Challenges:
target system may be hard to observe;
target may be hard to control;
may be hard to generate realistic inputs;
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setup sequence may be complex.

17. Software debuggers
A monitor program residing on the target
provides basic debugger functions.
Maths is not everything
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© 2008 Wayne Wolf
Debugger should have a minimal footprint
in memory.
User program must be careful not to
destroy debugger program, but , should
be able to recover from some damage
caused by user code.

18. Breakpoints
A breakpoint allows the user to stop
execution, examine system state, and
change state.
Maths is not everything
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© 2008 Wayne Wolf
Replace the breakpointed instruction with
a subroutine call to the monitor program.

19. ARM breakpoints
0x400 MUL r4,r6,r6
0x400
0x404 ADD r2,r2,r4 0x404
0x408 ADD r0,r0,#1 0x408
0x40c
0x40c B loop
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uninstrumented code
MUL r4,r6,r6
ADD r2,r2,r4
ADD r0,r0,#1
BL bkpoint
code with breakpoint

20. Breakpoint handler actions
Save registers.
Allow user to examine machine.
Before returning, restore system state.
Maths is not everything
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© 2008 Wayne Wolf
Safest way to execute the instruction is to
replace it and execute in place.
Put another breakpoint after the replaced
breakpoint to allow restoring the original
breakpoint.

21. In-circuit emulators
A microprocessor in-circuit emulator is a
specially-instrumented microprocessor.
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Allows you to stop execution, examine
CPU state, modify registers.

22. Logic analyzers
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A logic analyzer is an array of low-grade
oscilloscopes:

23. Logic analyzer architecture
sample
memory
UUT
system clock
microprocessor
vector
address
controller
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© 2008 Wayne Wolf
clock
gen
state or
timing mode
keypad
- Checking memory (e.g. cache misses) or I/O access
- Checking execution time (marks needed)
display

24. How to exercise code
Run on host system.
Run on target system.
Hardware/Software verification
Run in instruction-level simulator.
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Run on cycle-accurate simulator (e.g. SoC).
Run in hardware/software co-simulation
environment.

25. Maths is not everything
Development of Microprocessor-based Systems
Manufacturing
RMR©2012

26. Manufacturing testing
Goal: ensure that manufacturing produces
defect-free copies of the design.
Can test by comparing unit being tested
to the expected behavior.
But running tests is expensive.
Maths is not everything
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© 2008 Wayne Wolf
Maximize confidence while minimizing
testing cost.
Design for testability
take manufacturing test into account during design

27. Testing concepts
Yield: proportion of manufactured
systems that work.
Proper manufacturing maximizes yield.
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© 2008 Wayne Wolf
Proper testing accurately estimates yield.
Field return: defective unit that leaves
the factory.

28. Faults
Manufacturing problems can be caused by
many things.
Fault model: model that predicts effects
of a particular type of fault.
Maths is not everything
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© 2008 Wayne Wolf
Fault coverage: proportion of possible
faults found by a set of test.
Having a fault model allows us to determine fault
coverage.

29. Software vs. hardware testing
When testing code, we have no fault
model.
We verify the implementation, not the manufacturing.
Maths is not everything
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© 2008 Wayne Wolf
Simple tests (e.g., Error Correcting Codes) work well
to verify software manufacturing.
Hardware requires manufacturing tests in
addition to implementation verification.

30. Hardware fault models
Stuck-at 0/1 fault model:
output of gate is always 0/1.
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01
0

31. Combinational testing
Every gate can be stuck-at-0, stuck-at-1.
Usually test for single stuck-at-x faults
One fault at a time.
Multiple faults can mask each other.
We can generate a test for a gate by:
controlling the gate’s input;
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© 2008 Wayne Wolf
observing the gate’s output through other gates.

32. Sequential testing
A state machine is combinational logic +
registers.
Sequential testing is considerably harder.
Maths is not everything
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© 2008 Wayne Wolf
A single stuck-at fault affects the machine on every
cycle.
Fault behavior on one cycle can be masked by same
fault on other cycles.

33. Scan chains
A scannable register operates in two
modes:
normal;
scan---forms an element in a shift register.
Maths is not everything
RMR©2012
© 2008 Wayne Wolf
Using scan chains reduces sequential
testing to combinational testing.
Unloading/unloading scan chain is slow.
May use partial scan.

34. Test generation
Automatic test pattern generation
(ATPG) programs: produce a set of tests
given the logic structure.
Maths is not everything
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© 2008 Wayne Wolf
Some faults may not be testable--redundant.
redundancy may have been added for avoiding glitches
Timeout on a fault may mean hard-to-test or
untestable.

35. Boundary scan
Simplifies testing of multiple chips on a
board.
Registers on pins can be configured as a scan
chain (JTAG standard interface)
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Test Access Port

36. JTAG
Also used as an OCDM interface
e.g. MSP430 responds to various commands sent over
JTAG:
Set watchpoint and breakpoint triggers
Poll CPU status (e.g., if halted at a breakpoint)
Maths is not everything
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Poll the state-storage buffer (for information
stored at watchpoint trigger)
Poll the program counter (PC)

37. Maths is not everything
Development of Microprocessor-based Systems
Example
Designing an Alarm Clock
RMR©2012

38. Alarm clock interface
Alarm on
Alarm off
buzzer
PM
Alarm
ready
light
Maths is not everything
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© 2008 Wayne Wolf
set
time
set
alarm
hour minute
button

39. Operations
Set time: hold set time, depress hour,
minute.
Set alarm time: hold set alarm, depress
hour, minute.
Maths is not everything
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© 2008 Wayne Wolf
Turn alarm on/off: depress alarm on/off.

40. Maths is not everything
RMR©2012
© 2008 Wayne Wolf
Alarm clock requirements

41. Alarm clock class diagram
1
Lights*
1
Display
1
1
1
1
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© 2008 Wayne Wolf
Buttons*
Speaker*
1
Mechanism
1

42. Alarm clock physical classes
RMR©2012
Speaker*
digit-val()
digit-scan()
alarm-on-light()
PM-light()
Maths is not everything
Buttons*
set-time(): boolean
set-alarm(): boolean
alarm-on(): boolean
alarm-off(): boolean
minute(): boolean
hour(): boolean
buzz()
© 2008 Wayne Wolf
Lights*

43. Display class
Display
Maths is not everything
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© 2008 Wayne Wolf
time[4]: integer
alarm-indicator: boolean
PM-indicator: boolean
set-time()
alarm-light-on()
alarm-light-off()
PM-light-on()
PM-light-off()

44. Mechanism class
Mechanism
Maths is not everything
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© 2008 Wayne Wolf
Seconds: integer
PM: boolean
tens-hours, ones-hours: integer
tens-minutes, ones-minutes: integer
alarm-ready: boolean
alarm-tens-hours, alarm-ones-hours:
integer
alarm-tens-minutes, alarm-ones-minutes:
integer
scan-keyboard()
update-time()

45. Update-time behavior
update seconds
with rollover
Rollover?
display.set-time(current time)
F
Time >= alarm and alarm-on?
T
T
update hh:mm
with rollover
Maths is not everything
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© 2008 Wayne Wolf
alarm.buzzer(true)
AM->PM
PM=true
PM->AM
PM=false
F

46. Scan-keyboard behavior
compute button activations
alarm-ready=
true
Set-time and not
set-alarm and hours
Alarm-on
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© 2008 Wayne Wolf
Alarm-off
alarm-ready=
false
alarm.buzzer(false)
Set-time and not setalarm and minutes
save button
states
only one
activation
Increment time
tens w. rollover
and AM/PM
Increment time
ones w. rollover
and AM/PM

47. System architecture
Includes:
periodic behavior (clock);
aperiodic behavior (buttons, buzzer activation).
Two major software components:
Maths is not everything
RMR©2012
© 2008 Wayne Wolf
interrupt-driven routine updates time;
foreground program deals with buttons, commands.

48. Interrupt-driven routine
Timer probably can’t handle one-minute
interrupt interval.
Maths is not everything
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© 2008 Wayne Wolf
Use software variable to convert
interrupt frequency to seconds.

49. Foreground program
Operates as while loop:
while (TRUE) {
read_buttons(button_values);
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© 2008 Wayne Wolf
process_command(button_values);
check_alarm();
}

50. Testing
Component testing:
test interrupt code on the platform;
can test foreground program using a mock-up.
System testing:
Maths is not everything
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© 2008 Wayne Wolf
relatively few components to integrate;
check clock accuracy;
check recognition of buttons, buzzer, etc.