8. QPSK Signal Generation and Detection
• The QPSK transmitter may be viewed as two binary PSK
generators that work in parallel, each at a bit rate equal
to one-half the bit rate of the original binary sequence at
the QPSK transmitter input.
• QPSK transmitter has a block named De-multiplexer, it is
used divide the incoming binary sequence to odd
numbered bit-sequence and even numbered bit-
sequence.
• Figure 7.18a shows the block diagram of QPSK
transmitter and 7.18b shows coherent QPSK receiver.
9.
10.
11. • It can be observed that the QPSK receiver is structured
in the form of an in-phase path and quadrature phase
path working in parallel.
• The QPSK receiver has the following blocks:
1. Pair of Correlators, which have common input x(t).
The correlators are supplied with a pair of locally
generated orthonormal basis functions, which means
TX and Rx are synchronized. The correlator outputs
are x1 and x2.
2. Pair of decision devices, which act on the correlator
outputs x1 and x2 by comparing each one with a zero
threshold. For in-phase channel;
1. If x1 > 0 – decision is made in favor of symbol 1
2. If x1 < 0 – decision is made in favor of symbol 0
12. • Similar binary decisions are made for the
quadrature channel. Finally,
3. Multiplexer, combines the two binary
sequences produced by the pair of decision
devices. The resulting binary sequence is the
estimate of the original binary sequence
transmitted.