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Computer Architecture
Mr.Mohan Shrikant Sonale
SITCOE,Yadrav
Learning Outcomes:
 Identify, understand and apply different number systems and
codes.
 Understand the digital representation of data in a computer
system.
Processor Organization
Improvements in Chip Organization and Architecture
As designers with the challenge of balancing processor
performance with that of main memory and other computer
components, the need to increase processor speed remains. There are
three approaches to achieving increased processor speed:
• Increase the hardware speed of the processor. With gates closer
together, the propagation time for signals is significantly reduced,
enabling a speeding up of the processor. An increase in clock rate
means that individual operations are executed more rapidly.
• Increase the size and speed of caches that are interposed between
the processor and main memory.
• Make changes to the processor organization and architecture that
increase the effective speed of instruction execution. Typically, this
involves using parallelism in one form or another.
To understand the organization of the processor, let us consider the
requirements placed on the processor, the things that it must do:
 Fetch instruction: The processor reads an instruction from memory (register,
cache, main memory).
 Interpret instruction: The instruction is decoded to determine what action is
required.
 Fetch data: The execution of an instruction may require reading data from
memory or an I/O module.
 Process data: The execution of an instruction may require performing some
arithmetic or logical operation on data.
 Write data: The results of an execution may require writing data to memory
or an I/O module.
Integer Representation
In the binary number system, arbitrary numbers can be represented with just
the digits zero and one, the minus sign, and the period, or radix point.
 Bit: Binary digit
 Only have 0 & 1 to represent everything
For purposes of computer storage and processing, however, we do not
have the benefit of minus signs and periods. Only binary digits (0 and 1)
may be used to represent numbers. If we are limited to nonnegative
integers, the representation is straightforward.
 Numbers stored in binary
 NO minus sign for negative numbers
 No period
 Range of Numbers
 Negative Numbers
 Sign -magnitude
 2’s Complement
Size of Data
SIZE BINARY DECIMAL HEXA
8 0000 0000
1111 1111
0 to 255 00 to FF
12 0000 0000 0000
1111 1111 1111
0 to 4095 000 to FFF
16 0000 0000 0000 0000
1111 1111 1111 1111
0 to (2^16-1) 0000 to FFFF
20 0000 0000 0000 0000 0000
1111 1111 1111 1111 1111
0 to (2^20-1) 00000 to FFFFF
32 0000 …………………………. 0000
1111 …………………………. 1111
0 to (2^32-1) 00000000 to
FFFFFFF
 8-Bit Number
 256 different bit patterns
Positive Number Negative Number
0 255 127 0 127
Negative Positive
Sign Magnitude
 0- means positive
 1 – means negative
 +18 = 00010010
 -18 = 10010010
 Problems
Need to consider both sign and magnitude in arithmetic
Two representation of Zero(+0 & -0)
1-bit 7-bit
MagnitudeS
Two’s Complement
 +3 = 0000 0011
 +2 = 0000 0010
 +1 = 0000 0001
 +0 = 0000 0000
 -1 = 1111 1111
 -2 = 1111 1110
 -3 = 1111 1101
255 : -1 0
254 : -2 1 : 1
253 : -3 2 : 2
252 : -4 3 : 3
Note :- Explain the term related with +3 and its Two’s coplement
Range of Numbers
8-bit numbers 2s complement
+127 = 01111111 = 2^7-1
-128 = 10000000 = -2^7
16-bit numbers 2s complement
+32767 = 01111111 11111111
-32768 = 10000000 00000000
4 bit numbers
4 bit numbers in 2s complement
Decimal Binary Decimal Binary
0 0000
1 0001 -1 1111
2 0010 -2 1110
3 0011 -3 1101
4 0100 -4 1100
5 0101 -5 1011
6 0110 -6 1011
7 0111 -7 1001
-8 1000

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Process.org

  • 2. Learning Outcomes:  Identify, understand and apply different number systems and codes.  Understand the digital representation of data in a computer system.
  • 3. Processor Organization Improvements in Chip Organization and Architecture As designers with the challenge of balancing processor performance with that of main memory and other computer components, the need to increase processor speed remains. There are three approaches to achieving increased processor speed: • Increase the hardware speed of the processor. With gates closer together, the propagation time for signals is significantly reduced, enabling a speeding up of the processor. An increase in clock rate means that individual operations are executed more rapidly. • Increase the size and speed of caches that are interposed between the processor and main memory. • Make changes to the processor organization and architecture that increase the effective speed of instruction execution. Typically, this involves using parallelism in one form or another.
  • 4. To understand the organization of the processor, let us consider the requirements placed on the processor, the things that it must do:  Fetch instruction: The processor reads an instruction from memory (register, cache, main memory).  Interpret instruction: The instruction is decoded to determine what action is required.  Fetch data: The execution of an instruction may require reading data from memory or an I/O module.  Process data: The execution of an instruction may require performing some arithmetic or logical operation on data.  Write data: The results of an execution may require writing data to memory or an I/O module.
  • 5. Integer Representation In the binary number system, arbitrary numbers can be represented with just the digits zero and one, the minus sign, and the period, or radix point.  Bit: Binary digit  Only have 0 & 1 to represent everything For purposes of computer storage and processing, however, we do not have the benefit of minus signs and periods. Only binary digits (0 and 1) may be used to represent numbers. If we are limited to nonnegative integers, the representation is straightforward.  Numbers stored in binary  NO minus sign for negative numbers  No period  Range of Numbers  Negative Numbers  Sign -magnitude  2’s Complement
  • 6. Size of Data SIZE BINARY DECIMAL HEXA 8 0000 0000 1111 1111 0 to 255 00 to FF 12 0000 0000 0000 1111 1111 1111 0 to 4095 000 to FFF 16 0000 0000 0000 0000 1111 1111 1111 1111 0 to (2^16-1) 0000 to FFFF 20 0000 0000 0000 0000 0000 1111 1111 1111 1111 1111 0 to (2^20-1) 00000 to FFFFF 32 0000 …………………………. 0000 1111 …………………………. 1111 0 to (2^32-1) 00000000 to FFFFFFF
  • 7.  8-Bit Number  256 different bit patterns Positive Number Negative Number 0 255 127 0 127 Negative Positive
  • 8. Sign Magnitude  0- means positive  1 – means negative  +18 = 00010010  -18 = 10010010  Problems Need to consider both sign and magnitude in arithmetic Two representation of Zero(+0 & -0) 1-bit 7-bit MagnitudeS
  • 9. Two’s Complement  +3 = 0000 0011  +2 = 0000 0010  +1 = 0000 0001  +0 = 0000 0000  -1 = 1111 1111  -2 = 1111 1110  -3 = 1111 1101 255 : -1 0 254 : -2 1 : 1 253 : -3 2 : 2 252 : -4 3 : 3 Note :- Explain the term related with +3 and its Two’s coplement
  • 10. Range of Numbers 8-bit numbers 2s complement +127 = 01111111 = 2^7-1 -128 = 10000000 = -2^7 16-bit numbers 2s complement +32767 = 01111111 11111111 -32768 = 10000000 00000000
  • 11. 4 bit numbers 4 bit numbers in 2s complement Decimal Binary Decimal Binary 0 0000 1 0001 -1 1111 2 0010 -2 1110 3 0011 -3 1101 4 0100 -4 1100 5 0101 -5 1011 6 0110 -6 1011 7 0111 -7 1001 -8 1000