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Course :- Microprocessor
Unit :- Programming with 8085
Topic:- Assembly Language Programming Basics
Prepared By
Mr Kupade K A
Assist Prof ETC Dept.
SITCOE, Yadrav.
Assembly Language programming Basics.
Assembly language Programming
Assembly language is a low-level programming language for a
computer or other programmable device specific to a particular
computer architecture in contrast to most high-level
programming languages, which are generally portable across
multiple systems. Assembly language is converted into
executable machine code by a utility program referred to as an
assembler like NASM, MASM, etc.
Assembly Language programming Basics.
What is Assembly Language?
Each personal computer has a microprocessor that manages the computer's
arithmetical, logical, and control activities.
Each family of processors has its own set of instructions for handling various operations
such as getting input from keyboard, displaying information on screen and performing
various other jobs. These set of instructions are called 'machine language instructions'.
A processor understands only machine language instructions, which are strings of 1's
and 0's. However, machine language is too obscure and complex for using in software
development. So, the low-level assembly language is designed for a specific family of
processors that represents various instructions in symbolic code and a more
understandable form.
Assembly Language programming Basics.
Basic Features of PC Hardware
The main internal hardware of a PC consists of processor, memory, and registers. Registers are
processor components that hold data and address. To execute a program, the system copies it from
the external device into the internal memory. The processor executes the program instructions.
The fundamental unit of computer storage is a bit; it could be ON (1) or OFF (0) and a group of 8
related bits makes a byte on most of the modern computers.
The processor supports the following data sizes βˆ’
Word: a 2-byte data item
Double word: a 4-byte (32 bit) data item
Quad word: an 8-byte (64 bit) data item
Paragraph: a 16-byte (128 bit) area
Kilobyte: 1024 bytes
Megabyte: 1,048,576 bytes
Assembly Language programming Basics.
Binary Number System
Every number system uses positional notation, i.e., each position in which a digit is
written has a different positional value. Each position is power of the base, which is 2 for
binary number system, and these powers begin at 0 and increase by 1.
The following table shows the positional values for an 8-bit binary number, where all bits
are set ON.
The value of a binary number is based on the presence of 1 bits and their positional
value. So, the value of a given binary number is βˆ’
1 + 2 + 4 + 8 +16 + 32 + 64 + 128 = 255
which is same as 28 - 1.
Bit value 1 1 1 1 1 1 1 1
Position value as a power of
base 2
128 64 32 16 8 4 2 1
Bit number 7 6 5 4 3 2 1 0
Assembly Language programming Basics.
Hexadecimal Number System
Hexadecimal number system uses base 16. The digits in this system range from
0 to 15. By convention, the letters A through F is used to represent the
hexadecimal digits corresponding to decimal values 10 through 15.
Hexadecimal numbers in computing is used for abbreviating lengthy binary
representations. Basically, hexadecimal number system represents a binary data
by dividing each byte in half and expressing the value of each half-byte.
Assembly Language programming Basics.
Decimal number Binary representation Hexadecimal representation
0 0 0
1 1 1
2 10 2
3 11 3
4 100 4
5 101 5
6 110 6
7 111 7
8 1000 8
9 1001 9
10 1010 A
11 1011 B
12 1100 C
13 1101 D
14 1110 E
15 1111 F
Assembly Language programming Basics.
To convert a binary number to its hexadecimal equivalent, break it into
groups of 4 consecutive groups each, starting from the right, and write those
groups over the corresponding digits of the hexadecimal number.
Example βˆ’ Binary number 1000 1100 1101 0001 is equivalent to
hexadecimal - 8CD1
To convert a hexadecimal number to binary, just write each hexadecimal digit
into its 4-digit binary equivalent.
Example βˆ’ Hexadecimal number FAD8 is equivalent to binary - 1111 1010
1101 1000
Assembly Language programming Basics.
Binary Arithmetic
The following table illustrates four simple rules for binary addition βˆ’
(i) (ii) (iii) (iv)
1
0 1 1 1
+0 +0 +1 +1
=0 =1 =10 =11
Rules (iii) and (iv) show
a carry of a 1-bit into
the next left position.
Decimal Binary
60 00111100
+42 00101010
102 01100110
A negative binary value is expressed
in two's complement notation. According
to this rule, to convert a binary number to
its negative value is to reverse its bit
values and add 1.
Number 53 00110101
Reverse the bits 11001010
Add 1 00000001
Number -53 11001011
To subtract one value from another, convert the number being
subtracted to two's complement format and add the numbers.
Assembly Language programming Basics.
Binary Arithmetic
The following table illustrates four simple rules for binary addition βˆ’
(i) (ii) (iii) (iv)
1
0 1 1 1
+0 +0 +1 +1
=0 =1 =10 =11
Rules (iii) and (iv) show
a carry of a 1-bit into
the next left position.
Decimal Binary
60 00111100
+42 00101010
102 01100110
A negative binary value is expressed
in two's complement notation. According
to this rule, to convert a binary number to
its negative value is to reverse its bit
values and add 1.
Number 53 00110101
Reverse the bits 11001010
Add 1 00000001
Number -53 11001011
To subtract one value from another, convert the number being
subtracted to two's complement format and add the numbers.
8085 Microprocessor Addressing Modes.
Addressing Modes in 8085
These are the instructions used to transfer the data from one register to another
register, from the memory to the register, and from the register to the memory without
any alteration in the content. Addressing modes in 8085 is classified into 5 groups βˆ’
Immediate addressing mode
In this mode, the 8/16-bit data is specified in the instruction itself as one of its operand.
For example: MVI K, 20F: means 20F is copied into register K.
Register addressing mode
In this mode, the data is copied from one register to another. For example: means
MOV K, B: means data in register B is copied to register K.
8085 Microprocessor Addressing Modes.
Addressing Modes in 8085
Direct addressing mode
In this mode, the data is directly copied from the given address to the
register.
For example: LDB 5000K: means the data at address 5000K is copied
to register B.
Indirect addressing mode
In this mode, the data is transferred from one register to another by
using the address pointed by the register. For example: address MOV
K, B: means data is transferred from the memory address pointed by
the register to the register K.
Implied addressing mode
This mode doesn’t require any operand; the data is specified by the
opcode itself. For example: CMP.
8085 Microprocessor Instruction Sets.
Control Instructions
Opcode Operand Meaning Explanation
NOP None No operation No operation is performed, i.e., the instruction is
fetched and decoded.
HLT None Halt and enter wait state The CPU finishes executing the current instruction
and stops further execution. An interrupt or reset is
necessary to exit from the halt state.
DI None Disable interrupts The interrupt enable flip-flop is reset and all the
interrupts are disabled except TRAP.
EI None Enable interrupts The interrupt enable flip-flop is set and all the
interrupts are enabled.
RIM None Read interrupt mask This instruction is used to read the status of
interrupts 7.5, 6.5, 5.5 and read serial data input bit.
SIM None Set interrupt mask This instruction is used to implement the interrupts
7.5, 6.5, 5.5, and serial data output.
Instruction sets are instruction codes to perform some task. It is classified into five categories
8085 Microprocessor Instruction Sets.
Logical Instructions
Opcode Operand Meaning Explanation
CMP
R
M
Compare the register or
memory with the accumulator
The contents of the operand (register or
memory) are M compared with the contents of
the accumulator.
CPI 8-bit data
Compare immediate with the
accumulator
The second byte data is compared with the
contents of the accumulator.
ANA
R
M
Logical AND register or
memory with the accumulator
The contents of the accumulator are logically
AND with M the contents of the register or
memory, and the result is placed in the
accumulator.
ANI 8-bit data
Logical AND immediate with
the accumulator
The contents of the accumulator are logically
AND with the 8-bit data and the result is placed
in the accumulator.
XRA
R
M
Exclusive OR register or
memory with the accumulator
The contents of the accumulator are Exclusive
OR with M the contents of the register or
memory, and the result is placed in the
accumulator.
8085 Microprocessor Instruction Sets.
Logical Instructions
Opcode Operand Meaning Explanation
XRI 8-bit data
Exclusive OR immediate with
the accumulator
The contents of the accumulator are Exclusive
OR with the 8-bit data and the result is placed in
the accumulator.
ORA
R
M
Logical OR register or
memory with the accumulator
The contents of the accumulator are logically OR
with M the contents of the register or memory,
and result is placed in the accumulator.
ORI 8-bit data
Logical OR immediate with
the accumulator
The contents of the accumulator are logically OR
with the 8-bit data and the result is placed in the
accumulator.
RLC None Rotate the accumulator left
Each binary bit of the accumulator is rotated left
by one position. Bit D7 is placed in the position
of D0 as well as in the Carry flag. CY is modified
according to bit D7.
RRC None Rotate the accumulator right
Each binary bit of the accumulator is rotated
right by one position. Bit D0 is placed in the
position of D7 as well as in the Carry flag. CY is
modified according to bit D0.
8085 Microprocessor Instruction Sets.
Logical Instructions
Opcode Operand Meaning Explanation
RAL None
Rotate the accumulator left
through carry
Each binary bit of the accumulator is rotated left
by one position through the Carry flag. Bit D7 is
placed in the Carry flag, and the Carry flag is
placed in the least significant position D0. CY is
modified according to bit D7.
RAR None
Rotate the accumulator right
through carry
Each binary bit of the accumulator is rotated right
by one position through the Carry flag. Bit D0 is
placed in the Carry flag, and the Carry flag is
placed in the most significant position D7. CY is
modified according to bit D0.
CMA None
Complement accumulator The contents of the accumulator are
complemented. No flags are affected.
CMC None
Complement carry The Carry flag is complemented. No other flags
are affected.
STC None Set Carry Set Carry
8085 Microprocessor Instruction Sets.
Branching Instructions
Opcode Operand Meaning Explanation
JMP
16-bit
address
Jump
uncondition
ally
The program sequence is
transferred to the memory
address given in the operand.
16-bit
address
Jump
conditionall
y
The program sequence is
transferred to the memory
address given in the operand
based on the specified flag of
the PSW.
Opcode Description Flag Status
JC Jump on Carry CY=1
JNC Jump on no Carry CY=0
JP Jump on positive S=0
JM Jump on minus S=1
JZ Jump on zero Z=1
JNZ Jump on no zero Z=0
JPE Jump on parity even P=1
JPO Jump on parity odd P=0
8085 Microprocessor Instruction Sets.
Branching Instructions
Opcode Operand Meaning Explanation
16-bit
address
Unconditional
subroutine call
The program sequence is
transferred to the memory
address given in the operand.
Before transferring, the address
of the next instruction after
CALL is pushed onto the stack.
RET None Return from
subroutine
unconditionally
The program sequence is
transferred from the subroutine
to the calling program.
Opcode Description Flag Status
CC Call on Carry CY=1
CNC Call on no Carry CY=0
CP Call on positive S=0
CM Call on minus S=1
CZ Call on zero Z=1
CNZ Call on no zero Z=0
CPE Call on parity even P=1
CPO Call on parity odd P=0
8085 Microprocessor Instruction Sets.
Branching Instructions
Opcode Operand Meaning Explanation
None
Return from
subroutine
conditionally
The program sequence is transferred
from the subroutine to the calling
program based on the specified flag of
the PSW and the program execution
begins at the new address.
PCHL None Load the
program
counter with
HL contents
The contents of registers H & L are copied
into the program counter. The contents of
H are placed as the high-order byte and
the contents of L as the low order byte.
Opcode Description Flag
Status
RC Return on Carry CY=1
RNC Return on no Carry CY=0
RP Return on positive S=0
RM Return on minus S=1
RZ Return on zero Z=1
RNZ Return on no zero Z=0
RPE Return on parity even P=1
RPO Return on parity odd P=0
8085 Microprocessor Instruction Sets.
Branching Instructions
Opcode Operand Meaning Explanation
RST 0-7 Restart The RST instruction is used as software instructions in a
program to transfer the program execution to one of the
following eight locations.
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
8085 Microprocessor Instruction Sets.
Branching Instructions
Opcode Operand Meaning Explanation
RST 0-7 Restart The 8085 has additionally 4 interrupts, which can generate
RST instructions internally and doesn’t require any external
hardware. Following are those instructions and their
Restart addresses βˆ’
Interrupt Restart Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
8085 Microprocessor Instruction Sets.
Arithmetic Instructions
Opcode Operand Meaning Explanation
ADD
R
M
Add register or memory, to
the accumulator
The contents of the register or memory are added to the
contents of the accumulator and the result is stored in the
accumulator.
Example βˆ’ ADD K.
ADC
R
M
Add register to the
accumulator with carry
The contents of the register or memory & M the Carry flag
are added to the contents of the accumulator and the result is
stored in the accumulator.
Example βˆ’ ADC K
ADI 8-bit data
Add the immediate to the
accumulator
The 8-bit data is added to the contents of the accumulator
and the result is stored in the accumulator.
Example βˆ’ ADI 55K
ACI 8-bit data
Add the immediate to the
accumulator with carry
The 8-bit data and the Carry flag are added to the contents of
the accumulator and the result is stored in the accumulator.
Example βˆ’ ACI 55K
LXI
Reg. pair,
16bit data
Load the register pair
immediate
The instruction stores 16-bit data into the register pair
designated in the operand.
Example βˆ’ LXI K, 3025M
DAD Reg. pair
Add the register pair to H
and L registers
The 16-bit data of the specified register pair are added to the
contents of the HL register.
Example βˆ’ DAD K
8085 Microprocessor Instruction Sets.
Arithmetic Instructions
Opcode Operand Meaning Explanation
SUB
R
M
Subtract the register or the
memory from the
accumulator
The contents of the register or the memory are subtracted
from the contents of the accumulator, and the result is stored
in the accumulator.
Example βˆ’ SUB K
SBB
R
M
Subtract the source and
borrow from the
accumulator
The contents of the register or the memory & M the Borrow
flag are subtracted from the contents of the accumulator and
the result is placed in the accumulator.
Example βˆ’ SBB K
SUI 8-bit data
Subtract the immediate from
the accumulator
The 8-bit data is subtracted from the contents of the
accumulator & the result is stored in the accumulator.
Example βˆ’ SUI 55K
XCHG None
Exchange H and L with D
and E
The contents of register H are exchanged with the contents
of register D, and the contents of register L are exchanged
with the contents of register E.
Example βˆ’ XCHG
INR
R
M
Increment the register or the
memory by 1
The contents of the designated register or the memory are
incremented by 1 and their result is stored at the same place.
Example βˆ’ INR K
8085 Microprocessor Instruction Sets.
Arithmetic Instructions
Opcode Operand Meaning Explanation
INX R Increment register pair by 1
The contents of the designated register pair are incremented
by 1 and their result is stored at the same place.
Example βˆ’ INX K
DCR
R
M
Decrement the register or
the memory by 1
The contents of the designated register or memory are
decremented by 1 and their result is stored at the same
place.
Example βˆ’ DCR K
DCX R
Decrement the register pair
by 1
The contents of the designated register pair are decremented
by 1 and their result is stored at the same place.
Example βˆ’ DCX K
DAA None Decimal adjust accumulator
The contents of the accumulator are changed from a binary
value to two 4-bit BCD digits.
If the value of the low-order 4-bits in the accumulator is
greater than 9 or if AC flag is set, the instruction adds 6 to the
low-order four bits.
If the value of the high-order 4-bits in the accumulator is
greater than 9 or if the Carry flag is set, the instruction adds 6
to the high-order four bits.
Example βˆ’ DAA
8085 Microprocessor Instruction Sets.
Data Transfer Instructions
Opcode Operand Meaning Explanation
MOV
Rd, Sc
M, Sc
Dt, M
Copy from the source (Sc) to the
destination(Dt)
This instruction copies the contents of the source
register into the destination register without any
alteration.
Example βˆ’ MOV K, L
MVI
Rd, data
M, data
Move immediate 8-bit
The 8-bit data is stored in the destination register or
memory.
Example βˆ’ MVI K, 55L
LDA
16-bit
address
Load the accumulator
The contents of a memory location, specified by a 16-
bit address in the operand, are copied to the
accumulator.
Example βˆ’ LDA 2034K
LDAX
B/D Reg.
pair
Load the accumulator indirect
The contents of the designated register pair point to a
memory location. This instruction copies the contents
of that memory location into the accumulator.
Example βˆ’ LDAX K
LXI
Reg. pair,
16-bit data
Load the register pair immediate
The instruction loads 16-bit data in the register pair
designated in the register or the memory.
Example βˆ’ LXI K, 3225L
8085 Microprocessor Instruction Sets.
Data Transfer Instructions
Opcode Operand Meaning Explanation
LHLD
16-bit
address
Load H and L registers direct
The instruction copies the contents of the memory
location pointed out by the address into register L and
copies the contents of the next memory location into
register H. Example βˆ’ LHLD 3225K
STA
16-bit
address
16-bit address
The contents of the accumulator are copied into the
memory location specified by the operand.
This is a 3-byte instruction, the second byte specifies
the low-order address and the third byte specifies the
high-order address. Example βˆ’ STA 325K
STAX
16-bit
address
Store the accumulator indirect
The contents of the accumulator are copied into the
memory location specified by the contents of the
operand. Example βˆ’ STAX K
SHLD
16-bit
address Store H and L registers direct
The contents of register L are stored in the memory
location specified by the 16-bit address in the operand
and the contents of H register are stored into the next
memory location by incrementing the operand.
This is a 3-byte instruction, the second byte specifies
the low-order address and the third byte specifies the
high-order address. Example βˆ’ SHLD 3225K
8085 Microprocessor Instruction Sets.
Data Transfer Instructions
Opcode Operand Meaning Explanation
XCHG None Exchange H and L with D and E
The contents of register H are exchanged with the
contents of register D, and the contents of register L
are exchanged with the contents of register E.
Example βˆ’ XCHG
SPHL None
Copy H and L registers to the stack
pointer
The instruction loads the contents of the H and L
registers into the stack pointer register. The contents of
the H register provide the high-order address and the
contents of the L register provide the low-order
address.
Example βˆ’ SPHL
XTHL None Exchange H and L with top of stack
The contents of the L register are exchanged with the
stack location pointed out by the contents of the stack
pointer register.
The contents of the H register are exchanged with the
next stack location (SP+1).
Example βˆ’ XTHL
8085 Microprocessor Instruction Sets.
Data Transfer Instructions
Opcode Operand Meaning Explanation
PUSH Reg. pair
Push the register pair onto the
stack
The contents of the register pair designated in the operand are
copied onto the stack in the following sequence.
The stack pointer register is decremented and the contents of the
high order register (B, D, H, A) are copied into that location.
The stack pointer register is decremented again and the contents
of the low-order register (C, E, L, flags) are copied to that
location. Example βˆ’ PUSH K
POP Reg. pair
Pop off stack to the register
pair
The contents of the memory location pointed out by the stack
pointer register are copied to the low-order register (C, E, L,
status flags) of the operand.
The stack pointer is incremented by 1 and the contents of that
memory location are copied to the high-order register (B, D, H, A)
of the operand. The stack pointer register is again incremented
by 1. Example βˆ’ POPK
OUT
8-bit port
address
Output the data from the
accumulator to a port with 8bit
address
The contents of the accumulator are copied into the I/O port
specified by the operand.
Example βˆ’ OUT K9L
IN
8-bit port
address
Input data to accumulator from
a port with 8-bit address
The contents of the input port designated in the operand are read
and loaded into the accumulator. Example βˆ’ IN5KL

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Programming with 8085.pptx

  • 1. Course :- Microprocessor Unit :- Programming with 8085 Topic:- Assembly Language Programming Basics Prepared By Mr Kupade K A Assist Prof ETC Dept. SITCOE, Yadrav.
  • 2. Assembly Language programming Basics. Assembly language Programming Assembly language is a low-level programming language for a computer or other programmable device specific to a particular computer architecture in contrast to most high-level programming languages, which are generally portable across multiple systems. Assembly language is converted into executable machine code by a utility program referred to as an assembler like NASM, MASM, etc.
  • 3. Assembly Language programming Basics. What is Assembly Language? Each personal computer has a microprocessor that manages the computer's arithmetical, logical, and control activities. Each family of processors has its own set of instructions for handling various operations such as getting input from keyboard, displaying information on screen and performing various other jobs. These set of instructions are called 'machine language instructions'. A processor understands only machine language instructions, which are strings of 1's and 0's. However, machine language is too obscure and complex for using in software development. So, the low-level assembly language is designed for a specific family of processors that represents various instructions in symbolic code and a more understandable form.
  • 4. Assembly Language programming Basics. Basic Features of PC Hardware The main internal hardware of a PC consists of processor, memory, and registers. Registers are processor components that hold data and address. To execute a program, the system copies it from the external device into the internal memory. The processor executes the program instructions. The fundamental unit of computer storage is a bit; it could be ON (1) or OFF (0) and a group of 8 related bits makes a byte on most of the modern computers. The processor supports the following data sizes βˆ’ Word: a 2-byte data item Double word: a 4-byte (32 bit) data item Quad word: an 8-byte (64 bit) data item Paragraph: a 16-byte (128 bit) area Kilobyte: 1024 bytes Megabyte: 1,048,576 bytes
  • 5. Assembly Language programming Basics. Binary Number System Every number system uses positional notation, i.e., each position in which a digit is written has a different positional value. Each position is power of the base, which is 2 for binary number system, and these powers begin at 0 and increase by 1. The following table shows the positional values for an 8-bit binary number, where all bits are set ON. The value of a binary number is based on the presence of 1 bits and their positional value. So, the value of a given binary number is βˆ’ 1 + 2 + 4 + 8 +16 + 32 + 64 + 128 = 255 which is same as 28 - 1. Bit value 1 1 1 1 1 1 1 1 Position value as a power of base 2 128 64 32 16 8 4 2 1 Bit number 7 6 5 4 3 2 1 0
  • 6. Assembly Language programming Basics. Hexadecimal Number System Hexadecimal number system uses base 16. The digits in this system range from 0 to 15. By convention, the letters A through F is used to represent the hexadecimal digits corresponding to decimal values 10 through 15. Hexadecimal numbers in computing is used for abbreviating lengthy binary representations. Basically, hexadecimal number system represents a binary data by dividing each byte in half and expressing the value of each half-byte.
  • 7. Assembly Language programming Basics. Decimal number Binary representation Hexadecimal representation 0 0 0 1 1 1 2 10 2 3 11 3 4 100 4 5 101 5 6 110 6 7 111 7 8 1000 8 9 1001 9 10 1010 A 11 1011 B 12 1100 C 13 1101 D 14 1110 E 15 1111 F
  • 8. Assembly Language programming Basics. To convert a binary number to its hexadecimal equivalent, break it into groups of 4 consecutive groups each, starting from the right, and write those groups over the corresponding digits of the hexadecimal number. Example βˆ’ Binary number 1000 1100 1101 0001 is equivalent to hexadecimal - 8CD1 To convert a hexadecimal number to binary, just write each hexadecimal digit into its 4-digit binary equivalent. Example βˆ’ Hexadecimal number FAD8 is equivalent to binary - 1111 1010 1101 1000
  • 9. Assembly Language programming Basics. Binary Arithmetic The following table illustrates four simple rules for binary addition βˆ’ (i) (ii) (iii) (iv) 1 0 1 1 1 +0 +0 +1 +1 =0 =1 =10 =11 Rules (iii) and (iv) show a carry of a 1-bit into the next left position. Decimal Binary 60 00111100 +42 00101010 102 01100110 A negative binary value is expressed in two's complement notation. According to this rule, to convert a binary number to its negative value is to reverse its bit values and add 1. Number 53 00110101 Reverse the bits 11001010 Add 1 00000001 Number -53 11001011 To subtract one value from another, convert the number being subtracted to two's complement format and add the numbers.
  • 10. Assembly Language programming Basics. Binary Arithmetic The following table illustrates four simple rules for binary addition βˆ’ (i) (ii) (iii) (iv) 1 0 1 1 1 +0 +0 +1 +1 =0 =1 =10 =11 Rules (iii) and (iv) show a carry of a 1-bit into the next left position. Decimal Binary 60 00111100 +42 00101010 102 01100110 A negative binary value is expressed in two's complement notation. According to this rule, to convert a binary number to its negative value is to reverse its bit values and add 1. Number 53 00110101 Reverse the bits 11001010 Add 1 00000001 Number -53 11001011 To subtract one value from another, convert the number being subtracted to two's complement format and add the numbers.
  • 11. 8085 Microprocessor Addressing Modes. Addressing Modes in 8085 These are the instructions used to transfer the data from one register to another register, from the memory to the register, and from the register to the memory without any alteration in the content. Addressing modes in 8085 is classified into 5 groups βˆ’ Immediate addressing mode In this mode, the 8/16-bit data is specified in the instruction itself as one of its operand. For example: MVI K, 20F: means 20F is copied into register K. Register addressing mode In this mode, the data is copied from one register to another. For example: means MOV K, B: means data in register B is copied to register K.
  • 12. 8085 Microprocessor Addressing Modes. Addressing Modes in 8085 Direct addressing mode In this mode, the data is directly copied from the given address to the register. For example: LDB 5000K: means the data at address 5000K is copied to register B. Indirect addressing mode In this mode, the data is transferred from one register to another by using the address pointed by the register. For example: address MOV K, B: means data is transferred from the memory address pointed by the register to the register K. Implied addressing mode This mode doesn’t require any operand; the data is specified by the opcode itself. For example: CMP.
  • 13. 8085 Microprocessor Instruction Sets. Control Instructions Opcode Operand Meaning Explanation NOP None No operation No operation is performed, i.e., the instruction is fetched and decoded. HLT None Halt and enter wait state The CPU finishes executing the current instruction and stops further execution. An interrupt or reset is necessary to exit from the halt state. DI None Disable interrupts The interrupt enable flip-flop is reset and all the interrupts are disabled except TRAP. EI None Enable interrupts The interrupt enable flip-flop is set and all the interrupts are enabled. RIM None Read interrupt mask This instruction is used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. SIM None Set interrupt mask This instruction is used to implement the interrupts 7.5, 6.5, 5.5, and serial data output. Instruction sets are instruction codes to perform some task. It is classified into five categories
  • 14. 8085 Microprocessor Instruction Sets. Logical Instructions Opcode Operand Meaning Explanation CMP R M Compare the register or memory with the accumulator The contents of the operand (register or memory) are M compared with the contents of the accumulator. CPI 8-bit data Compare immediate with the accumulator The second byte data is compared with the contents of the accumulator. ANA R M Logical AND register or memory with the accumulator The contents of the accumulator are logically AND with M the contents of the register or memory, and the result is placed in the accumulator. ANI 8-bit data Logical AND immediate with the accumulator The contents of the accumulator are logically AND with the 8-bit data and the result is placed in the accumulator. XRA R M Exclusive OR register or memory with the accumulator The contents of the accumulator are Exclusive OR with M the contents of the register or memory, and the result is placed in the accumulator.
  • 15. 8085 Microprocessor Instruction Sets. Logical Instructions Opcode Operand Meaning Explanation XRI 8-bit data Exclusive OR immediate with the accumulator The contents of the accumulator are Exclusive OR with the 8-bit data and the result is placed in the accumulator. ORA R M Logical OR register or memory with the accumulator The contents of the accumulator are logically OR with M the contents of the register or memory, and result is placed in the accumulator. ORI 8-bit data Logical OR immediate with the accumulator The contents of the accumulator are logically OR with the 8-bit data and the result is placed in the accumulator. RLC None Rotate the accumulator left Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in the Carry flag. CY is modified according to bit D7. RRC None Rotate the accumulator right Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in the position of D7 as well as in the Carry flag. CY is modified according to bit D0.
  • 16. 8085 Microprocessor Instruction Sets. Logical Instructions Opcode Operand Meaning Explanation RAL None Rotate the accumulator left through carry Each binary bit of the accumulator is rotated left by one position through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0. CY is modified according to bit D7. RAR None Rotate the accumulator right through carry Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit D0 is placed in the Carry flag, and the Carry flag is placed in the most significant position D7. CY is modified according to bit D0. CMA None Complement accumulator The contents of the accumulator are complemented. No flags are affected. CMC None Complement carry The Carry flag is complemented. No other flags are affected. STC None Set Carry Set Carry
  • 17. 8085 Microprocessor Instruction Sets. Branching Instructions Opcode Operand Meaning Explanation JMP 16-bit address Jump uncondition ally The program sequence is transferred to the memory address given in the operand. 16-bit address Jump conditionall y The program sequence is transferred to the memory address given in the operand based on the specified flag of the PSW. Opcode Description Flag Status JC Jump on Carry CY=1 JNC Jump on no Carry CY=0 JP Jump on positive S=0 JM Jump on minus S=1 JZ Jump on zero Z=1 JNZ Jump on no zero Z=0 JPE Jump on parity even P=1 JPO Jump on parity odd P=0
  • 18. 8085 Microprocessor Instruction Sets. Branching Instructions Opcode Operand Meaning Explanation 16-bit address Unconditional subroutine call The program sequence is transferred to the memory address given in the operand. Before transferring, the address of the next instruction after CALL is pushed onto the stack. RET None Return from subroutine unconditionally The program sequence is transferred from the subroutine to the calling program. Opcode Description Flag Status CC Call on Carry CY=1 CNC Call on no Carry CY=0 CP Call on positive S=0 CM Call on minus S=1 CZ Call on zero Z=1 CNZ Call on no zero Z=0 CPE Call on parity even P=1 CPO Call on parity odd P=0
  • 19. 8085 Microprocessor Instruction Sets. Branching Instructions Opcode Operand Meaning Explanation None Return from subroutine conditionally The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW and the program execution begins at the new address. PCHL None Load the program counter with HL contents The contents of registers H & L are copied into the program counter. The contents of H are placed as the high-order byte and the contents of L as the low order byte. Opcode Description Flag Status RC Return on Carry CY=1 RNC Return on no Carry CY=0 RP Return on positive S=0 RM Return on minus S=1 RZ Return on zero Z=1 RNZ Return on no zero Z=0 RPE Return on parity even P=1 RPO Return on parity odd P=0
  • 20. 8085 Microprocessor Instruction Sets. Branching Instructions Opcode Operand Meaning Explanation RST 0-7 Restart The RST instruction is used as software instructions in a program to transfer the program execution to one of the following eight locations. Instruction Restart Address RST 0 0000H RST 1 0008H RST 2 0010H RST 3 0018H RST 4 0020H RST 5 0028H RST 6 0030H RST 7 0038H
  • 21. 8085 Microprocessor Instruction Sets. Branching Instructions Opcode Operand Meaning Explanation RST 0-7 Restart The 8085 has additionally 4 interrupts, which can generate RST instructions internally and doesn’t require any external hardware. Following are those instructions and their Restart addresses βˆ’ Interrupt Restart Address TRAP 0024H RST 5.5 002CH RST 6.5 0034H RST 7.5 003CH
  • 22. 8085 Microprocessor Instruction Sets. Arithmetic Instructions Opcode Operand Meaning Explanation ADD R M Add register or memory, to the accumulator The contents of the register or memory are added to the contents of the accumulator and the result is stored in the accumulator. Example βˆ’ ADD K. ADC R M Add register to the accumulator with carry The contents of the register or memory & M the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. Example βˆ’ ADC K ADI 8-bit data Add the immediate to the accumulator The 8-bit data is added to the contents of the accumulator and the result is stored in the accumulator. Example βˆ’ ADI 55K ACI 8-bit data Add the immediate to the accumulator with carry The 8-bit data and the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. Example βˆ’ ACI 55K LXI Reg. pair, 16bit data Load the register pair immediate The instruction stores 16-bit data into the register pair designated in the operand. Example βˆ’ LXI K, 3025M DAD Reg. pair Add the register pair to H and L registers The 16-bit data of the specified register pair are added to the contents of the HL register. Example βˆ’ DAD K
  • 23. 8085 Microprocessor Instruction Sets. Arithmetic Instructions Opcode Operand Meaning Explanation SUB R M Subtract the register or the memory from the accumulator The contents of the register or the memory are subtracted from the contents of the accumulator, and the result is stored in the accumulator. Example βˆ’ SUB K SBB R M Subtract the source and borrow from the accumulator The contents of the register or the memory & M the Borrow flag are subtracted from the contents of the accumulator and the result is placed in the accumulator. Example βˆ’ SBB K SUI 8-bit data Subtract the immediate from the accumulator The 8-bit data is subtracted from the contents of the accumulator & the result is stored in the accumulator. Example βˆ’ SUI 55K XCHG None Exchange H and L with D and E The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example βˆ’ XCHG INR R M Increment the register or the memory by 1 The contents of the designated register or the memory are incremented by 1 and their result is stored at the same place. Example βˆ’ INR K
  • 24. 8085 Microprocessor Instruction Sets. Arithmetic Instructions Opcode Operand Meaning Explanation INX R Increment register pair by 1 The contents of the designated register pair are incremented by 1 and their result is stored at the same place. Example βˆ’ INX K DCR R M Decrement the register or the memory by 1 The contents of the designated register or memory are decremented by 1 and their result is stored at the same place. Example βˆ’ DCR K DCX R Decrement the register pair by 1 The contents of the designated register pair are decremented by 1 and their result is stored at the same place. Example βˆ’ DCX K DAA None Decimal adjust accumulator The contents of the accumulator are changed from a binary value to two 4-bit BCD digits. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example βˆ’ DAA
  • 25. 8085 Microprocessor Instruction Sets. Data Transfer Instructions Opcode Operand Meaning Explanation MOV Rd, Sc M, Sc Dt, M Copy from the source (Sc) to the destination(Dt) This instruction copies the contents of the source register into the destination register without any alteration. Example βˆ’ MOV K, L MVI Rd, data M, data Move immediate 8-bit The 8-bit data is stored in the destination register or memory. Example βˆ’ MVI K, 55L LDA 16-bit address Load the accumulator The contents of a memory location, specified by a 16- bit address in the operand, are copied to the accumulator. Example βˆ’ LDA 2034K LDAX B/D Reg. pair Load the accumulator indirect The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. Example βˆ’ LDAX K LXI Reg. pair, 16-bit data Load the register pair immediate The instruction loads 16-bit data in the register pair designated in the register or the memory. Example βˆ’ LXI K, 3225L
  • 26. 8085 Microprocessor Instruction Sets. Data Transfer Instructions Opcode Operand Meaning Explanation LHLD 16-bit address Load H and L registers direct The instruction copies the contents of the memory location pointed out by the address into register L and copies the contents of the next memory location into register H. Example βˆ’ LHLD 3225K STA 16-bit address 16-bit address The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example βˆ’ STA 325K STAX 16-bit address Store the accumulator indirect The contents of the accumulator are copied into the memory location specified by the contents of the operand. Example βˆ’ STAX K SHLD 16-bit address Store H and L registers direct The contents of register L are stored in the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example βˆ’ SHLD 3225K
  • 27. 8085 Microprocessor Instruction Sets. Data Transfer Instructions Opcode Operand Meaning Explanation XCHG None Exchange H and L with D and E The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example βˆ’ XCHG SPHL None Copy H and L registers to the stack pointer The instruction loads the contents of the H and L registers into the stack pointer register. The contents of the H register provide the high-order address and the contents of the L register provide the low-order address. Example βˆ’ SPHL XTHL None Exchange H and L with top of stack The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1). Example βˆ’ XTHL
  • 28. 8085 Microprocessor Instruction Sets. Data Transfer Instructions Opcode Operand Meaning Explanation PUSH Reg. pair Push the register pair onto the stack The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the high order register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example βˆ’ PUSH K POP Reg. pair Pop off stack to the register pair The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example βˆ’ POPK OUT 8-bit port address Output the data from the accumulator to a port with 8bit address The contents of the accumulator are copied into the I/O port specified by the operand. Example βˆ’ OUT K9L IN 8-bit port address Input data to accumulator from a port with 8-bit address The contents of the input port designated in the operand are read and loaded into the accumulator. Example βˆ’ IN5KL