I am currently seeking full time opportunities in Embedded/Firmware Software development . I graduated with my Masters in Science degree in Electrical and Electronics Engineering from The University of North Carolina at Charlotte in December 2015.
This paper presents interfaces required in wireless sensor node (WSN) implementation. Here keyboard,
LCD, ADC and Wi-Fi module interfaces are presented. These interfaces are developed as hardware prototypes in
the application of wireless sensor node as a single chip solution. Protocols of these interfaces have been described
with the help of their hardware simulations and synthesis reports.
The end application is proposed to monitor physical parameters remotely using wireless protocol. The sensor node
has to be implemented on Field Programmable Gate Array (FPGA). The proposed node design is reconfigurable,
and hence flexible in context of future modification. Xilinx platform is proposed for synthesis, simulation and
implementation.
Keywords — FPGA, wireless sensor node.
This paper presents interfaces required in wireless sensor node (WSN) implementation. Here keyboard,
LCD, ADC and Wi-Fi module interfaces are presented. These interfaces are developed as hardware prototypes in
the application of wireless sensor node as a single chip solution. Protocols of these interfaces have been described
with the help of their hardware simulations and synthesis reports.
The end application is proposed to monitor physical parameters remotely using wireless protocol. The sensor node
has to be implemented on Field Programmable Gate Array (FPGA). The proposed node design is reconfigurable,
and hence flexible in context of future modification. Xilinx platform is proposed for synthesis, simulation and
implementation.
Keywords — FPGA, wireless sensor node.
Communication Protocol RS232 Implementation on Fiel d Programmable Gate Array (FPGA) has been presented in this paper. The Image pixel v alues are converted into binary and send to the FPGA from PC through Serial Communication Pr otocol .GUI is designed in MATLAB and is used to interface Personal computer (PC) and FPGA. The image pixels are read through FPGA in binary format.
vlsi projects using verilog code 2014-2015E2MATRIX
E2MATRIX Research Lab
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Hi,
My name is Rohan Narula. I am a Fresh Graduate from The University of Texas at Arlington (MS Electrical Engineering) seeking full-time opportunities from June 2017. My specializations are in Embedded Systems / Firmware Development, Automation & Controls.
Graduate Research Assistant at Multimedia Processing Laboratory, University of Texas at Arlington. MS in EE with focus on Embedded Systems & Image Processing
Communication Protocol RS232 Implementation on Fiel d Programmable Gate Array (FPGA) has been presented in this paper. The Image pixel v alues are converted into binary and send to the FPGA from PC through Serial Communication Pr otocol .GUI is designed in MATLAB and is used to interface Personal computer (PC) and FPGA. The image pixels are read through FPGA in binary format.
vlsi projects using verilog code 2014-2015E2MATRIX
E2MATRIX Research Lab
Are you scratching your head to write your M Tech thesis?
Don’t know where to start and where to find the relevant matter on the topic?
We Provide Complete Thesis Help For M.Tech / Phd Studnets.
E2MATRIX deals with Thesis guidance and research work for M.Tech, PhD Students.
If you are looking for professional thesis guidance then of course you are at the right place. We have a best team of Technical Developers and professionals who specialize in developing and delivering best and authenticated work with an assurance of on time delivery.
Contact : +91 9041262727, 9779363902.
Email : support@e2matrix.com
Web : www.e2matrix.com
Hi,
My name is Rohan Narula. I am a Fresh Graduate from The University of Texas at Arlington (MS Electrical Engineering) seeking full-time opportunities from June 2017. My specializations are in Embedded Systems / Firmware Development, Automation & Controls.
Graduate Research Assistant at Multimedia Processing Laboratory, University of Texas at Arlington. MS in EE with focus on Embedded Systems & Image Processing
This study paper portrays a fresh approach for
a course and laboratory design to establish low cost prototypes
and other entrenched devices that accentuate virtual
programmable logic device (VPLD), object oriented java and
real time processing tactics. JAVA is used for software
development. The study encompasses the use of host and node
application. A high performance, low power AVR with high
endurance non-volatile memory segments and with an advance
RISC structure is used to construct prototypes. The paperwork
deals with the VPLD board which is capable to work as
corresponding digital logic analyzer, equation parser, standard
digital IC and design wave studio
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1. 10008 Graduate Lane
Apt C
Charlotte, NC:-28262
PRAYAT HEGDE Mobile No:- +1 (704) 236-8531
Email: - prayat2090@gmail.com
Email: - phegde@uncc.edu
1
EDUCATION
University of North Carolina at Charlotte Jan 2014-Dec 2015
Master of Science in Electrical and Electronics Engineering
University of Goa, India July 2008-July 2012
Bachelor of Engineering in Electronics and Telecommunication
SKILL SET
Languages: - C, C++, C#, Java, x86, Embedded C/C++, VHDL, nesC, XML, Python.
Software Development: - OpenMP, MPI, CUDA, Device Drivers, Keil, AutoHotKey, .NET, OpenGL, OpenCV,
Devcon
Tools: - GPUView, DevCon, Intel Vtune, SoCWatch, Windows Performance Analyzer, LabVIEW,
Modelsim, AutoCAD, Xilinx, Matlab, SAP, Eclipse, BlueJ, Visual Studio, Visual Studio
Debugger, Allegro, Perforce.
Micro-Controllers: - ATMEGA: 8, 16, 64, Microchip: PIC 16F, 18F, 32F, ARM7, MSP430, Arduino, Renesas
Sakura, Renesas RX63N, Silicon Lab C8051F041.
Micro-Architecture: - Skylake, Broadwell, Cherry trail, Broxton.
Communication Protocols: - SPI, CAN, I2C, UART. TCP/IP, UDP, USB, ZigBee, Bluetooth.
Courses: - Computer Architecture Real Time Embedded Systems Parallel Computing
Embedded Systems Fault Tolerant Systems Intro to VHDL
Wireless Sensor Networks Intro to Robotics
WORK EXPERIENCE
Intel Corporation: -
GSDV GID Power and Performance Engineering
Title: Graphics Software Engineer Intern June 2015 –Nov 2015
Debugging Graphics software stack using Agile SW development methodologies.
Working directly with new platforms to help determine if the hardware is working as expected.
Contribute to improve operational efficiency by measuring, automation tests, analyzing data and debugging.
Writing and executing automated and manual test cases and documenting defects.
Setting up test equipment and running experiments to help debug defects.
Siemens Ltd:-
Title: Graduate Apprentice Engineer Aug 2012 - Aug 2013
Knowledge of the operation and production of Gas Insulated Switchboards, Compact Sub-Stations and Ring Main Units
for medium voltage rating.
Implementation of Maynard Operation Sequence Technique (MOST) and calculation of the efficiency of the production
line for Gas Insulated Switches.
Designed electronic fixture to enhance the efficiency of the production of Ring Main Units.
CSIR National Institute of Oceanography, Goa, India:-
Title: Dissertation Intern Aug 2011-July 2012
Designed and implemented miniature autonomous vertical profiler for oceanographic purpose.
Embedded C++ coding of C8051F041 with ultrasonic, Pressure and temperature sensor.
Designed GUI for wireless communication with MAVP.
2. PROJECTS
Parametric Cache Simulator: - Language: - C++, Xperf.
Built a simulator that inputs all the design parameters of a cache (replacement policies: LRU, LFU. Write policies:
WBWA, WTNA) and simulates the working using a trace file generated from the given application.
Assembly code Hazard check simulator: - Language: - C++.
Built a tool that inputs an assembly code file and checks for any possible hazards and detects data, name or control
dependencies for a pipeline with variable depth.
Scheduling Simulator: - Language: - C++.
Designed and implemented a scheduling simulator with the Earliest Deadline First (EDF) scheduling policy in conjunction
with the Priority Inheritance Protocol (PIP).
Parallel Programming: - Language: - C, C++, Java, CUDA C/C++.
Implemented and executed parallel HPC programs using CUDA C on UNC-C K20 cci-grid08.uncc.edu.
Used C with OpenMp , MPI directives to parallelize the sequential codes for higher order Matrix Multiplication, Dynamic
Heat Distribution problem, Monte Carlo Pi calculations which was implemented with the use of patterns like
stencil,workpool etc.
Testing the execution time and speedup of above codes on various clusters(Distributed, Shared)
RISC Processor with Interrupt handling: - Language: -VHDL.
Designed and simulated various components of a RISC processor like 16-bit ALU, 5 stage pipeline and interrupt handler
and integrating the components into a full-fledged RISC processor.
Market data parsing system: - Language: - HTML, Embedded C, Python.
Developed an ITCH market data parsing system using RX63N embedded board.
The RX63N embedded board receives the ITCH market data information as a broadcast message (UDP packets) and sends
buy/sell requests through TCP/IP packets to the host.
Run-To-Completion Scheduler: - Language: -Embedded C
Developed a priority based Run-To-Completion scheduler in C to implement priority based tasks using the Renesas
RX63N board.
Tasks involved sensing of parameters like temperature, controller internal reference voltage, switch interrupts, LEDs
brightness control potentiometer input, Real Time Clock information and displaying date, time, temperature, reference
voltages on LCD.
Additionally, running LED patterns after receiving various keyboard commands as well as sending all the data back to PC
for display, serially by UART using Windows HyperTerminal.
Time Synchronization using Miza2 Motes: - Language: - nesC.
Deployed time synchronization in a multi-hop sensor network.
Development of Miniature Autonomous Vertical Profiler for Oceanographic studies: -
Language: - Embedded C++, C#.
Designed a vehicle that traverse along the vertical water column without the aid of a tether or a guiding mechanism.
PARTICIPATION-PRESENTATION-PUBLICATION
Presented “RF TRANSMITTER” at an exhibition held at Padre Conceicao College of Engineering, 2010.
Participated in PIC Microcontrollers Workshop organized by SENATE of the ETC Department Padre Conceicao College
of Engineering 2011.
Presented a Paper entitled “Development of Miniature Autonomous Vertical Profiler for Limnography and Oceanographic
studies” at the VLSI Society of India Goa Chapter, 2012. (Paper published in the proceedings of the conference).