- Amdahl's Law describes the speedup from parallelizing parts of a computation. It shows that the overall speedup is limited by the time spent on sequential parts of the program. - Two examples show calculating the maximum speedup from parallelizing 90% and 25% of a program's operations using multiple processors. - Pipelining a CPU with a 5-stage pipeline and lower clock speed from 2.5GHz to 2GHz achieves a speedup of 3.2x due to reducing the time between instructions. Pipelining a 11-stage processor sees a speedup of 9.167x for executing 50 instructions.

1. Performance evaluation of
parallel processors

2. Amdahl’s Law

3. Amdahl’s Law – Sample Problem
• Consider a CPU used in Web servicing. We need to enhance the
processor by increasing the computation speed 10 times faster on
computation process in web service applications. We assume that,
30% of the time the original processor is spending for computation
process and 70% of the time is waiting for the i/o devices. By
incorporating the enhancement, then, what will be the overall speed up
gain?

4. Solution
• Fractionenhanced=30% =0.3
• Speedenhanced =10
• Speedupoverall = 1/(1-0.3)+(0.3/10)
= 1/0.7+0.03
=1/0.73
͌ 1.369

5. Amdahl’s Law – Sample Problem

6. Amdahl’s Law – Sample Problem
• If 90% of the computation can be parallelized, what is the max.
speedup achievable using 8 processors?
• Fraction_enhanced=90%
• N=8
• Speedup=

7. Amdahl’s Law – Sample Problem
• If 25% of the operations on a parallel program must be performed
sequentially, what is the maximum speedup available?
• For maximum speedup N = infinity
• Speedup(P,N)= 1 /0.25 = 4

8. • Consider a non-pipelined processor with a clock rate of 2.5 gigahertz
and average cycles per instruction of four. The same processor is
upgraded to a pipelined processor with five stages; but due to the
internal pipeline delay, the clock speed is reduced to 2 gigahertz.
Assume that there are no stalls in the pipeline. Calculate the speed up
achieved in this pipelined processor.

9. Solution:
Speedup = ExecutionTimeOld / ExecutionTimeNew
ExecutionTimeOld = CPIOld * CycleTimeOld
[Here CPI is Cycles Per Instruction]
= CPIOld * CycleTimeOld
= 4 * 1/2.5 Nanoseconds
= 1.6 ns
Since there are no stalls, CPInew can be assumed 1 on average.
ExecutionTimeNew = CPInew * CycleTimenew
= 1 * 1/2
= 0.5
Speedup = 1.6 / 0.5 = 3.2

10. Time between instructions on the pipelined processor:
• 𝑇𝑖𝑚𝑒 𝑏𝑒𝑡𝑤𝑒𝑒𝑛 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛𝑠𝑝𝑖𝑝𝑒𝑙𝑖𝑛𝑒𝑑 =
𝑇𝑖𝑚𝑒 𝑏𝑒𝑡𝑤𝑒𝑒𝑛 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛𝑠𝑛𝑜𝑛−𝑝𝑖𝑝𝑒𝑙𝑖𝑛𝑒𝑑
𝑁𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 𝑝𝑖𝑝𝑒 𝑠𝑡𝑎𝑔𝑒𝑠
• Pipeline speedup:
• Pipeline speedup =
𝑡𝑖𝑚𝑒 𝑛𝑜𝑛 𝑝𝑖𝑝𝑒𝑙𝑖𝑛𝑒𝑑
𝑡𝑖𝑚𝑒 𝑝𝑖𝑝𝑒𝑙𝑖𝑛𝑒𝑑
• Consider executing ‘n’ instructions on a k-stage pipelined
processor:
• Non-pipelined processor: 𝑘𝑛
• Pipelined processor: (𝑘 − 1) + 𝑛
• speedup =
𝑘𝑛
𝑘−1 +𝑛

11. • Consider a 11-stage instruction cycle. Find out the speedup achieved if a set
of 50 instructions is run on a processor without pipelining and on the
processor with pipelining.
Answer :
• n= 50
• k= 11
• Execution time_pipeline= (k- 1)+n= 10+50 =60 instruction cycle
• Execution time_non_pipeline=k x n = 11 x 50 =550 instruction cycle
• speedup =
𝑘𝑛
𝑘−1 +𝑛
= 550/60
= 9.167