The document summarizes the benefits, applications, and specifications of HEXFET® Power MOSFETs. Key benefits include improved gate, avalanche and switching ruggedness as well as enhanced body diode performance. Applications include high efficiency synchronous rectification in switch-mode power supplies, uninterruptible power supplies, and high-speed power switching circuits. The document provides detailed maximum ratings, electrical characteristics, and switching performance curves over temperature for the IRFR4615PbF and IRFU4615PbF MOSFETs.

1. HEXFET® Power MOSFET
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
S
D
G
G D S
Gate Drain Source
DPak
IRFR4615PbF
IPAK
IRFU4615PbF
VDSS 150V
RDS(on) typ. 34m:
max. 42m:
ID 33A
D
S
G
Notes  through ˆ are on page 11
S
D
G
D
Absolute Maximum Ratings
Symbol Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
IDM Pulsed Drain Current c
PD @TC = 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
dv/dt Peak Diode Recovery e V/ns
TJ Operating Junction and
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy d mJ
IAR Avalanche Current c A
EAR Repetitive Avalanche Energy c mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 1.045
RθJA Junction-to-Ambient (PCB Mount) i ––– 50
RθJA Junction-to-Ambient ––– 110
Max.
33
24
140
0.96
300
°C/W
°C
A
109
See Fig. 14, 15, 22a, 22b,
144
38
-55 to + 175
± 20
IRFR4615PbF
IRFU4615PbF
1 www.irf.com © 2013 International Rectifier May 16, 2013
Form Quantity
IRFR4615PbF Tube/Bulk 75 IRFR4615PbF
IRFR4615TRLPbF Tape and Reel Left 3000 IRFR4615TRLPbF
IRFU4615PbF I-PAK Tube/Bulk 75 IRFU4615PbF
D-PAK
Base Part Number Package Type
Standard Pack Orderable Part Number

2. 2 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
S
D
G
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.19 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– 34 42 mΩ
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V
IDSS Drain-to-Source Leakage Current ––– ––– 20
––– ––– 250
IGSS Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100
RG(int) Internal Gate Resistance ––– 2.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 35 ––– ––– S
Qg Total Gate Charge ––– 26
Qgs Gate-to-Source Charge ––– 8.6 –––
Qgd Gate-to-Drain ("Miller") Charge ––– 9.0 –––
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 17 –––
td(on) Turn-On Delay Time ––– 15 –––
tr Rise Time ––– 35 –––
td(off) Turn-Off Delay Time ––– 25 –––
tf Fall Time ––– 20 –––
Ciss Input Capacitance ––– 1750 –––
Coss Output Capacitance ––– 155 –––
Crss Reverse Transfer Capacitance ––– 40 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related)hÖ–– 179 –––
Coss eff. (TR) Effective Output Capacitance (Time Related)g ––– 382 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units
IS Continuous Source Current
(Body Diode)
ISM Pulsed Source Current
(Body Diode)Ù
VSD Diode Forward Voltage ––– ––– 1.3 V
trr Reverse Recovery Time ––– 70 ––– TJ = 25°C VR = 100V,
––– 83 ––– TJ = 125°C IF = 21A
Qrr Reverse Recovery Charge ––– 177 ––– TJ = 25°C di/dt = 100A/μs f
––– 247 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 4.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
ns
nC
33
140
μA
nA
nC
ns
pF
A
––– –––
––– –––
ID = 21A
RG = 7.3Ω
VGS = 10V f
VDD = 98V
ID = 21A, VDS =0V, VGS = 10V
TJ = 25°C, IS = 21A, VGS = 0V f
integral reverse
p-n junction diode.
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 5mA™
VGS = 10V, ID = 21A f
VDS = VGS, ID = 100μA
VDS = 150V, VGS = 0V
VDS = 150V, VGS = 0V, TJ = 125°C
MOSFET symbol
showing the
VDS = 75V
Conditions
VGS = 10V f
VGS = 0V
VDS = 50V
ƒ = 1.0MHz (See Fig.5)
VGS = 0V, VDS = 0V to 120V h(See Fig.11)
VGS = 0V, VDS = 0V to 120V g
Conditions
VDS = 50V, ID = 21A
ID = 21A
VGS = 20V
VGS = -20V

3. 3 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
≤60μs PULSE WIDTH
Tj = 25°C
5.0V
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
≤60μs PULSE WIDTH
Tj = 175°C
5.0V
2 4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
TJ = 25°C
TJ = 175°C
VDS = 50V
≤60μs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
3.0
RDS(on),Drain-to-SourceOnResistance
(Normalized)
ID = 21A
VGS = 10V
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C,Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30 35
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS,Gate-to-SourceVoltage(V)
VDS= 120V
VDS= 75V
VDS= 30V
ID= 21A

4. 4 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-to-Drain Voltage (V)
1.0
10
100
1000
ISD,ReverseDrainCurrent(A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
OPERATION IN THIS AREA
LIMITED BY RDS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100μsec
1msec
10msec
DC
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C )
140
145
150
155
160
165
170
175
180
185
190
V(BR)DSS,Drain-to-SourceBreakdownVoltage(V)
Id = 5mA
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
450
500
EAS,SinglePulseAvalancheEnergy(mJ)
ID
TOP 2.8A
5.3A
BOTTOM 21A
-20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Energy(μJ)
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
5
10
15
20
25
30
35
40
ID,DrainCurrent(A)

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IRFR/U4615PbF
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
ThermalResponse(ZthJC)°C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
AvalancheCurrent(A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤj = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
EAR,AvalancheEnergy(mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 21A
τJ
τJ
τ1
τ1
τ2
τ2
τ3
τ3
R1
R1
R2
R2
R3
R3
Ci i/Ri
Ci= τi/Ri
τ
τC
τ4
τ4
R4
R4 Ri (°C/W) τi (sec)
0.02324 0.000008
0.26212 0.000106
0.50102 0.001115
0.25880 0.005407

6. 6 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
Fig. 17 - Typical Recovery Current vs. dif/dtFig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VGS(th),GatethresholdVoltage(V)
ID = 100μA
ID = 250uA
ID = 1.0mA
ID = 1.0A
0 200 400 600 800 1000
diF /dt (A/μs)
100
200
300
400
500
600
700
800
QRR(A)
IF = 14A
VR = 100V
TJ = 25°C
TJ = 125°C
0 200 400 600 800 1000
diF /dt (A/μs)
100
200
300
400
500
600
700
800
900
1000
QRR(A)
IF = 21A
VR = 100V
TJ = 25°C
TJ = 125°C
0 200 400 600 800 1000
diF /dt (A/μs)
0
5
10
15
20
25
30
35
IRRM(A)
IF = 21A
VR = 100V
TJ = 25°C
TJ = 125°C
0 200 400 600 800 1000
diF /dt (A/μs)
0
5
10
15
20
25
30
IRRM(A)
IF = 14A
VR = 100V
TJ = 25°C
TJ = 125°C

7. 7 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive WaveformsFig 22a. Unclamped Inductive Test Circuit
tp
V(BR)DSS
IAS
RG
IAS
0.01Ωtp
D.U.T
LVDS
+
-
VDD
DRIVER
A
15V
20VVGS
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple ≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D =
P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+-
-
-
ƒ
„
‚
RG
VDD• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T

Inductor Current
D.U.T.
VDS
IDIG
3mA
VGS
.3μF
50KΩ
.2μF12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VDS
90%
10%
VGS
td(on) tr td(off) tf
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
- VDD
VGS

8. 8 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
INTERNATIONAL
ASSEMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
OR
Note: "P" in assembly line position
EXAMPLE:
LOT CODE 1234
THIS IS AN IRFR120
WITH ASSEMBLY
indicates "Lead-Free"
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
A = ASSEMBLY SITE CODE
PART NUMBER
WEEK 16
DATE CODE
YEAR 1 = 2001
RECTIFIER
INTERNATIONAL
LOGO
LOT CODE
ASSEMBLY
3412
IRFR120
116A
LINE A
34
RECTIFIER
LOGO
IRFR120
12
ASSEMBLY
LOT CODE
YEAR 1 = 2001
DATE CODE
PART NUMBER
WEEK 16
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

9. 9 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
78
LINE A
LOGO
INTERNATIONAL
RECTIFIER
OR
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
A= ASSEMBLY SITE CODE
IRFU120
PART NUMBER
WEEK 19
DATE CODE
YEAR 1 = 2001
RECTIFIER
INTERNATIONAL
LOGO
ASSEMBLY
LOT CODE
IRFU120
56
DATE CODE
PART NUMBER
LOT CODE
ASSEMBLY
56 78
YEAR 1 = 2001
WEEK 19
119A
indicates Lead-Free"
ASSEMBLED ON WW19, 2001
IN THE ASSEMBLY LINE "A"
Note: "P" in assembly lineposition
EXAMPLE:
WITH ASSEMBLY
THIS IS AN IRFU120
LOT CODE 5678
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

10. 10 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

11. 11 www.irf.com © 2013 International Rectifier May 16, 2013
IRFR/U4615PbF
† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability
†† Applicable version of JEDEC standard at the time of product release.
Notes:
 Repetitive rating; pulse width limited by max. junction
temperature.
‚ Limited by TJmax, starting TJ = 25°C, L = 0.51mH
RG = 25Ω, IAS = 21A, VGS =10V. Part not recommended for use
above this value .
ƒ ISD ≤ 21A, di/dt ≤ 549A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
„ Pulse width ≤ 400μs; duty cycle ≤ 2%.
… Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
† Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application
note #AN-994
ˆ Rθ is measured at TJ approximately 90°C
MSL1
(per JEDEC J-STD-020D††
)
I-PAK Not applicable
RoHS Compliant Yes
Moisture Sensitivity Level
D-PAK
Qualification Information
†
Qualification level
Industrial
(per JEDEC JESD47F††
guidelines)
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
Date Comments
•ÃUpdated datasheet to new IR corporate formatting template
•ÃUpdated Orderable part number from "IRFR4615TRPbF" to "IRFR4615TRLPbF", on page 1
Revision History
5/16/2013