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Navigation Systems Laboratory
Moscow Power Engineering Institute
2019
Specs
Short specs:
• young and high skilled team (10 guys and 1 supergirl)
• the main area - global navigation satellite systems
• established 2004, high-end laboratory equipment
• spectrum: from science to serial production
• the biggest R&D budget of MPEI, 5-8 R&D projects per year
New CDMA GLONASS signals
Our team designed next generation
CDMA L1/L2 GLONASS signals:
• BOC and BPSK modulation
• overlay codes
• FEC coder
• security schemes
• processing algorithms
CoreZh Project
CoreZh Project
PS firmware
(C++)
PL modules
(SystemVerilog)
Host software
(C++, Matlab,
Python)
PC
ARMFPGA
Zynq
Our core, root and long-time project - CoreZh (since 2008)
It’s an FPGA-based GNSS receiver/transmitter/spoofer/simulator/STAP
It combines our technologies and it’s the base for our hardware projects
One Ring to rule them all
Corr Ch
L1
L2
L3/L5
Synt
Ref Osc
Code Gen
Code Time
Carr Gen
Frontend
Baseband Processing
ovrl
DLL
Trgt
Meas
PLL/FLL
SNR
I,Q
O/S Sync
Dem
Carr Time
Search Engine Rcv Time
Dec
Fr Sync
Prsr
s-th channel
Propagation
RAIM
Solution
Interface
Manager
Navigation
t, PR, PH, D
Eph
TrckCtrl
We combine different
PS and PL modules
to achieve a certain
project goals
It's possible to use both
our own boards or industry boards for a hardware implementation
Centimeter
Centimeter is a GNSS receiver for
GLONASS quantum-optical control
stations:
• precise (50 ps) sync to laser
• all GNSS bands
• high linearity
• stable group delay
• small batch production
• several boards per unit
3 Oryx and 1 ADC:
Spatial-time adaptive processing
Multiantenna receivers:
• nullforming for huge antijam
capability
• beamforming for SNR gain and
multipath
• spreaded antennas for attitude
0 50 100 150
Time, min
30
35
40
45
50
55
60
SNR,dBHz
Focused
One channel
BF ON
Signal LOSS
ASIC Experience
Two implemented
ASICs:
• 8-input spatial-time
adaptive processing
• GNSS and
intersatellite
navigation receiver
8x14
Y
14
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
z-1
32x14
DLA
..
....
..
..
sel
ICNCT
58x2x14
58x2x14
BLK0
BLK1
BLK2
BLK3
D
D
D D
rst=!start
ena=!ready MCC0
..
rd_addr
rd_data
32
clk
20
MA
1 D
rst=!start
ena=!ready
>
+1
Nstat
ready
D
D
D D
rst=!start
ena=!ready MCC1
D
D
D D
rst=!start
ena=!ready MCC57
readystart
CVM
Synchro
FIFO/DualportRAM
CLK_LOG
STAP module
CRPA
16
16
16
16
16
16
16
16
Multiplexor
MUX1
Testgen
TG
Reg module
BUS_IN
16 16 16
16
16
16
16
16
16
16
16
16
16
16
PADS
OUT_DATA0
OUT_DATA1
OUT_DATA2
OUT_DATA3
OUT_DATA4
OUT_DATA5
OUT_DATA6
OUT_RE_SIG
15
15
15
15
15
15
15
12
adc0
adc1
adc7
imi_0
imi_1
imi_7
crpa_in_0
Address/Data
Buses
ADDR
DATA
MEM
AHB
APB
JTAGJTAGUART2UART1SPI2SPI1 CPUFPU
RAM
64 kB
IRQ
DMA
PADS
TCK
TMS
TDI
TDO
CS0
1111
SCK
MOSI
MISO
Rx1
Tx1
Rx0
Tx0
CRPA_WRAP
MCU
CLK_IP
RST 1
1
1
aresetn_adc
CLK
Rst
JTAGUART1UART0
OUT_RE_MAG12
master_in
cvm_start
nf_start 1
1
1
master_in
PADS
fifo_reset
irq_cvm_start
irq_nf_load
irq_cvm_ready
EXT_MODE
OUT_IM_SIG12
OUT_IM_MAG12
..
Dumper
data_collector_inst
ahb_*
..
master_out
cvm_start_in
cvm_start_out
nf_start_in
nf_start_out
cpu_clk
resetn
bf_out_re_0
crpa_in_7
crpa_in_1
bf_out_re_1
bf_out_re_6
14
nf_out_0
16bf_out_re_2
16bf_out_re_3
16bf_out_re_4
16bf_out_re_5
12bf_im_mag
12bf_re_sig
12bf_re_mag
12bf_im_sig
adc_clk
adc_clk
Clock control
CGC
cvm_clk
cvm_resetn
nf_clk
nf_resetn
bf_clk
bf_resetn
AHB
adc_clk
unsign
15
15
15
out_data0
out_data1
out_data6
15 out_data2
15 out_data3
15 out_data4
15 out_data5
adc_clk
SYNC_ADC1
PADS
Ad0_CS
Ad1_CS
Ad2_CS
1
1
1
PADS
1
LVDS
DDR
8
1
8
1
8
1
8
1
8
1
8
1
8
1
8
1
2x8ADC0
CLK0_0 2x1
2x8ADC1
CLK0_1 2x1
2x8ADC2
CLK0_2 2x1
2x8ADC3
CLK0_3 2x1
2x8ADC4
CLK0_4 2x1
2x8ADC5
CLK0_5 2x1
2x8ADC6
CLK0_6 2x1
2x8ADC7
CLK0_7 2x1
16
1
16
1
16
1
16
1
16
1
16
1
16
1
16
1
SPI
CS1
1
PADS
1 1 1 1 1 1 1 1 7 16 16
7 16 16
GPIO
valid1
D
D
adc_clk
ext_mode
SDR
aresetn_adc
2
2
2
2
addr
wdata
rdata
wr_en
rd_en
32
20
32
GNSS/INS integration
Integrated navigation:
• GNSS/MEMS
(AD16405, STIM300)
• Dead reckoning
(NV-08C and ABS)
• Pedestrian navigation
27-31 order EKF scheme for 600MHz CPU:
Not only receivers
L-band signals transceivers:
• GNSS simulator
• GNSS spoofer
• Pseudolites
(local nav)
FE
MAX2769
FE
MAX2769
TCXO
GK99-TK
LPF
22 MHz
IQ-mod
TITRF3722
Amplifier
ZRL-2400LN
НАП Oryx
Xilinx Zynq
DAC Q
AD9707
ARM
+
FPGA
DAC I
AD9707
Ethernet
UART
GLN L1
GPS L1, Clk
LPF
22 MHz
SpoofMachine
Clonicus
Clonicus is our new base board:
• Novatel OEM719 pin2pin
(46x71 mm)
• L1/L2/L3/L5 GNSS bands
• Zynq 7030 or 7045
• MEMS IMU
• extension shields:
- AD9364 transceiver,
- time sync,
- GNSS goniometer,
- STAP
Clonicus AD9364Shield
AD9364Shield is an extension
board:
• up to 6GHz transceiver
• time sync input/output
• designed for:
- GNSS CORS
- GNSS simulation
- pseudolites
Zynq
System
Zynq
System
DC/DC
NT
1065
PPS OUT
RF OUT
RF IN
PPS IN
REF IN
ANT IN
AD9364
DC/DC
SPI
TX
RX
B
PPS GUNPPS GUN
B
RX, TX
RefCtrlExt
TI DP83867
ETH
USB
MEZ1
MEZ2
PLD
LiBat
3.3V
NT
1065 Clk
RefCtrlInt
TCXO
DATA_CLK LS
1.8V
? V
4 .. 5.5V
B
B
B
B
PPS
RST
Marker0
Marker1
Trig0
JTAG
AD_REF_IN
3.3V
TCXO
NT_REF_IN
B
NT_REF_IN
diff
100 Ohm
1.3V
1.8V
3.3V
B
PPS IN
1.8V
Data
MEZ2_Rem
MEZ1_Rem
50 Ohm
3.3V
~1 ns front
RST
PB
RB
PLDcpy
FTDIUART1
Contacts
Thank you!
Navigation Systems Laboratory
Moscow Power Engineering Institute
Ilya V. Korogodin
korogodiniv@gmail.com
www.srns.ru

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Navigation Systems Laboratory - Moscow Power Engineering Institute

  • 1. Navigation Systems Laboratory Moscow Power Engineering Institute 2019
  • 2. Specs Short specs: • young and high skilled team (10 guys and 1 supergirl) • the main area - global navigation satellite systems • established 2004, high-end laboratory equipment • spectrum: from science to serial production • the biggest R&D budget of MPEI, 5-8 R&D projects per year
  • 3. New CDMA GLONASS signals Our team designed next generation CDMA L1/L2 GLONASS signals: • BOC and BPSK modulation • overlay codes • FEC coder • security schemes • processing algorithms
  • 4. CoreZh Project CoreZh Project PS firmware (C++) PL modules (SystemVerilog) Host software (C++, Matlab, Python) PC ARMFPGA Zynq Our core, root and long-time project - CoreZh (since 2008) It’s an FPGA-based GNSS receiver/transmitter/spoofer/simulator/STAP It combines our technologies and it’s the base for our hardware projects
  • 5. One Ring to rule them all Corr Ch L1 L2 L3/L5 Synt Ref Osc Code Gen Code Time Carr Gen Frontend Baseband Processing ovrl DLL Trgt Meas PLL/FLL SNR I,Q O/S Sync Dem Carr Time Search Engine Rcv Time Dec Fr Sync Prsr s-th channel Propagation RAIM Solution Interface Manager Navigation t, PR, PH, D Eph TrckCtrl We combine different PS and PL modules to achieve a certain project goals It's possible to use both our own boards or industry boards for a hardware implementation
  • 6. Centimeter Centimeter is a GNSS receiver for GLONASS quantum-optical control stations: • precise (50 ps) sync to laser • all GNSS bands • high linearity • stable group delay • small batch production • several boards per unit 3 Oryx and 1 ADC:
  • 7. Spatial-time adaptive processing Multiantenna receivers: • nullforming for huge antijam capability • beamforming for SNR gain and multipath • spreaded antennas for attitude 0 50 100 150 Time, min 30 35 40 45 50 55 60 SNR,dBHz Focused One channel BF ON Signal LOSS
  • 8. ASIC Experience Two implemented ASICs: • 8-input spatial-time adaptive processing • GNSS and intersatellite navigation receiver 8x14 Y 14 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 z-1 32x14 DLA .. .... .. .. sel ICNCT 58x2x14 58x2x14 BLK0 BLK1 BLK2 BLK3 D D D D rst=!start ena=!ready MCC0 .. rd_addr rd_data 32 clk 20 MA 1 D rst=!start ena=!ready > +1 Nstat ready D D D D rst=!start ena=!ready MCC1 D D D D rst=!start ena=!ready MCC57 readystart CVM Synchro FIFO/DualportRAM CLK_LOG STAP module CRPA 16 16 16 16 16 16 16 16 Multiplexor MUX1 Testgen TG Reg module BUS_IN 16 16 16 16 16 16 16 16 16 16 16 16 16 16 PADS OUT_DATA0 OUT_DATA1 OUT_DATA2 OUT_DATA3 OUT_DATA4 OUT_DATA5 OUT_DATA6 OUT_RE_SIG 15 15 15 15 15 15 15 12 adc0 adc1 adc7 imi_0 imi_1 imi_7 crpa_in_0 Address/Data Buses ADDR DATA MEM AHB APB JTAGJTAGUART2UART1SPI2SPI1 CPUFPU RAM 64 kB IRQ DMA PADS TCK TMS TDI TDO CS0 1111 SCK MOSI MISO Rx1 Tx1 Rx0 Tx0 CRPA_WRAP MCU CLK_IP RST 1 1 1 aresetn_adc CLK Rst JTAGUART1UART0 OUT_RE_MAG12 master_in cvm_start nf_start 1 1 1 master_in PADS fifo_reset irq_cvm_start irq_nf_load irq_cvm_ready EXT_MODE OUT_IM_SIG12 OUT_IM_MAG12 .. Dumper data_collector_inst ahb_* .. master_out cvm_start_in cvm_start_out nf_start_in nf_start_out cpu_clk resetn bf_out_re_0 crpa_in_7 crpa_in_1 bf_out_re_1 bf_out_re_6 14 nf_out_0 16bf_out_re_2 16bf_out_re_3 16bf_out_re_4 16bf_out_re_5 12bf_im_mag 12bf_re_sig 12bf_re_mag 12bf_im_sig adc_clk adc_clk Clock control CGC cvm_clk cvm_resetn nf_clk nf_resetn bf_clk bf_resetn AHB adc_clk unsign 15 15 15 out_data0 out_data1 out_data6 15 out_data2 15 out_data3 15 out_data4 15 out_data5 adc_clk SYNC_ADC1 PADS Ad0_CS Ad1_CS Ad2_CS 1 1 1 PADS 1 LVDS DDR 8 1 8 1 8 1 8 1 8 1 8 1 8 1 8 1 2x8ADC0 CLK0_0 2x1 2x8ADC1 CLK0_1 2x1 2x8ADC2 CLK0_2 2x1 2x8ADC3 CLK0_3 2x1 2x8ADC4 CLK0_4 2x1 2x8ADC5 CLK0_5 2x1 2x8ADC6 CLK0_6 2x1 2x8ADC7 CLK0_7 2x1 16 1 16 1 16 1 16 1 16 1 16 1 16 1 16 1 SPI CS1 1 PADS 1 1 1 1 1 1 1 1 7 16 16 7 16 16 GPIO valid1 D D adc_clk ext_mode SDR aresetn_adc 2 2 2 2 addr wdata rdata wr_en rd_en 32 20 32
  • 9. GNSS/INS integration Integrated navigation: • GNSS/MEMS (AD16405, STIM300) • Dead reckoning (NV-08C and ABS) • Pedestrian navigation 27-31 order EKF scheme for 600MHz CPU:
  • 10. Not only receivers L-band signals transceivers: • GNSS simulator • GNSS spoofer • Pseudolites (local nav) FE MAX2769 FE MAX2769 TCXO GK99-TK LPF 22 MHz IQ-mod TITRF3722 Amplifier ZRL-2400LN НАП Oryx Xilinx Zynq DAC Q AD9707 ARM + FPGA DAC I AD9707 Ethernet UART GLN L1 GPS L1, Clk LPF 22 MHz SpoofMachine
  • 11. Clonicus Clonicus is our new base board: • Novatel OEM719 pin2pin (46x71 mm) • L1/L2/L3/L5 GNSS bands • Zynq 7030 or 7045 • MEMS IMU • extension shields: - AD9364 transceiver, - time sync, - GNSS goniometer, - STAP
  • 12. Clonicus AD9364Shield AD9364Shield is an extension board: • up to 6GHz transceiver • time sync input/output • designed for: - GNSS CORS - GNSS simulation - pseudolites Zynq System Zynq System DC/DC NT 1065 PPS OUT RF OUT RF IN PPS IN REF IN ANT IN AD9364 DC/DC SPI TX RX B PPS GUNPPS GUN B RX, TX RefCtrlExt TI DP83867 ETH USB MEZ1 MEZ2 PLD LiBat 3.3V NT 1065 Clk RefCtrlInt TCXO DATA_CLK LS 1.8V ? V 4 .. 5.5V B B B B PPS RST Marker0 Marker1 Trig0 JTAG AD_REF_IN 3.3V TCXO NT_REF_IN B NT_REF_IN diff 100 Ohm 1.3V 1.8V 3.3V B PPS IN 1.8V Data MEZ2_Rem MEZ1_Rem 50 Ohm 3.3V ~1 ns front RST PB RB PLDcpy FTDIUART1
  • 13. Contacts Thank you! Navigation Systems Laboratory Moscow Power Engineering Institute Ilya V. Korogodin korogodiniv@gmail.com www.srns.ru