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SIPHRA  16-­‐
Channel  SiPM  
Readout  ASIC
For	
  the	
  IDEAS	
  Team:	
  
Dirk	
  Meier,	
  dirk.meier@ideas.no	
  
	
  
NDIP	
  2017,	
  Tour,	
  France,	
  	
  
3-­‐7	
  July	
  2017.	
  
	
  
SIPHRA  Designed  for  
Gamma  Ray  
Spectroscopy  in  Space
Background	
  
	
  
•  Future	
  high-­‐energy	
  astrophysics	
  missions	
  and	
  
gamma-­‐ray	
  observatories	
  	
  
•  High	
  performance	
  requirements	
  
•  Large	
  scinOllators	
  (LaBr)	
  with	
  thousands	
  of	
  
SiPMs	
  
•  ESA	
  ongoing	
  acOvity	
  in	
  LaBr+SiPM	
  for	
  space	
  
2017-­‐07-­‐06	
  
SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   2	
  
State-­‐of-­‐the-­‐Art  MA-­‐PMT  
Readout  for  Gamma  Ray  
Spectroscopy
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
  3	
  
ROSMAP	
  by	
  IDEAS	
  
ReadOut	
  System	
  for	
  MulO-­‐Anode	
  PhotomulOplier	
  Tubes,	
  
Hamamatsu	
  H5800C	
  and	
  H12700.	
  
	
  
However,	
  compared	
  with	
  MA-­‐PMT,	
  some	
  applicaOon	
  require	
  
	
  
•  No	
  or	
  lower	
  detector	
  supply	
  voltage	
  
•  More	
  sensors,	
  and	
  less	
  power	
  	
  
•  Smaller/thinner	
  sensor	
  
•  Less	
  mass	
  
•  InsensiOve	
  to	
  magneOc	
  fields	
  
•  Lower	
  cost	
  
•  Faster	
  photon	
  response	
  
•  Be]er	
  uniformity,	
  less	
  cross	
  talk	
  
SiPM	
  arrays	
  can	
  meet	
  these	
  requirements,	
  and	
  
Hence,	
  need	
  for	
  readout	
  of	
  SiPM	
  arrays.	
  
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   4	
  
Ulyanov	
  et	
  al.,	
  “Study	
  of	
  silicon	
  photomulOpliers	
  for	
  the	
  readout	
  of	
  scinOllator	
  	
  
crystals	
  in	
  the	
  proposed	
  GRIPS	
  gamma-­‐ray	
  astronomy	
  mission”,	
  	
  	
  
Proc.	
  of	
  Science,	
  arXiv:1302.5786v1	
  
Detector  Module:  LaBr  ScinFllator  &  SiPMs
Source:	
  UCD	
  
Photo  Sensor  Array  Readout
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   5	
  
Output	
  data,	
  e.g.,	
  bit/s	
  
Input	
  data,	
  e.g.,	
  flux	
  of	
  events	
  and	
  background,	
  #/s/sensor	
  area	
  	
  
	
  
•  Data	
  conversion	
  
•  Data	
  reducOon/discriminaOon	
  
•  Interface	
  between	
  sensor	
  and	
  
system	
  
	
  
Sensor*	
   Sensor	
  Readout	
  
*E.g.,	
  SiPM	
  array,	
  1D	
  or	
  2D	
  
Block  Diagram  of  System  Components
2017-­‐07-­‐06	
   6	
  SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
  
Detector	
  
module	
  
(SiPM)	
  
SiPM  -­‐  Silicon  PhotomulFplier  
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   7	
  
600pC	
  ≈​100mV  ∗100ns/16Ω 	
  
Array	
  of	
  SiPM,	
  each	
  SiPM	
  has	
  
•  Large	
  electrical	
  charge	
  –	
  many	
  pC	
  	
  
•  Large	
  capacitance	
  –	
  many	
  nF	
  
•  Dark	
  counts	
  –	
  kHz	
  
	
  
How  to  Connect  an  SiPM  to  a  SIPHRA  
Analog  Input
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   8	
  
SIPHRA	
  has	
  16	
  inputs,	
  each	
  with	
  a	
  
Current	
  Mode	
  Input	
  Stage	
  (CMIS)	
  
CMIS  -­‐  Current  Mode  Input  Stage  
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   9	
  
CMIS	
  main	
  funcOons	
  and	
  performance:	
  	
  
1.  stable	
  programmable	
  input	
  voltage	
  at	
  AIN.	
  	
  
2.  to	
  scale	
  down	
  the	
  detector	
  current	
  	
  
•  Designed	
  for	
  large	
  negaOve	
  charge	
  
SaturaOon:	
  -16	
  nC,	
  -8	
  nC,	
  -4	
  nC,	
  -0.4	
  nC	
  
•  Programmable	
  gain	
  a]enuaOon:	
  
	
  1/10,	
  1/100,	
  1/200,	
  and	
  1/400	
  
•  Large	
  capaciOve	
  load	
  up	
  to	
  several	
  nF,	
  
•  Large	
  leakage	
  current	
  up	
  to	
  -100	
  µA.	
  	
  
•  Input	
  voltage	
  is	
  regulated	
  to	
  a	
  stable	
  bias	
  	
  
	
  voltage	
  set	
  via	
  an	
  8-­‐bit	
  DAC	
  
	
  over	
  the	
  range	
  of	
  1	
  V.	
  	
  
•  Input	
  impedance	
  5..30	
  Ohm	
  below	
  10	
  MHz.	
  Above	
  
10	
  MHz,	
  input	
  impedance	
  becomes	
  reacOve	
  and	
  
peaks	
  with	
  a	
  few	
  100	
  Ohm	
  at	
  250	
  MHz.	
  	
  
	
  
Common-­‐gate	
  input	
  
(regulates	
  DC	
  bias)	
  
Input	
  voltage	
  is	
  
regulated	
  to	
  a	
  stable	
  
bias	
  	
  voltage	
  set	
  via	
  
an	
  8-­‐bit	
  DAC	
  
over	
  the	
  range	
  of	
  
1	
  V.	
  	
  
Bias	
  current	
  0-­‐20µA.	
  	
  
Needed	
  to	
  keep	
  
current	
  mirror	
  ready	
  
for	
  fast	
  transients.	
  
SIPHRA  Features  and    
Block  Diagram
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   10	
  
IDE3380	
  SIPHRA	
  Features	
  
	
  
	
  
16	
  channels	
  for	
  SiPM/PMT	
  readout	
  
16	
  current	
  sensiOve	
  inputs	
  (≤	
  16	
  nC)	
  
1	
  summing	
  channel	
  
Programmable	
  aGenuaHon	
  to	
  handle	
  charge	
  up	
  to	
  
-­‐16	
  nC,	
  -­‐8	
  nC,	
  -­‐4	
  nC,	
  -­‐400	
  pC	
  at	
  AIN	
  inputs,	
  or	
  
+40	
  pC,	
  +4	
  pC,	
  +0.4	
  pC	
  at	
  FIN	
  inputs	
  
Programmable	
  shaping	
  Hme	
  
200	
  ns,	
  400	
  ns,	
  800	
  ns,	
  1600	
  ns	
  
16	
  inputs	
  (AIN)	
  with	
  programmable	
  offset	
  voltage	
  
Pulse	
  height	
  spectroscopy	
  
16	
  shapers	
  followed	
  by	
  track-­‐and-­‐hold	
  
Programmable	
  hold	
  Oming	
  
	
  12-­‐bit	
  SAR	
  ADC	
  digital	
  and/or	
  analog	
  readout	
  
3	
  ksps/channel	
  max.	
  
Trigger	
  generaHon	
  
	
  Internal	
  from	
  charge	
  discriminator	
  via	
  	
  
programmable	
  threshold	
  in	
  every	
  channel	
  
External	
  (trigger	
  on	
  input,	
  trigger	
  on	
  sum)	
  
Power	
  
15	
  mW	
  without	
  CMIS,	
  30	
  mW	
  with	
  CMIS	
  acOve	
  
	
  Flexible	
  power	
  down	
  scheme	
  of	
  channels	
  or	
  funcOons	
  
SEL/SEU	
  radiaHon	
  hardened	
  
SPI	
  Interface	
  
Current  Integrator  and  Shaper
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   11	
  
Current Integrator Shaper
SIPHRA  Architecture
2017-­‐07-­‐06	
   12	
  SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
  
Digital  Readout  Flow
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   13	
  
SIPHRA  Floorplan  and  Pad  Frame
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   14	
  
Chip	
  acOve	
  area:	
  7.6	
  mm×6.8	
  mm,	
  103	
  (1191))	
  Pins	
  
Planned	
  Packaging	
  OpOons:	
  PlasOc	
  PQFP120,	
  Bare-­‐Die	
  
1)	
  Normally	
  either	
  16	
  AIN	
  or	
  16	
  FIN	
  inputs	
  will	
  be	
  bonded,	
  not	
  both.	
  	
  
Development  
System  with  
SiPM/LaBr
2017-­‐07-­‐06	
  
SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   15	
  
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   16	
  
IDEAS	
  Galao	
  development	
  kit	
  to	
  interface	
  to	
  TOIC	
  test	
  PCB.	
  The	
  Galao	
  
development	
  kit	
  is	
  based	
  on	
  the	
  Xilinx	
  Zynq-­‐7000	
  with	
  custom	
  
firmware	
  for	
  the	
  SIPHRA	
  ASIC	
  readout	
  and	
  control.	
  The	
  system	
  is	
  
controlled	
  via	
  Ethernet	
  (GbE)	
  from	
  a	
  computer.	
  The	
  SIPHRA	
  ASIC	
  is	
  
located	
  on	
  the	
  ROIC	
  test	
  board,	
  which	
  allows	
  one	
  to	
  connect	
  to	
  the	
  
detector	
  array.	
  
IDE3380  Development  System
Block	
  diagram	
  of	
  the	
  ASIC	
  design	
  validaOon	
  and	
  test	
  system.	
  
Sorware	
  	
  
(Python	
  ScripOng,	
  	
  	
  
LabView	
  API)	
  	
  
Results  -­‐  Gamma  Ray  Spectroscopy    
with  SIPHRA  LaBr/SiPM
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   17	
  
Na-­‐22	
  
4%	
  FWHM	
  
511	
  keV	
  
For	
  comparison:	
  same	
  LaBr/SiPM,	
  discrete	
  readout	
  
A.Ulyanov	
  et	
  al.,	
  Nucl.	
  Instr.	
  Meth.	
  A	
  810	
  (2016)	
  
	
  
Dynamic  Range,  Trigger  Range
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   18	
  
CMIS	
  
gain	

Trigger	
  threshold	
  	
  
charge	
  range	

Minimum	

 Maximum	

1/10	

 -­‐4	
  pC	

 -­‐560	
  pC	

1/100	
   -­‐43	
  pC	

 -­‐5.4	
  nC	

1/200	

 -­‐87	
  pC	

 -­‐10.8	
  nC	
  	

1/400	

 -­‐175	
  pC	

 -­‐20.9	
  nC
Dynamic  Range,  Noise
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   19	
  
•  Analog	
  readout:	
  	
  
•  Dynamic	
  range	
  65	
  dB	
  
–	
  78	
  dB	
  (simulaOon)	
  
	
  
•  Digital	
  readout:	
  
•  10.8	
  bit	
  –	
  11.5	
  bit	
  
(ADC	
  limit)	
  
•  Cross-­‐talk	
  0.1%	
  
•  Post-­‐Layout	
  
simulaOon	
  (Ideal	
  
supply,	
  Excl.	
  package	
  
bonds,	
  leads.)	
  
	
  	
   	
  	
  
SimulaHon	
   Measurement	
  
CMIS	
  gain	
   Shaping	
  
Hme	
  [ns]	
  
SaturaHon	
  
charge	
  [pC]	
  
ENC	
  [pC]	
  at	
  
3.3	
  nF	
  load	
  
Dynamic	
  
range	
  	
  
SaturaHon	
  	
  
charge	
  [pC]	
  
ENC	
  [pC]	
  
at	
  0	
  load	
  
ENC	
  [pF]	
  
at	
  3.3	
  nF	
  
load	
  	
  
1/10	
   200	
   -­‐510	
   0.24	
   2125	
   -­‐525	
   0.11	
   0.21	
  
400	
   	
  	
   0.28	
   1821	
   	
  	
   0.10	
   0.21	
  
800	
   	
  	
   0.28	
   1821	
   	
  	
   0.11	
   0.20	
  
1600	
   	
  	
   0.28	
   1821	
   	
  	
   0.12	
   0.19	
  
1/100	
   200	
   -­‐4980	
   0.83	
   6000	
   -­‐5000	
   1.05	
   1.05	
  
400	
   	
  	
   0.73	
   6822	
   	
  	
   0.97	
   0.96	
  
800	
   	
  	
   0.67	
   7433	
   	
  	
   0.93	
   0.92	
  
1600	
   	
  	
   0.63	
   7904	
   	
  	
   0.90	
   0.88	
  
1/200	
   200	
   -­‐9830	
   1.62	
   6068	
   -­‐10000	
   2.09	
   2.06	
  
400	
   	
  	
   1.40	
   7021	
   	
  	
   1.92	
   1.89	
  
800	
   	
  	
   1.28	
   7680	
   	
  	
   1.84	
   1.79	
  
1600	
   	
  	
   1.18	
   8331	
   	
  	
   1.78	
   1.73	
  
1/400	
   200	
   -­‐19500	
   3.27	
   5963	
   -­‐20000	
   4.30	
   4.22	
  
400	
   	
  	
   2.80	
   6964	
   	
  	
   3.92	
   3.86	
  
800	
   	
  	
   2.56	
   7617	
   	
  	
   3.78	
   3.78	
  
1600	
   	
  	
   2.37	
   8228	
   	
  	
   3.62	
   3.87	
  
12-­‐bit  ADC  
50+  ksps
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   20	
  
[1]	
  Standby	
  mode	
  is	
  when	
  the	
  ADC	
  and	
  its	
  reference	
  buffers	
  are	
  subjected	
  to	
  intermediate	
  wake	
  ups,	
  in	
  order	
  to	
  be	
  able	
  to	
  wake	
  up	
  within	
  one	
  clock	
  cycle	
  (given	
  Tclk	
  >	
  1	
  us).	
  
IDEAS  RadiaFon  
Tolerant  Standard  
Cell  Libray
2017-­‐07-­‐06	
  SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   21	
  of	
  18	
  
•  0.35µm	
  AMS	
  CMOS	
  
•  Small	
  Library	
  (<50	
  cells)	
  
•  Synthesis	
  and	
  ImplementaOon	
  
	
  with	
  Cadence	
  tools	
  
•  SEE	
  tests	
  at	
  UCL	
  HIF	
  
•  SEU	
  LETth	
  	
  50	
  MeVcm
2
/mg	
  
•  SEL	
  LETth	
  ≥	
  135	
  MeVcm
2
/mg	
  
Pahlsson	
  et	
  al.,	
  SPIE	
  DSS	
  IR	
  Technology,	
  	
  
h]p://dx.doi.org/10.1117/12.2180439	
  
VA32HDR14.2	
  
and	
  .3	
  
• CALET	
  
VATA64HDR16	
  
• RICH	
  (SPIDER)	
  
IDE3380	
  SIPHRA	
  
• TBD	
  
IDE-­‐XXXX	
  
Pending	
  user	
  
Feedback!	
  E.g.	
  
• More	
  channels	
  
• ADC/TDC	
  
• Lower	
  Power	
  
SIPRA  ASIC  Roadmap
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   22	
  
	
  
Lower	
  
	
  Mass	
  
	
  Volume	
  
	
  Power	
  
	
  Cost	
  
	
  
More	
  
	
  FuncHons	
  
	
  Channels	
  
	
  Performance	
  
•  IDEAS	
  has	
  tested	
  various	
  SiPM	
  since	
  2003,	
  and	
  has	
  developed	
  
readout	
  ASICs	
  for	
  MAPMT,	
  APD	
  arrays,	
  and	
  SiPM	
  arrays	
  
•  VA32HDR14.2	
  and	
  VA32HDR14.3	
  used	
  in	
  CALET	
  
•  VATA64HDR16.2	
  used	
  in	
  RICH/SPIDER	
  
•  The	
  IDE3380	
  SIPHRA	
  is	
  for	
  	
  
gamma	
  ray	
  spectroscopy	
  with	
  	
  
LaBr/SiPM	
  arrays,	
  and	
  can	
  	
  
easily	
  be	
  connected	
  and	
  	
  
operated	
  with	
  micro-­‐	
  
controller	
  only	
  	
  
(no	
  FPGA).	
  	
  
Next  Steps
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   23	
  
•  RadiaOon	
  (SEE,	
  TID)	
  qualificaOon	
  
	
  
•  TesOng	
  by	
  interested	
  scienOsts	
  and	
  engineers	
  
•  Raise	
  the	
  TRL	
  beyond	
  4	
  and/or	
  opOmize	
  
funcOons	
  or	
  performance,	
  e.g.,	
  more	
  channels,	
  
lower	
  power,	
  include	
  Ome-­‐to-­‐digital	
  converter	
  
TDC.	
  
Monolithic	
  LaBr/SiPM,	
  Image	
  Univ.	
  College	
  
Dublin,	
  SensL	
  SiPM	
  array	
  16	
  SiPMs,	
  and	
  
IDE3380	
  Readout	
  System	
  
Next  -­‐  SIPHRA  for  Prototyping  ApplicaFons
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   24	
  
N	
   Feature	
  in	
  SIPHRA	
   Technology/ApplicaHon	
   Comment	
  
1	
   Only	
  power-­‐up	
  the	
  channels	
  needed,	
  others	
  are	
  
power-­‐down.	
  On-­‐chip	
  ADC	
  powers	
  up	
  only	
  
when	
  needed.	
  Sleep	
  otherwise.	
  
Wearable	
  gamma-­‐ray	
  
spectrometer/dosimeter	
  
with	
  SiPM+scinOllator	
  
Low-­‐power.	
  One	
  single	
  or	
  
summing	
  channel	
  might	
  be	
  
sufficient.	
  Histogramming	
  off-­‐chip.	
  
2	
   Timed	
  digital	
  trigger	
  output	
  from	
  every	
  channel	
  
of	
  SIPHRA	
  
PET	
  –	
  Positron	
  Emission	
  
Tomography	
  
Time	
  stamp	
  requires	
  external	
  Ome-­‐
to-­‐digital	
  converter	
  (TDC),	
  for	
  
example,	
  in	
  FGPGA.	
  
3	
   Time-­‐over-­‐threshold	
  (TOT)	
  from	
  every	
  channel	
  
4	
   Analogue	
  waveform	
  output	
  from	
  every	
  
channels,	
  either	
  arer	
  integrator	
  or	
  shaper	
  
ConOnuous	
  waveform	
  
sampling,	
  high-­‐dynamic	
  
range	
  spectroscopy	
  
Requires	
  external	
  fast	
  sampling	
  
ADC	
  for	
  every	
  channel.	
  
5	
   Digital	
  trigger	
  from	
  any	
  channel,	
  individually	
  
programmable	
  threshold	
  
X-­‐ray	
  counOng,	
  energy	
  
resolved	
  
Requires	
  external	
  counters,	
  for	
  
example,	
  in	
  FPGA.	
  
You	
  are	
  welcome	
  to	
  explore	
  these	
  SIPHRA	
  features.	
  
References
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   25	
  
Meier,	
  D.,	
  et	
  al.	
  (IDEAS),	
  An	
  ASIC	
  for	
  SiPM/MPPC	
  readout,	
  Nuclear	
  Science	
  Symposium	
  
Conference	
  Record	
  (NSS/MIC),	
  2010	
  IEEE	
  (2010).	
  
	
  
Meier	
  et	
  al.	
  (IDEAS),	
  SIPHRA	
  16-­‐Channel	
  Silicon	
  Photomul7plier	
  Readout	
  ASIC,	
  Proc.	
  ESA	
  
AMICSA	
  workshop,	
  Gothenburg,	
  2016,	
  
h]ps://indico.esa.int/indico/event/102/session/8/contribuOon/6	
  
	
  
Ulianov	
  A.,	
  et	
  al.,	
  Using	
  the	
  SIPHRA	
  ASIC	
  with	
  an	
  SiPM	
  array	
  and	
  scin<llators	
  for	
  gamma	
  
spectroscopy,	
  accepted	
  at	
  IEEE	
  NSS	
  2017.	
  
	
  
Summary
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   26	
  
•  SiPM	
  Readout	
  ASIC	
  development,	
  completed,	
  and	
  wafers	
  have	
  
been	
  manufactured.	
  Bare	
  chips	
  available	
  from	
  IDEAS.	
  
•  Electronic	
  characterizaOon	
  (design	
  validaOon)	
  completed.	
  
•  Engineering	
  samples	
  bare	
  chips	
  and	
  test	
  hardware	
  	
  
delivered	
  to	
  ESA.	
  
•  Possible	
  follow-­‐up	
  acOviOes	
  and	
  prototyping/demonstraOons:	
  	
  
•  Nuclear	
  Medicine:	
  PET,	
  SPECT	
  
•  Science:	
  gamma	
  ray	
  spectroscopy,	
  calorimetry,	
  dosimetry	
  
•  Space:	
  Fiber	
  calorimetry,	
  gamma	
  ray	
  spectroscopy,	
  CubeSats	
  
•  Industrial:	
  X-­‐ray	
  counOng,	
  pipe	
  flow-­‐tomography	
  
Thank  You
2017-­‐07-­‐06	
   SIPHRA	
  -­‐	
  SiPM	
  Readout	
  ASIC	
   27	
  
Acknowledgements	
  
European	
  Space	
  Agency	
  (ESA	
  
contract	
  number	
  4000113026),	
  
the	
  Norwegian	
  Space	
  Center	
  
(contract	
  number	
  BAS.05.14.1),	
  
and	
  the	
  University	
  of	
  Geneva.	
  
	
  
Contact	
  
Dirk	
  Meier,	
  
Research	
  Director	
  at	
  IDEAS	
  
dirk.meier@ideas.no	
  
Oslo,	
  Norway	
  

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SIPHRA 16-Channel SiPM Readout ASIC

  • 1. SIPHRA  16-­‐ Channel  SiPM   Readout  ASIC For  the  IDEAS  Team:   Dirk  Meier,  dirk.meier@ideas.no     NDIP  2017,  Tour,  France,     3-­‐7  July  2017.    
  • 2. SIPHRA  Designed  for   Gamma  Ray   Spectroscopy  in  Space Background     •  Future  high-­‐energy  astrophysics  missions  and   gamma-­‐ray  observatories     •  High  performance  requirements   •  Large  scinOllators  (LaBr)  with  thousands  of   SiPMs   •  ESA  ongoing  acOvity  in  LaBr+SiPM  for  space   2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   2  
  • 3. State-­‐of-­‐the-­‐Art  MA-­‐PMT   Readout  for  Gamma  Ray   Spectroscopy 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC  3   ROSMAP  by  IDEAS   ReadOut  System  for  MulO-­‐Anode  PhotomulOplier  Tubes,   Hamamatsu  H5800C  and  H12700.     However,  compared  with  MA-­‐PMT,  some  applicaOon  require     •  No  or  lower  detector  supply  voltage   •  More  sensors,  and  less  power     •  Smaller/thinner  sensor   •  Less  mass   •  InsensiOve  to  magneOc  fields   •  Lower  cost   •  Faster  photon  response   •  Be]er  uniformity,  less  cross  talk   SiPM  arrays  can  meet  these  requirements,  and   Hence,  need  for  readout  of  SiPM  arrays.  
  • 4. 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   4   Ulyanov  et  al.,  “Study  of  silicon  photomulOpliers  for  the  readout  of  scinOllator     crystals  in  the  proposed  GRIPS  gamma-­‐ray  astronomy  mission”,       Proc.  of  Science,  arXiv:1302.5786v1   Detector  Module:  LaBr  ScinFllator  &  SiPMs Source:  UCD  
  • 5. Photo  Sensor  Array  Readout 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   5   Output  data,  e.g.,  bit/s   Input  data,  e.g.,  flux  of  events  and  background,  #/s/sensor  area       •  Data  conversion   •  Data  reducOon/discriminaOon   •  Interface  between  sensor  and   system     Sensor*   Sensor  Readout   *E.g.,  SiPM  array,  1D  or  2D  
  • 6. Block  Diagram  of  System  Components 2017-­‐07-­‐06   6  SIPHRA  -­‐  SiPM  Readout  ASIC   Detector   module   (SiPM)  
  • 7. SiPM  -­‐  Silicon  PhotomulFplier   2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   7   600pC  ≈​100mV  ∗100ns/16Ω    Array  of  SiPM,  each  SiPM  has   •  Large  electrical  charge  –  many  pC     •  Large  capacitance  –  many  nF   •  Dark  counts  –  kHz    
  • 8. How  to  Connect  an  SiPM  to  a  SIPHRA   Analog  Input 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   8   SIPHRA  has  16  inputs,  each  with  a   Current  Mode  Input  Stage  (CMIS)  
  • 9. CMIS  -­‐  Current  Mode  Input  Stage   2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   9   CMIS  main  funcOons  and  performance:     1.  stable  programmable  input  voltage  at  AIN.     2.  to  scale  down  the  detector  current     •  Designed  for  large  negaOve  charge   SaturaOon:  -16  nC,  -8  nC,  -4  nC,  -0.4  nC   •  Programmable  gain  a]enuaOon:    1/10,  1/100,  1/200,  and  1/400   •  Large  capaciOve  load  up  to  several  nF,   •  Large  leakage  current  up  to  -100  µA.     •  Input  voltage  is  regulated  to  a  stable  bias      voltage  set  via  an  8-­‐bit  DAC    over  the  range  of  1  V.     •  Input  impedance  5..30  Ohm  below  10  MHz.  Above   10  MHz,  input  impedance  becomes  reacOve  and   peaks  with  a  few  100  Ohm  at  250  MHz.       Common-­‐gate  input   (regulates  DC  bias)   Input  voltage  is   regulated  to  a  stable   bias    voltage  set  via   an  8-­‐bit  DAC   over  the  range  of   1  V.     Bias  current  0-­‐20µA.     Needed  to  keep   current  mirror  ready   for  fast  transients.  
  • 10. SIPHRA  Features  and     Block  Diagram 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   10   IDE3380  SIPHRA  Features       16  channels  for  SiPM/PMT  readout   16  current  sensiOve  inputs  (≤  16  nC)   1  summing  channel   Programmable  aGenuaHon  to  handle  charge  up  to   -­‐16  nC,  -­‐8  nC,  -­‐4  nC,  -­‐400  pC  at  AIN  inputs,  or   +40  pC,  +4  pC,  +0.4  pC  at  FIN  inputs   Programmable  shaping  Hme   200  ns,  400  ns,  800  ns,  1600  ns   16  inputs  (AIN)  with  programmable  offset  voltage   Pulse  height  spectroscopy   16  shapers  followed  by  track-­‐and-­‐hold   Programmable  hold  Oming    12-­‐bit  SAR  ADC  digital  and/or  analog  readout   3  ksps/channel  max.   Trigger  generaHon    Internal  from  charge  discriminator  via     programmable  threshold  in  every  channel   External  (trigger  on  input,  trigger  on  sum)   Power   15  mW  without  CMIS,  30  mW  with  CMIS  acOve    Flexible  power  down  scheme  of  channels  or  funcOons   SEL/SEU  radiaHon  hardened   SPI  Interface  
  • 11. Current  Integrator  and  Shaper 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   11   Current Integrator Shaper
  • 12. SIPHRA  Architecture 2017-­‐07-­‐06   12  SIPHRA  -­‐  SiPM  Readout  ASIC  
  • 13. Digital  Readout  Flow 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   13  
  • 14. SIPHRA  Floorplan  and  Pad  Frame 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   14   Chip  acOve  area:  7.6  mm×6.8  mm,  103  (1191))  Pins   Planned  Packaging  OpOons:  PlasOc  PQFP120,  Bare-­‐Die   1)  Normally  either  16  AIN  or  16  FIN  inputs  will  be  bonded,  not  both.    
  • 15. Development   System  with   SiPM/LaBr 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   15  
  • 16. 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   16   IDEAS  Galao  development  kit  to  interface  to  TOIC  test  PCB.  The  Galao   development  kit  is  based  on  the  Xilinx  Zynq-­‐7000  with  custom   firmware  for  the  SIPHRA  ASIC  readout  and  control.  The  system  is   controlled  via  Ethernet  (GbE)  from  a  computer.  The  SIPHRA  ASIC  is   located  on  the  ROIC  test  board,  which  allows  one  to  connect  to  the   detector  array.   IDE3380  Development  System Block  diagram  of  the  ASIC  design  validaOon  and  test  system.   Sorware     (Python  ScripOng,       LabView  API)    
  • 17. Results  -­‐  Gamma  Ray  Spectroscopy     with  SIPHRA  LaBr/SiPM 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   17   Na-­‐22   4%  FWHM   511  keV   For  comparison:  same  LaBr/SiPM,  discrete  readout   A.Ulyanov  et  al.,  Nucl.  Instr.  Meth.  A  810  (2016)    
  • 18. Dynamic  Range,  Trigger  Range 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   18   CMIS   gain Trigger  threshold     charge  range Minimum Maximum 1/10 -­‐4  pC -­‐560  pC 1/100   -­‐43  pC -­‐5.4  nC 1/200 -­‐87  pC -­‐10.8  nC   1/400 -­‐175  pC -­‐20.9  nC
  • 19. Dynamic  Range,  Noise 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   19   •  Analog  readout:     •  Dynamic  range  65  dB   –  78  dB  (simulaOon)     •  Digital  readout:   •  10.8  bit  –  11.5  bit   (ADC  limit)   •  Cross-­‐talk  0.1%   •  Post-­‐Layout   simulaOon  (Ideal   supply,  Excl.  package   bonds,  leads.)           SimulaHon   Measurement   CMIS  gain   Shaping   Hme  [ns]   SaturaHon   charge  [pC]   ENC  [pC]  at   3.3  nF  load   Dynamic   range     SaturaHon     charge  [pC]   ENC  [pC]   at  0  load   ENC  [pF]   at  3.3  nF   load     1/10   200   -­‐510   0.24   2125   -­‐525   0.11   0.21   400       0.28   1821       0.10   0.21   800       0.28   1821       0.11   0.20   1600       0.28   1821       0.12   0.19   1/100   200   -­‐4980   0.83   6000   -­‐5000   1.05   1.05   400       0.73   6822       0.97   0.96   800       0.67   7433       0.93   0.92   1600       0.63   7904       0.90   0.88   1/200   200   -­‐9830   1.62   6068   -­‐10000   2.09   2.06   400       1.40   7021       1.92   1.89   800       1.28   7680       1.84   1.79   1600       1.18   8331       1.78   1.73   1/400   200   -­‐19500   3.27   5963   -­‐20000   4.30   4.22   400       2.80   6964       3.92   3.86   800       2.56   7617       3.78   3.78   1600       2.37   8228       3.62   3.87  
  • 20. 12-­‐bit  ADC   50+  ksps 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   20   [1]  Standby  mode  is  when  the  ADC  and  its  reference  buffers  are  subjected  to  intermediate  wake  ups,  in  order  to  be  able  to  wake  up  within  one  clock  cycle  (given  Tclk  >  1  us).  
  • 21. IDEAS  RadiaFon   Tolerant  Standard   Cell  Libray 2017-­‐07-­‐06  SIPHRA  -­‐  SiPM  Readout  ASIC   21  of  18   •  0.35µm  AMS  CMOS   •  Small  Library  (<50  cells)   •  Synthesis  and  ImplementaOon    with  Cadence  tools   •  SEE  tests  at  UCL  HIF   •  SEU  LETth    50  MeVcm 2 /mg   •  SEL  LETth  ≥  135  MeVcm 2 /mg   Pahlsson  et  al.,  SPIE  DSS  IR  Technology,     h]p://dx.doi.org/10.1117/12.2180439  
  • 22. VA32HDR14.2   and  .3   • CALET   VATA64HDR16   • RICH  (SPIDER)   IDE3380  SIPHRA   • TBD   IDE-­‐XXXX   Pending  user   Feedback!  E.g.   • More  channels   • ADC/TDC   • Lower  Power   SIPRA  ASIC  Roadmap 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   22     Lower    Mass    Volume    Power    Cost     More    FuncHons    Channels    Performance   •  IDEAS  has  tested  various  SiPM  since  2003,  and  has  developed   readout  ASICs  for  MAPMT,  APD  arrays,  and  SiPM  arrays   •  VA32HDR14.2  and  VA32HDR14.3  used  in  CALET   •  VATA64HDR16.2  used  in  RICH/SPIDER   •  The  IDE3380  SIPHRA  is  for     gamma  ray  spectroscopy  with     LaBr/SiPM  arrays,  and  can     easily  be  connected  and     operated  with  micro-­‐   controller  only     (no  FPGA).    
  • 23. Next  Steps 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   23   •  RadiaOon  (SEE,  TID)  qualificaOon     •  TesOng  by  interested  scienOsts  and  engineers   •  Raise  the  TRL  beyond  4  and/or  opOmize   funcOons  or  performance,  e.g.,  more  channels,   lower  power,  include  Ome-­‐to-­‐digital  converter   TDC.   Monolithic  LaBr/SiPM,  Image  Univ.  College   Dublin,  SensL  SiPM  array  16  SiPMs,  and   IDE3380  Readout  System  
  • 24. Next  -­‐  SIPHRA  for  Prototyping  ApplicaFons 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   24   N   Feature  in  SIPHRA   Technology/ApplicaHon   Comment   1   Only  power-­‐up  the  channels  needed,  others  are   power-­‐down.  On-­‐chip  ADC  powers  up  only   when  needed.  Sleep  otherwise.   Wearable  gamma-­‐ray   spectrometer/dosimeter   with  SiPM+scinOllator   Low-­‐power.  One  single  or   summing  channel  might  be   sufficient.  Histogramming  off-­‐chip.   2   Timed  digital  trigger  output  from  every  channel   of  SIPHRA   PET  –  Positron  Emission   Tomography   Time  stamp  requires  external  Ome-­‐ to-­‐digital  converter  (TDC),  for   example,  in  FGPGA.   3   Time-­‐over-­‐threshold  (TOT)  from  every  channel   4   Analogue  waveform  output  from  every   channels,  either  arer  integrator  or  shaper   ConOnuous  waveform   sampling,  high-­‐dynamic   range  spectroscopy   Requires  external  fast  sampling   ADC  for  every  channel.   5   Digital  trigger  from  any  channel,  individually   programmable  threshold   X-­‐ray  counOng,  energy   resolved   Requires  external  counters,  for   example,  in  FPGA.   You  are  welcome  to  explore  these  SIPHRA  features.  
  • 25. References 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   25   Meier,  D.,  et  al.  (IDEAS),  An  ASIC  for  SiPM/MPPC  readout,  Nuclear  Science  Symposium   Conference  Record  (NSS/MIC),  2010  IEEE  (2010).     Meier  et  al.  (IDEAS),  SIPHRA  16-­‐Channel  Silicon  Photomul7plier  Readout  ASIC,  Proc.  ESA   AMICSA  workshop,  Gothenburg,  2016,   h]ps://indico.esa.int/indico/event/102/session/8/contribuOon/6     Ulianov  A.,  et  al.,  Using  the  SIPHRA  ASIC  with  an  SiPM  array  and  scin<llators  for  gamma   spectroscopy,  accepted  at  IEEE  NSS  2017.    
  • 26. Summary 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   26   •  SiPM  Readout  ASIC  development,  completed,  and  wafers  have   been  manufactured.  Bare  chips  available  from  IDEAS.   •  Electronic  characterizaOon  (design  validaOon)  completed.   •  Engineering  samples  bare  chips  and  test  hardware     delivered  to  ESA.   •  Possible  follow-­‐up  acOviOes  and  prototyping/demonstraOons:     •  Nuclear  Medicine:  PET,  SPECT   •  Science:  gamma  ray  spectroscopy,  calorimetry,  dosimetry   •  Space:  Fiber  calorimetry,  gamma  ray  spectroscopy,  CubeSats   •  Industrial:  X-­‐ray  counOng,  pipe  flow-­‐tomography  
  • 27. Thank  You 2017-­‐07-­‐06   SIPHRA  -­‐  SiPM  Readout  ASIC   27   Acknowledgements   European  Space  Agency  (ESA   contract  number  4000113026),   the  Norwegian  Space  Center   (contract  number  BAS.05.14.1),   and  the  University  of  Geneva.     Contact   Dirk  Meier,   Research  Director  at  IDEAS   dirk.meier@ideas.no   Oslo,  Norway