International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Study of RF-MEMS Capacitive Shunt Switch for Microwave Backhaul Applications IOSRJECE
In this research paper, we have proposed a new type of capacitive shunt RF-MEMS switch. MicroElectro-Mechanical System (MEMS) is a combination of mechanical and electromagnetics properties at micro level unit. This MEMS switch can be used for switching purpose at RF and microwave frequencies, called RFMEMS switch. The RF-MEMS switch has a potential characteristics and superior performances at radio frequency. The MEMS switch has excellent advantages such as zero power consumption, high power handling capacity, high performance, and low inter-modulation distortion. In this proposed design, a new type of capacitive shunt switch is designed and analyzed for RF applications. The switch is designed both in UP and DOWN-states. The proposed switch design consists of substrate, co-planar waveguide (CPW), dielectric material and suspended metallic bridge. The proposed MEMS switch has dimension of 508 µm × 620 µm with a height of 500 µm and implemented on GaAs as a substrate material with relative permittivity of 12.9. The geometry and results of the proposed switch is designed using Ansoft HFSS electromagnetic simulator based on finite element method (FEM). The electrostatic and electromagnetic result showed better performances such as return loss, insertion loss and isolation. The switch has also excellent isolation property of -48 dB at 26 GHz.
This paper presents a highly efficient power transfer system based on a co-design of a class-E power amplifier (PA) and a pair of inductively coupled Helical coils for through-metal-wall power transfer. Power is transferred wirelessly through a 3.1-mm thick aluminum barrier without any physical penetration and contact. Measurement results show that the class-E PA achieves a peak power gain of 25.2 dB and a maximum collector efficiency of 57.3%, all at 200 Hz. The proposed system obtains a maximum power transfer efficiency of 9% and it can deliver 5 W power to the receiver side through the aluminum barrier.
Abstract
This paper deals with the RF (Radio Frequency)-MEMS (Micro-Electro-Mechanical-System) switch design using the coventorware software and its superiority over the existing technologies like PIN Diodes and Field-Effect-Transistors regarding size, power, Isolation and Insertion loss, and graphically how Pull-in voltage affects on the deflection of the switch. Also this paper deals with the fabrication process of the cantilever switch.
Keywords: Etching, Sacrificial Layer, Actuation Voltage, Electrostatic Force, RF Switch, PIN Diodes, Stiction, Isolation and Insertion loss.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Study of RF-MEMS Capacitive Shunt Switch for Microwave Backhaul Applications IOSRJECE
In this research paper, we have proposed a new type of capacitive shunt RF-MEMS switch. MicroElectro-Mechanical System (MEMS) is a combination of mechanical and electromagnetics properties at micro level unit. This MEMS switch can be used for switching purpose at RF and microwave frequencies, called RFMEMS switch. The RF-MEMS switch has a potential characteristics and superior performances at radio frequency. The MEMS switch has excellent advantages such as zero power consumption, high power handling capacity, high performance, and low inter-modulation distortion. In this proposed design, a new type of capacitive shunt switch is designed and analyzed for RF applications. The switch is designed both in UP and DOWN-states. The proposed switch design consists of substrate, co-planar waveguide (CPW), dielectric material and suspended metallic bridge. The proposed MEMS switch has dimension of 508 µm × 620 µm with a height of 500 µm and implemented on GaAs as a substrate material with relative permittivity of 12.9. The geometry and results of the proposed switch is designed using Ansoft HFSS electromagnetic simulator based on finite element method (FEM). The electrostatic and electromagnetic result showed better performances such as return loss, insertion loss and isolation. The switch has also excellent isolation property of -48 dB at 26 GHz.
This paper presents a highly efficient power transfer system based on a co-design of a class-E power amplifier (PA) and a pair of inductively coupled Helical coils for through-metal-wall power transfer. Power is transferred wirelessly through a 3.1-mm thick aluminum barrier without any physical penetration and contact. Measurement results show that the class-E PA achieves a peak power gain of 25.2 dB and a maximum collector efficiency of 57.3%, all at 200 Hz. The proposed system obtains a maximum power transfer efficiency of 9% and it can deliver 5 W power to the receiver side through the aluminum barrier.
Abstract
This paper deals with the RF (Radio Frequency)-MEMS (Micro-Electro-Mechanical-System) switch design using the coventorware software and its superiority over the existing technologies like PIN Diodes and Field-Effect-Transistors regarding size, power, Isolation and Insertion loss, and graphically how Pull-in voltage affects on the deflection of the switch. Also this paper deals with the fabrication process of the cantilever switch.
Keywords: Etching, Sacrificial Layer, Actuation Voltage, Electrostatic Force, RF Switch, PIN Diodes, Stiction, Isolation and Insertion loss.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
This presentation presents a review of novel technology which provides a promising solution for designing self-powered microsystems. Micro-Electro Mechanical System (MEMS) energy harvesting is an emerging alternative for scavenging energy from natural sources. It has extensive potential in wireless sensor applications to provide a natural energy source that is essentially inexhaustible. It is an increasingly attractive alternative to costly batteries. This essentially free energy source is available maintenance-free throughout the lifetime of the application. Many systems, such as wireless sensor networks, portable electronics and cell phones, can use this technology as a power source. Although some types of MEMS, such as electro-magnetic MEMS, electrostatic MEMS, and piezoelectric MEMS, are used to provide energy in various applications, they have several technical barriers that limit their applications, including low efficiency, issues of scaling, and high cost.Novel MEMS solar energy harvesting technology is scalable and also easily integrated in microsystems. The RF MEMS design not only has to provide functional efficiency, but also must work within the limits of maximum charge and discharge conversion efficiency. The energy harvesting technologies currently available which utilizes RF MEMS to convert solar energy into charge, can achieve better benefits than photovoltaic cells. In this presentation the design,fabrication, testing and evaluation of RF MEMS and its working limits in charging and discharging is illustrated.
Modeling and Structure Optimization of Tapped Transformer Yayah Zakaria
In this paper, a simplified circuit model of the tapped transformer structure has been presented to extract the Geometric and technology parameters and offer better physical understanding. Moreover, the structure of planar transformer has been optimized by using changing the width and space of the
primary coil, so as to enlarge the quality factor Q and high coupling coefficient K. To verify the results obtained by using these models, we have compared them with the results obtained by employing the MATLAB simulator. Very good agreement has been recorded for the effective primary
inductance value, whereas the effective primary quality factor value has shown a somewhat larger deviation than the inductance.
Simulation study of single event effects sensitivity on commercial power MOSF...journalBEEI
High-frequency semiconductor devices are key components for advanced power electronic system that require fast switching speed. Power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is the most famous electronic device that are used in much power electronic system. However, the application such as space borne, military and communication system needs Power MOSFET to withstand in radiation environments. This is very challenging for the engineer to develop a device that continuously operated without changing its electrical behavior due to radiation. Therefore, the main objective of this study is to investigate the Single Event Effect (SEE) sensitivity by using Heavy Ion Radiation on the commercial Power MOSFET. A simulation study using Sentaurus Synopsys TCAD software for process simulation and device simulation was done. The simulation results reveal that single heavy ion radiation has affected the device structure and fluctuate the I-V characteristic of commercial Power MOSFET.
IJRET-V1I2P1 -Measurement and FEMM Modelling of Experimentally Generated Stro...ISAR Publications
This work presents correlations between experimentally generated magnetic field strengths and computationally modeled field strengths. The experimental set-up comprised a C-shape structure designed to generate strong magnetic field strengths. The sections of the C-structure were individual solenoids made from copper-wound low carbon steel. These sections were connected such that the overall structure formed a continuous conduit for the magnetic flux and concentrated the magnetic field into an air gap. This experimental set-up could be used for magnetic annealing, or alternatively to measure the magnetostrictive strain properties of suitable materials, placed in the air gap. Magnetic field strengths of approximately 1.0 Tesla (T) were measured using a magnetic field strength meter. Finite Element Method Magnetics (FEMM) computational modeling software was used to model the design and predict field strengths. Modeled field strengths fell short of practical measurements. The efficiency of the apparatus in producing high fields is reduced due to effects related to drilling and machining of the steel core. Other reasons for discrepancies include the configuration of the C-shape, the properties of the core material, and skin effects. By building these considerations into the FEMM model, a more accurate representation of the workings of the C-shape set-up was achieved.
The AC total interference of faulted power lines to gas pipelines sharing the same right of way, which may pose a threat to operating personnel and equipment, was studied. The main advantage of this work is to determine the effects of different soil structures on the induced voltage for various soil resistivities. Two main approaches were used to compute the induced voltages, namely the method of moment (MOM), which is based on electromagnetic field theory, and the circuit based method, which uses the circuit grounding analysis to compute the conductive interference and the circuit based models to compute the inductive interference. A 10-km-long parallel pipeline-transmission line model was developed. The soil resistivity was varied, and the induced voltages obtained from both approaches were compared. Soil resistivity and soil structure are important parameters that affect the AC interference level. The results of the study show that the earth potentials and the metal GPRS are independent. Higher soil resistivity causes the tower ground resistance to increase, thus making the shield wire’s attractiveness as a fault current return path to increase, which in turn forces the induced net EMF and the cumulative GPR in the pipeline to reduce.
2 ijaems jul-2015-3-analysis and design of four leg steel transmission tower ...INFOGAIN PUBLICATION
In this project, the design of steel lattice tower prescribed for transmission of electricity by the categorized gravity and lateral loads has been studied and analysed for the employment of the project. The analysis has been done by taking different combination of loads and then the design has been come into picture using the code module IS 800:1984.
The present work describes the analysis and design of transmission line tower of 25 meter height viz. various parameters. In design of tower for weight optimization some parameters are considered such as; base width, height of tower , outline of tower. Using STAAD , analysis of transmission towers has been carried out as a 3-D structure. The tower members are designed as angle section.Prior to the design process the convincing site investigation and Envoirmental impact assessment data has to to collected through various modes via Electronic or Print media.
The desired safety factors has been actuated contemplating the selected location i.e Kasouli. The various factors including envoirmental and materials used for the structure is also be considered.The foundation detailing is chosen keeping in consideration the geotechnical investigation data. The software tool used in the process is STAAD.Pro 2008. The load calculations were performed manually but the analysis and design results were obtained through STAAD.Pro 2008. At all stages, the effort is to provide optimally safe design along with keeping the economic considerations.
Study of surface roughness for discontinuous ultrasonic vibration assisted el...eSAT Journals
Abstract The objective of this paper is to study the effects of response parameters on the performance characteristics in the Ultrasonic vibration Assisted Electric Discharge Machining (UEDM) Process. Response Surface Methodology (RSM) is used to investigate the effect of amplitude of vibration, peak current, pulse on-time, machining time and flushing pressure. To study the proposed second order polynomial model for surface roughness (SR), a Central Composite Design (CCD) is used for the estimation of the model coefficients of five factors, which are believed to influence the SR in UEDM process. Experiments are conducted on Aluminum alloy 6063 with copper electrode. The response is modeled on experimental data by using RSM. The separable influence of individual machining parameters and the interaction between these parameters are also investigated by using analysis of variance (ANOVA). It is found that amplitude of vibration, peak current; pulse-on time, flushing pressure and most of their interactions have significant affect on SR. Keywords: Central Composite Design, SR, UEDM, RSM, Aluminum alloy (Al6063)
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Impact of gamma-ray irradiation on dynamic characteristics of Si and SiC powe...IJECEIAES
Power electronic devices in spacecraft and military applications requires high radiation tolerant. The semiconductor devices face the issue of device degradation due to their sensitivity to radiation. Power MOSFET is one of the primary components of these power electronic devices because of its capabilities of fast switching speed and low power consumption. These abilities are challenged by ionizing radiation which damages the devices by inducing charge built-up in the sensitive oxide layer of power MOSFET. Radiations degrade the oxides in a power MOSFET through Total Ionization Dose effect mechanism that creates defects by generation of excessive electron–hole pairs causing electrical characteristics shifts. This study investigates the impact of gamma ray irradiation on dynamic characteristics of silicon and silicon carbide power MOSFET. The switching speed is limit at the higher doses due to the increase capacitance in power MOSFETs. Thus, the power circuit may operate improper due to the switching speed has changed by increasing or decreasing capacitances in power MOSFETs. These defects are obtained due to the penetration of Cobalt60 gamma ray dose level from 50krad to 600krad. The irradiated devices were evaluated through its shifts in the capacitance-voltage characteristics, results were analyzed and plotted for the both silicon and silicon carbide power MOSFET.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Design of Digital Predistortion Technique for RF Power Amplifier using Memory...IJERA Editor
Linearization of power amplifier has been an area of intense research from the last many years. The various types of linearization techniques are available for linearising PA but Digital Predistortion technique has been observed as one of the most common and effective method. But due to the issues like memory effects and exact characterization of non-linear behaviour of power amplifier, the implementation of existing predistortion technique suffers. So in this paper, a digital predistorter based on memory polynomial has been proposed that takes care of above mentioned issues. The presented technique is easy to implement and simple.
Design and Analysis of Sequential Elements for Low Power Clocking System with...IJERA Editor
This paper proposed the design of sequential elements for low power clocking system with low low power techniques for saving the power. Power consumption is a major bottleneck of system performance and is listed as one of the top three challenges in International Technology Roadmap for Semiconductor 2008. In practice, a large portion of the on chip power is consumed by the clock system which is made of the clock distribution network and flop-flops. In this paper, various design techniques for a low power clocking system are surveyed. Among them is an effective way to reduce capacity of the clock load by minimizing number of clocked transistors. To approach this, proposed a novel clocked pair shared flip-flop which reduces the number of local clocked transistors by approximately 40%. A 24% reduction of clock driving power is achieved. In addition, low swing and double edge clocking, can be easily incorporated into the new flip-flop to build clocking systems. As the feature size becomes smaller, shorter channel lengths result in increased sub-threshold leakage current through a transistor when it is off. Dual sleep and sleepy stack methods are proposed to avoid static power consumption; the flip flops are simulated using HSPICE.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
This presentation presents a review of novel technology which provides a promising solution for designing self-powered microsystems. Micro-Electro Mechanical System (MEMS) energy harvesting is an emerging alternative for scavenging energy from natural sources. It has extensive potential in wireless sensor applications to provide a natural energy source that is essentially inexhaustible. It is an increasingly attractive alternative to costly batteries. This essentially free energy source is available maintenance-free throughout the lifetime of the application. Many systems, such as wireless sensor networks, portable electronics and cell phones, can use this technology as a power source. Although some types of MEMS, such as electro-magnetic MEMS, electrostatic MEMS, and piezoelectric MEMS, are used to provide energy in various applications, they have several technical barriers that limit their applications, including low efficiency, issues of scaling, and high cost.Novel MEMS solar energy harvesting technology is scalable and also easily integrated in microsystems. The RF MEMS design not only has to provide functional efficiency, but also must work within the limits of maximum charge and discharge conversion efficiency. The energy harvesting technologies currently available which utilizes RF MEMS to convert solar energy into charge, can achieve better benefits than photovoltaic cells. In this presentation the design,fabrication, testing and evaluation of RF MEMS and its working limits in charging and discharging is illustrated.
Modeling and Structure Optimization of Tapped Transformer Yayah Zakaria
In this paper, a simplified circuit model of the tapped transformer structure has been presented to extract the Geometric and technology parameters and offer better physical understanding. Moreover, the structure of planar transformer has been optimized by using changing the width and space of the
primary coil, so as to enlarge the quality factor Q and high coupling coefficient K. To verify the results obtained by using these models, we have compared them with the results obtained by employing the MATLAB simulator. Very good agreement has been recorded for the effective primary
inductance value, whereas the effective primary quality factor value has shown a somewhat larger deviation than the inductance.
Simulation study of single event effects sensitivity on commercial power MOSF...journalBEEI
High-frequency semiconductor devices are key components for advanced power electronic system that require fast switching speed. Power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is the most famous electronic device that are used in much power electronic system. However, the application such as space borne, military and communication system needs Power MOSFET to withstand in radiation environments. This is very challenging for the engineer to develop a device that continuously operated without changing its electrical behavior due to radiation. Therefore, the main objective of this study is to investigate the Single Event Effect (SEE) sensitivity by using Heavy Ion Radiation on the commercial Power MOSFET. A simulation study using Sentaurus Synopsys TCAD software for process simulation and device simulation was done. The simulation results reveal that single heavy ion radiation has affected the device structure and fluctuate the I-V characteristic of commercial Power MOSFET.
IJRET-V1I2P1 -Measurement and FEMM Modelling of Experimentally Generated Stro...ISAR Publications
This work presents correlations between experimentally generated magnetic field strengths and computationally modeled field strengths. The experimental set-up comprised a C-shape structure designed to generate strong magnetic field strengths. The sections of the C-structure were individual solenoids made from copper-wound low carbon steel. These sections were connected such that the overall structure formed a continuous conduit for the magnetic flux and concentrated the magnetic field into an air gap. This experimental set-up could be used for magnetic annealing, or alternatively to measure the magnetostrictive strain properties of suitable materials, placed in the air gap. Magnetic field strengths of approximately 1.0 Tesla (T) were measured using a magnetic field strength meter. Finite Element Method Magnetics (FEMM) computational modeling software was used to model the design and predict field strengths. Modeled field strengths fell short of practical measurements. The efficiency of the apparatus in producing high fields is reduced due to effects related to drilling and machining of the steel core. Other reasons for discrepancies include the configuration of the C-shape, the properties of the core material, and skin effects. By building these considerations into the FEMM model, a more accurate representation of the workings of the C-shape set-up was achieved.
The AC total interference of faulted power lines to gas pipelines sharing the same right of way, which may pose a threat to operating personnel and equipment, was studied. The main advantage of this work is to determine the effects of different soil structures on the induced voltage for various soil resistivities. Two main approaches were used to compute the induced voltages, namely the method of moment (MOM), which is based on electromagnetic field theory, and the circuit based method, which uses the circuit grounding analysis to compute the conductive interference and the circuit based models to compute the inductive interference. A 10-km-long parallel pipeline-transmission line model was developed. The soil resistivity was varied, and the induced voltages obtained from both approaches were compared. Soil resistivity and soil structure are important parameters that affect the AC interference level. The results of the study show that the earth potentials and the metal GPRS are independent. Higher soil resistivity causes the tower ground resistance to increase, thus making the shield wire’s attractiveness as a fault current return path to increase, which in turn forces the induced net EMF and the cumulative GPR in the pipeline to reduce.
2 ijaems jul-2015-3-analysis and design of four leg steel transmission tower ...INFOGAIN PUBLICATION
In this project, the design of steel lattice tower prescribed for transmission of electricity by the categorized gravity and lateral loads has been studied and analysed for the employment of the project. The analysis has been done by taking different combination of loads and then the design has been come into picture using the code module IS 800:1984.
The present work describes the analysis and design of transmission line tower of 25 meter height viz. various parameters. In design of tower for weight optimization some parameters are considered such as; base width, height of tower , outline of tower. Using STAAD , analysis of transmission towers has been carried out as a 3-D structure. The tower members are designed as angle section.Prior to the design process the convincing site investigation and Envoirmental impact assessment data has to to collected through various modes via Electronic or Print media.
The desired safety factors has been actuated contemplating the selected location i.e Kasouli. The various factors including envoirmental and materials used for the structure is also be considered.The foundation detailing is chosen keeping in consideration the geotechnical investigation data. The software tool used in the process is STAAD.Pro 2008. The load calculations were performed manually but the analysis and design results were obtained through STAAD.Pro 2008. At all stages, the effort is to provide optimally safe design along with keeping the economic considerations.
Study of surface roughness for discontinuous ultrasonic vibration assisted el...eSAT Journals
Abstract The objective of this paper is to study the effects of response parameters on the performance characteristics in the Ultrasonic vibration Assisted Electric Discharge Machining (UEDM) Process. Response Surface Methodology (RSM) is used to investigate the effect of amplitude of vibration, peak current, pulse on-time, machining time and flushing pressure. To study the proposed second order polynomial model for surface roughness (SR), a Central Composite Design (CCD) is used for the estimation of the model coefficients of five factors, which are believed to influence the SR in UEDM process. Experiments are conducted on Aluminum alloy 6063 with copper electrode. The response is modeled on experimental data by using RSM. The separable influence of individual machining parameters and the interaction between these parameters are also investigated by using analysis of variance (ANOVA). It is found that amplitude of vibration, peak current; pulse-on time, flushing pressure and most of their interactions have significant affect on SR. Keywords: Central Composite Design, SR, UEDM, RSM, Aluminum alloy (Al6063)
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Impact of gamma-ray irradiation on dynamic characteristics of Si and SiC powe...IJECEIAES
Power electronic devices in spacecraft and military applications requires high radiation tolerant. The semiconductor devices face the issue of device degradation due to their sensitivity to radiation. Power MOSFET is one of the primary components of these power electronic devices because of its capabilities of fast switching speed and low power consumption. These abilities are challenged by ionizing radiation which damages the devices by inducing charge built-up in the sensitive oxide layer of power MOSFET. Radiations degrade the oxides in a power MOSFET through Total Ionization Dose effect mechanism that creates defects by generation of excessive electron–hole pairs causing electrical characteristics shifts. This study investigates the impact of gamma ray irradiation on dynamic characteristics of silicon and silicon carbide power MOSFET. The switching speed is limit at the higher doses due to the increase capacitance in power MOSFETs. Thus, the power circuit may operate improper due to the switching speed has changed by increasing or decreasing capacitances in power MOSFETs. These defects are obtained due to the penetration of Cobalt60 gamma ray dose level from 50krad to 600krad. The irradiated devices were evaluated through its shifts in the capacitance-voltage characteristics, results were analyzed and plotted for the both silicon and silicon carbide power MOSFET.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Design of Digital Predistortion Technique for RF Power Amplifier using Memory...IJERA Editor
Linearization of power amplifier has been an area of intense research from the last many years. The various types of linearization techniques are available for linearising PA but Digital Predistortion technique has been observed as one of the most common and effective method. But due to the issues like memory effects and exact characterization of non-linear behaviour of power amplifier, the implementation of existing predistortion technique suffers. So in this paper, a digital predistorter based on memory polynomial has been proposed that takes care of above mentioned issues. The presented technique is easy to implement and simple.
Design and Analysis of Sequential Elements for Low Power Clocking System with...IJERA Editor
This paper proposed the design of sequential elements for low power clocking system with low low power techniques for saving the power. Power consumption is a major bottleneck of system performance and is listed as one of the top three challenges in International Technology Roadmap for Semiconductor 2008. In practice, a large portion of the on chip power is consumed by the clock system which is made of the clock distribution network and flop-flops. In this paper, various design techniques for a low power clocking system are surveyed. Among them is an effective way to reduce capacity of the clock load by minimizing number of clocked transistors. To approach this, proposed a novel clocked pair shared flip-flop which reduces the number of local clocked transistors by approximately 40%. A 24% reduction of clock driving power is achieved. In addition, low swing and double edge clocking, can be easily incorporated into the new flip-flop to build clocking systems. As the feature size becomes smaller, shorter channel lengths result in increased sub-threshold leakage current through a transistor when it is off. Dual sleep and sleepy stack methods are proposed to avoid static power consumption; the flip flops are simulated using HSPICE.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Improved Low Voltage High Speed FVF Based Current Comparator with Logical Eff...IJERA Editor
In this paper an improved current comparator is using flipped voltage follower (FVF) to obtain the single supply
voltage. This circuit has short propagation delay and occupies a small chip area. All circuits have been simulated
employing Tanner EDA Tool 14.1v for 90nm CMOS technology and a comparison has been performed with its
non FVF counterpart to contrast its effectiveness, simplicity, compactness and low power consumption.
Wireless Reporting System for Accident Detection at Higher SpeedsIJERA Editor
Speed is one of the basic reasons for vehicle accident. Many lives could have been saved if emergency service
could get accident information and reach in time. Nowadays, GPS has become an integral part of a vehicle
system. This paper proposes to utilize the capability of a GPS receiver to monitor speed of a vehicle and detect
accident basing on monitored speed and send accident location to an Alert Service Center. The GPS will
monitor speed of a vehicle and compare with the previous speed in every second through a Microcontroller
Unit. Whenever the speed will be below the specified speed, it will assume that an accident has occurred. The
system will then send the accident location acquired from the GPS along with the time and the speed by utilizing
the GSM network. This will help to reach the rescue service in time and save the valuable human life.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Crystal Growth and Characterization of Cobalt Doped Barium Tartrate Crystals ...IJERA Editor
Single crystals of Cobalt doped Barium tartrate crystals were grown by single diffusion technique at room temperature. Effect of Cobalt doping in the Barium tartarate crystals has been studied and reported. The XRD pattern shows that Cobalt barium tartarate crystals are polycrystalline in nature and having orthorhombic structure. SEM pictures infer that crystals were grown by layer deposition. The elemental analysis has been carried out by EDAX. The chemical analysis has been performed by FTIR to denote the functional group of grown crystal. The thermal stability has been studied by the TGA, DTG and DSC.
Grid-Connected Pv-Fc Hybrid System Power Control Using Mppt And Boost ConverterIJERA Editor
This paper proposes a method for operating a grid connected hybrid system. This system composed of a Photovoltaic (PV) array and a Proton exchange membrane fuel cell (PEMFC) is considered. As the variations occur in temperature and irradiation during power delivery to load, Photo voltaic (PV) system becomes uncontrollable. In coordination with PEMFC, the hybrid system output power becomes controllable. Two operation modes are the unit-power control (UPC) mode and the feeder-flow control (FFC) mode, can be applied to the hybrid system. All MPPT methods follow the same goal that is maximizing the PV system output power by tracking the maximum power on every operating condition. Maximum power point tracking technique (Incremental conductance) for photovoltaic systems was introduced to maximize the produced energy. The coordination of two control modes, coordination of the PV array and the PEMFC in the hybrid system, and determination of reference parameters are presented. The proposed operating strategy systems with a flexible operation mode change always operate the PV array at maximum output power and the PEMFC in its high efficiency performance band. Also thus improving the performance of system operation, enhancing system stability, and reducing the number of operating mode changes.
The embedded micro electro mechanical systems (MEMS) is a technology that is creating a new era in all fields and especially in the internet of things (IoT) field. MEMS are necessary components for the realization of tiny micro/nano circuits. For this reason, designers are facing many challenges in designing embedded MEMS for achieving efficient products. The pull-in voltage is one of the most important parameters of MEMS design. In this work, we are interested in the analysis of some geometrical and mechanical parameters for the pull-in. The objective is to study of the concept of pull-in voltage in order to reduce it. First, we made a simulation to choose the appropriate material achieving a lower pull-in voltage. Then, we analysed the impact of geometrical parameters on the pull-in voltage. In this work, Finite element method using COMSOL Multiphysics® software is employed to compute the Pull-in voltage and study the behaviour of the MEMS Switch in order to optimize it. Pull-in voltage can be reduced by careful selection of the cantilever material and it can be further reduced by changing the beam parameters.
Study and analysis of rf mems shunt switch for reconfigurable antennaeSAT Publishing House
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N044086772
1. Pramod Kumar M.P et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 4( Version 8), April 2014, pp.67-72
www.ijera.com 67 | P a g e
A Survey on Modeling and Simulation of MEMS Switches and Its
Application in Power Gating Techniques
Pramod Kumar M.P*, A.S. Augustine Fletcher**
*(PG scholar, VLSI Design, Karunya University, Tamil Nadu, India)
** (Assistant professor, ECE Department, Karunya University, Tamil Nadu, India)
ABSTRACT
Large numbers of techniques have been developed to reduce the leakage power, including supply voltage
scaling, varying threshold voltages, smaller logic banks, etc. Power gating is a technique which is used to reduce
the static power when the sleep transistor is in off condition. Micro Electro mechanical System (MEMS)
switches have properties that are very close to an ideal switch, with infinite off-resistance due to an air gap and
low on-resistance due to the ohmic metal to metal contact that is formed. In this paper, we discussed the MEMS
switch, its material selection and its working in power gated circuits for the purpose of massive reduction of
leakage power. This CMOS- MEMS combination provides high switching speed, very clean contacts, less
reliability and less lifetime.
Keywords - MEMS, MTCMOS, RF-MEMS Switch, power gating, Electrostatic MEMS switch, static power
I. INTRODUCTION
Micro Electro Mechanical switches are the
switches that operates with the laws of mechanical
motion. Main advantages are their zero OFF-current
and their fast switching behavior. MEMS switches
behaves as perfect switches with very low ON
resistance and infinite OFF resistance and hence can
be used to power-gate CMOS systems. The cantilever
bends when the voltage between the cantilever and
the gate-electrode reaches to VPI. The lever bending
due to the electrostatic, piezoelectric, thermal or
magnetic forces and forms an ohmic contact. CMOS-
MEMS integration efforts have focused on capacitive
MEMS switches.
Power gating a circuit with transistors
reduces the leakage power of the circuit during the
idle state. It also introduces a delay due to the voltage
drop created by the ON resistance of the power gate.
The leakage reduction and delay increase is the
characteristic that involves the sizing of the power
gates. As the technology is scaled down, the leakage
current will be more and hence the power gating
takes an important role. Large voltage drop may
render the circuit as inoperable.
The advantages of MEMS switches over
FET switches are zero power consumption, high
isolation, low insertion loss, low cost, low Speed,
power handling capacity, high voltage drive,
reliability, packaging and cost. The main applications
of MEMS switches are in radar systems for defense
applications, automotive radars, wireless systems
satellite communication systems and instrumentation
systems.
The performance of RF-MEMS switches depends on
the suitable material to be used for the switch.
Several material selection strategies have been
developed in the past, the methodology for selecting
the materials used in RF-MEMS switches, mainly for
reconfigurable antenna, has never been proposed in
[1]. The electrostatic switch is composed of a fixed
electrode and a movable electrode, forming a parallel
plate capacitor. After the application of a specific
voltage, the movable electrode bends closing the air
gap and turning ON the switch. Series switch and
shunt switch are the two different RF MEMS
switches [3]. The typical shunt MEMS switch
consists of a thin metal membrane suspended over
the center conductor of a coplanar waveguide (CPW)
and fixed at both ends to the ground conductor of the
CPW.
Equation 1 shows the total energy
consumption per switching cycle [4]:
(1)
Where g is the gap between the contacts
when the beam is deflected, gd is the dimple gap
thickness and A is the actuation area. The dimple gap
is an air gap that separates the source and the drain in
the OFF state.
The response time tPI [4] is described in
equation 2:
(2)
RESEARCH ARTICLE OPEN ACCESS
2. Pramod Kumar M.P et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 4( Version 8), April 2014, pp.67-72
www.ijera.com 68 | P a g e
Where k is the spring constant, m is the
mass and VDD is the supply voltage. The pull in
voltage VPI is given by [4]:
(3)
Here W is the width of the switch, L is the
length of the switch and ϵo is the permittivity of free
space
II. RF MEMS SWITCHES [2]
This paper presents an overview of the RF
MEMS switches. It also presents a technique for
modeling and design of inductively-tuned shunt
MEMS switch [5]. An equivalent lumped element
model can be determined. The values of the circuit
elements are determined based on the physical
dimensions of the switch. Analytical form of
inductance for inductive-tuned MEMS switch is also
presented in this paper.
MEMS is a multidisciplinary technology
that involves materials and fabrication, process and
device engineering, microwave engineering,
mechanical engineering etc. The main applications of
MEMS switches are in radar systems for defense
applications, instrumentation systems, wireless
communication systems, satellite communication
systems, etc. Two types of MEMS series switches [6]
are broadside series switch and inline series switch.
The actuation of the broadside switch is in a plane
that is perpendicular to the transmission line. The
actuation of the inline switch is in the same plane as
the transmission line. A series capacitance in the up-
state position and a small resistance in the down-state
position is the electrical equivalent of the MEMS
inline series switch. Fig 1 and 2 shows the MEMS
shunt switch and MEMS series switch respectively.
Fig-1: MEMS Shunt switch [2]
Fig-2: MEMS Series Switch [2]
In the shunt switch, center conductor of the
CPW line is biased with respect to the ground to
accomplish switch actuation. Resulting electrostatic
force pulls the membrane towards the center
conductor with a pull-down voltage. Shunt switch in
the up position behaves mainly as a small capacitance
to ground. In series switch, the movable part touches
the fixed electrode if applied voltage reached to VPI.
Packaging is the most critical part of MEMS switch
design. A large effort was involved in developing
wafer scale packaging techniques which are
compatible with MEMS switches.
III. RF MEMS SWITCHES AND
SWITCH CIRCUITS [6]
This paper presents the new developments in
RF MEMS switches and high-isolation switch
circuits. The main difference between the broadside
and inline designs is that the inline switch passes the
RF signal entirely. The inline switches must be
fabricated using a thick metal layer (Au, Al, Pt etc.).
The analog device MEMS-series inline switch [7] is
fabricated using a 7-8 μm thick gold cantilever and is
suspended 1 μm above the substrate. The switch is
around 75μm long and 30μm wide. Pull-down
electrode is defined near the end of the cantilever and
is 20 X 35 μm. There are two contact points, each
with dimensions 2-m square. The spring constant is
60-100 N/m, which results a switching time of 2-3 μS
and pull-down voltage of 60-80 V. The mechanical Q
is close to 1, the switch settles quickly upon
actuation. The switch resistance is 0.5-1.0Ω and
contact force is 100-150 μN. The up-state capacitance
is 4-5 fF and measured insertion loss is -0.15 dB up
to 20 GHz.
The reliability of the switch is limited by
damage, pitting and hardening of the contact area due
to the impact force between the beam and the bottom
metal. Failure mechanisms are due to organic
deposits and contamination in the contact area.
Packaging is quite difficult and the only way to limit
the cost of RF MEMS switches for applications
requiring a large number of units is to develop a
wafer-scale solution. Glass-to-glass anodic bondings,
epoxy seals, gold-to-gold bonding are several
techniques used by industry to package MEMS
devices.
Capacitive MEMS shunt switches with a
nitride dielectric provide excellent isolation at 20-50
GHz. If more isolation is desired, then two switches
can be placed in series. Also, one can build tuned
capacitive switches with a relatively wideband
response and very low loss.
3. Pramod Kumar M.P et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 4( Version 8), April 2014, pp.67-72
www.ijera.com 69 | P a g e
IV. MATERIAL SELECTION OF RF
MEMS SWITCH USED FOR
RECONFIGURABLE ANTENNA USING
ASHBY'S METHODOLOGY [13]
Material selection for RF MEMS shunt
switch with the help of Ashby approach has been
discussed in this paper. Ashby approach provides an
improvised material selection strategy with less
computation. Variety of materials are available to a
design engineer, best possible material is needed to
be selected. Three primary performance indices i.e.
pull in voltage, RF loss and thermal residual stress
are used to obtain the desired performance. Observed
that the possible materials used for fixed-fixed beam
capacitive shunt switch are gold, aluminum,
platinum, molybdenum, copper, nickel, alumina, and
silicon nitride [8],[9]. The selection chart shows that
aluminum is the most suitable material for being used
as contact material in RF- MEMS switches. Gold is
used only for mass production of switches as it is
expensive compared to aluminum.
Ashby selection strategy is used to
characterize the best material for desired performance
depending upon mechanical, electrical and thermal
properties of the material. Material selection using
performance indices is achieved by plotting one
material property on each axis of selection chart. The
design of a component is specified by its functional,
geometrical and material properties. The performance
indices are
1) Pull in voltage: At the time of actuation, the
sufficient pull in voltage is applied between the
MEMS Bridge and electrode.
2) RF Loss: It can be reduced significantly by
selecting suitable contact material having good
conductivity.
3) Thermal residual stress: The MEMS Bridge
experiences the temperature change due to self-
heating which further causes the change in
thermal stress.
V. COMPARISON OF Au AND Au–Ni
ALLOYS AS CONTACT MATERIALS FOR
MEMS SWITCHES [14]
This paper reports on a comparison of gold
and gold–nickel alloys as contact materials for
MEMS switches. Gold is commonly used as the
contact material in low-force metal contact MEMS
switches. The top two failure mechanisms of MEMS
switches are wear and stiction which may be related
to the material softness and the relatively high
surface adhesion respectively. New processing
options introduced by alloying gold with another
metal to strengthen the material against wear. The
properties of Au–Ni alloys were investigated as the
lower contact electrode was controlled by adjusting
the nickel content and thermal processing conditions.
McGruer et al. [10] showed that ruthenium
(Ru), platinum (Pt), and rhodium (Rh) were
susceptible to contamination and the contact
resistance increased after a characteristic number of
cycles. But gold alloys with a high gold percentage
shows no contact resistance degradation under the
same test conditions. Coutu et al. [11], [12] showed
that alloying gold with a small amount of palladium
(Pd) or Pt extended the micro switch lifetimes with a
small increase in contact resistance.At present,
comprehensive investigations of the effects of surface
topography, alloy composition and material
microstructure on contact resistance and lifetime
performance are lacking.
The existing tests have difficulty in
duplicating the switch and the contact geometry. The
contact geometry has a strong influence on the stress
and heat distribution across the contacts and thus, on
the switch performance and failure mechanism. The
switching degradation test facility utilizes the upper
cantilevers from commercial RF MEMS switches and
test these against alternative bottom contact
materials. The emphasis is placed on a comparison of
the alloys and correlations between material
properties, contact resistance and contact
degradation. Information revealed by the test can be
summarized below:
1) Low initial contact resistance was achieved for
all the tests. After a number of cycles, a slight
decrease of the initial contact resistance can be
observed.
2) Pure gold has the lowest number of cycles before
electrical failure. Solid solution strengthened
Au–Ni alloys shows an increased cycles with an
increased nickel composition.
3) Two-phase Au–Ni has the largest number of
cycles, while providing a stable and acceptable
contact resistance. Compared with the solid
solution Au–Ni alloys. Two phase Au–Ni films
have an intermediate hardness while yielding a
much larger contact area due to the film
smoothness.
VI. POWER GATING OF VLSI
CIRCUITS USING MEMS SWITCHES IN
LOW POWER APPLICATIONS [4]
This paper proposes a combination of
CMOS- MEMS switch to power gate VLSI circuits,
such that leakage power is effectively reduced. As a
result of implementing this power gating method, a
standby leakage power reduction of 99% and energy
savings of 33.3% are achieved. MTCMOS (Multiple
Threshold CMOS) is the most commonly used
technique to power-gate low throughput devices even
though MTCMOS unfolds many drawbacks such as
inefficiency in down-scaling of the technology. The
contributions of this paper are as follows:
4. Pramod Kumar M.P et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 4( Version 8), April 2014, pp.67-72
www.ijera.com 70 | P a g e
1) Designing, modeling and simulating an
electrostatic MEMS switch using materials that
are compatible with CMOS processes.
2) Adapting the actuation voltages of this MEMS
switch with CMOS circuit‟s voltages.
3) Studying the effects of the insertion of the
modeled MEMS switch on ground bounce and
surge currents.
4) Comparing the leakage savings using MEMS
power gating with other leakage reduction
techniques.
Copper is selected as contact material. If the
applied voltage reaches VPI, the cantilever bends
down and touches the fixed contacts. If we release
the voltage, it moves up. Calculate the switching
time. Obtained 0.1876Ω ON resistance and 1.967nF
OFF capacitance from this model [4].
COMSOL Multi-physics software is used
for MEMS switch modelling. Three ISCAS
benchmarks circuits were selected for these
simulations and constructed using 65nm transistors.
The circuits are 32 bit parity checker, 4 bit CLA
adder (74182) and 4 bit ALU (74181). Compared the
leakage power with and without MEMS switch and
other power gating techniques too. During these tests,
we found many additional parameters such as delay,
ground bounce noise, and dynamic power
consumption. Table 1 shows the parameters which
are used for modeling.
Table-1: Parameter Table [4]
Parameter Value
Cantilever Length L 430 µm
Dimple gap g 0.9 µm
Air gap g0 2 µm
Width W 20 µm
Thickness t 2 µm
Contact Length L
c
50 µm
Contact Thickness t
c
13.1µm
R
ON
0.1876Ω
C
OFF
1.966746 nF
V
PI
4.5V
VII. FROM TRANSISTORS TO MEMS-
THROUGHPUT-AWARE POWER
GATING IN CMOS CIRCUITS [15]
In this paper, compared the efficiency of
transistor switches and MEMS switches power gating
methods, in reducing the power consumption of a
design with a certain target throughput. For instance,
transistor switches favor smaller and slower
architectures and the MEMS switches favor faster
and larger designs when the target throughput is low.
Compared four different FFT designs with varying
complexity in terms of their suitability for
throughput-aware design. Experimental results
showed that an FFT architecture with 16 parallel
units is able to cut the power almost in half compared
to a nonparallel architecture, when using MEMS
switches in low-throughput applications.
With a MEMS-switched design, a
substantial decrease in power is shown. After the
comparison, the curves for the parallel architecture
and the low-complexity architecture using the
transistor switches are also shown as dashed lines in
Fig 3. With a very small exception in the high
throughput region, the MEMS-switched parallel
architecture is the clear winner in terms of power
consumption.
As the design gets faster and more complex,
the energy efficiency increases and the optimal
supply voltage decreases. With the parallel design,
the optimal supply voltage is pushed even further
lower and power is reduced by 40% across all
throughputs. With transistor-switched design,
parallelization only increased power in the low
throughput range and decreases power at high
throughputs.
Fig.-3: Average power consumption of MEMS
switched FFT architectures
Four FFT architectures that vary in speed
and complexity will be investigated. Each performs a
1024 point radix 2 FFT with 32 bit complex numbers.
The low and medium complexity implementations
use a single real valued 16 bit ALU with a multiplier
and an adder, a register bank, and a simple micro
program to implement the FFT. The low complexity
design uses a 16 bit add/shift multiplier that takes 16
clock cycles, while the medium complexity design
uses a high speed booth multiplier that takes a single
clock cycle. Finally, a parallel architecture with 16
high complexity core is implemented. As the
complexity of the designs increases, the energy per
FFT decreases mainly due to the fact that the smaller
designs must save intermediate operands in registers
and have lower activity factor. The aim of throughput
aware power reduction is to maximize power
efficiency of a design for a certain target throughput.
5. Pramod Kumar M.P et al Int. Journal of Engineering Research and Applications www.ijera.com
ISSN : 2248-9622, Vol. 4, Issue 4( Version 8), April 2014, pp.67-72
www.ijera.com 71 | P a g e
This work was done by Synopsis Design Compiler
using 130nm technology.
VIII. MEMS BASED POWER GATING
FOR HIGHLY SCALABLE PERIODIC
AND EVENT DRIVEN PROCESSING [16]
For periodic and event driven applications
with long standby times, leakage power control is
essential. This paper investigates use of MEMS
switches for power gating processors, which allows
for highly scalable processing and eliminates leakage
power. This paper demonstrates a novel method for
power gating using MEMS switches, which have a
nearly infinite OFF resistance and very low ON
resistance. MEMS switches are currently designed
for the RF domain, which requires a clean switch and
precludes the easy integration and low cost of CMOS
compatibility. The following contributions:
1) Investigated the energy efficiency of a MEMS
gated 32 bit processor with respect to technology
size and threshold voltage and find that when
idle state leakage is eliminated, the leakiest
process 32nm Zero VTH is the most energy
efficient.
2) Compared the 32nm Zero VTH MEMS gated
processor to two state of the art low leakage
processors and showed that for a variety of
embedded benchmarks, the MEMS gated
processor consumes the least amount of power
and is capable of much higher frequencies.
3) Due to activation energy, very low cycle periods
and very small workloads are not well suited for
MEMS-gated processors.
The MEMS gated processor is always
energy optimal, regardless of the target throughput. In
MEMS gated circuits, the average power
consumption approaches 0 as RT approaches 0. This
is in contrast to a transistor gated circuit, where the
power approaches the idle state leakage power. With
non-gated circuits, changing the maximum frequency
generally has no effect on energy. With MEMS-gated
circuits shows that increasing the maximum
frequency can potentially decrease the total energy.
In this paper, investigated the technology
node and threshold voltage that minimizes total
energy for three benchmark circuits. Also, compared
the energy optimal MEMS processor to two state of
the art low leakage processors. Energy and timing
simulations for a 32 bit in order 5 stage pipeline
RISC CPU were performed across four technology
nodes i.e. 90nm, 65nm, 45nm and 32nm and four
threshold voltages (high, medium, low, and zero).
The RTL of an open-source 32 bit in order RISC
CPU was synthesized, placed and routed and the
combinatorial and interconnect energy as well as the
operating frequency were determined. Industry
standard cell libraries were used for the 90nm and
65nm nodes, while SPICE and PTM models were
used to scale results down to 45nm and 32nm.
IX. ADVANTAGES OF MEMS
SWITCHES
MEMS switches offer lower insertion loss,
zero power consumption and small size, less weight,
higher isolation and very low intermodulation
distortion compared to other types of switches. The
electrostatic MEMS switch has many advantages
such as its high energy efficiency and scalability
compared to the magnetic, thermal and piezoelectric
switches. Other parameters were also considered
while studying these switches such as their ON
resistance, actuation voltage, response time, size, and
ease of manufacturability. Compared to other power
gating techniques like single mode and tri-mode
techniques, MEMS power gating ensures less static
power, less delay and fast response.
X. CONCLUSION
MEMS are the integration of actuators,
mechanical elements, sensors, and electronics on a
common substrate using integrated circuit process
sequences. The electronics are fabricated using
standard IC processing. Micromechanical
components are fabricated using compatible
„micromachining‟ processes. In order to build a solid
material knowledge base for micro switch designers,
correlations among material properties, contacting
performance, and failure modes need to be built
based on systematic experimental data for different
materials. Electrical and mechanical characteristics
are strongly considered in the MEMS switch material
selection. MEMS switch offers less static power, less
delay and fast response time compared to the sleep
transistors in power gating.
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