This presentation is on the topic "Microcomputer and RAM Models". It defines definition of Microcomputer, its block diagram and RAM, it's types along with VHDL Code to define RAM.

1. KIIT COLLEGE OF ENGINEERING
Submitted by: Gaurav Bisht, Prateek Gaur & Pradeep Sheet
Group 1
B.Tech (CSE) 6th Sem

2. Name of The Topic:

3. Contents:
 Microcomputer
 Block Diagram of microcomputer
 Components of microcomputer
 RAM
 Types of RAM
 VHDL Code for RAM

4. Microcomputer:
 A microprocessor embedded in a computer is called microcomputer often with the use of SoC
(System on a Chip).
 The microprocessor is also known as the CPU of the microcomputer.
 Microcomputers are generally meant to run full-fledged Operating Systems, so they often rely on
external RAM and ROM and use common I/O peripherals and ports such as USB or RJ45
(Ethernet).

5. Block Diagram of Microcomputer:

6. Components of Microcomputer:
 CPU
- Contains Control Unit and Arithmetic Logic Unit.
- Organizes correct sequence of the processes.
- Performs all the mathematical and logical operations of the system.
 RAM
- Stores the instructions and data needed during processing and execution of programs or
commands.
 ROM
- It serves as permanent storage of data used by microprocessor.
 Interface Circuitry
- An interface between the input devices and the CPU.
 Peripheral Devices
- These are the devices which add functionality.

7. RAM:
 A microcomputer contains several types of primary memory.
 RAM (Random Access Memory) is used for storing information that changes.
 This memory in a computer is accessible to the user.
 RAM is used to store user programs that control what the CPU does.
 It stores the data used by these programs and the results of operations performed by these
programs.

8. Types of RAM:
 Integrated RAM chips are available in two forms:
1. SRAM (Static RAM):
The SRAM memories consist of circuits capable of retaining the stored information as long as the power is applied.
2. DRAM (Dynamic RAM):
DRAM stores the binary information in the form of electric charges that applied to capacitors.

9. Source Code:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY RAM IS //Entity starts
PORT (DATAIN: IN STD_LOGIC_VECTOR (7 DOWNTO 0) ;
ADDRESS: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
W_R: IN STD_LOGIC; //selection for read or write
DATAOUT: OUT STD_LOGIC_VECTOR (7 DOWNTO 0));
END ENTITY; //Entity Ends

10. Source Code (Cont.)
ARCHITECTURE BEV OF RAM IS
TYPE MEM IS ARRAY (255 DOWNTO 0) OF STD_LOGIC_VECTOR (7 DOWNTO 0); //Array declared 256X8
SIGNAL MEMORY: MEM; //To use array
SIGNAL ADDR: INTEGER RANGE 0 TO 255;
BEGIN
PROCESS (ADDRESS, DATAIN, W_R)
BEGIN
ADDR<=CONV_INTEGER (ADDRESS); //Convert to integer
IF (W_R='0') THEN //Write condition
MEMORY (ADDR) <=DATAIN;
ELSIF (W_R='1') THEN //Read condition
DATAOUT <= MEMORY (ADDR);
ELSE
DATAOUT<="ZZZZZZZZ"; //Other Condition
END IF; //End of If statement
END PROCESS; //End of Process Statement
END BEV; //End of Architecture