Input Output Ports, Input Output Mapping, Memory Map Techniques, Interrupt Driven Input Output, DMA based Input Output, Input Output Processor/Channels

1. Computer Organization and Architecture
Presented By:
Vikram Patel

2. Topics
 Input Output (I/O) ports
 Input Output Mapping
 Memory map techniques
 Interrupt driven I/O
 DMA based Input Output
 Input Output Processor

3. Input-Output ports ( I/O Ports)
 Input : Information or data to the computer
 Output : Information or data from computer
 Computers are based on the fundamental idea that every input results in an
output.
What is Input and Output ?
What are Input-Output Ports?
 They are what connect input and output devices (Keyboard, Mouse,
Printer, Scanner, Monitor etc.) to the computer.

4. Types of Input-Output (I/O) ports
 Serial Port
 PS/2
 Parallel Printer Port
 LAN Port
 Audio Port
 Universal serial Bus (USB)

6. Input Output Mapping

7. Input Output Mapping
 Memory Mapped I/O
 Isolated I/O
There are two types of Input Output Mapping

8.  Memory & I/O Share the entire address range of processor.
 Any machine instruction that can access memory can be used to
transfer data to or from an I/O device.
 Memory control signals, used to control read & write I/O operations.
Memory Mapped I/O

9.  Processor Provide separate Address Range for Memory & I/O.
 Input Output control signals are used to control read and write
input output operations.
Isolated I/O

10. Memory Map Techniques

11. Memory Map Techniques
There are 3 types of Memory map Techniques
 Direct Mapping
 Fully Associative Mapping
 Set – Associative Mapping

12.  Simplest way of mapping.
 Main memory is divided in blocks.
 Maps each block of main memory into only one possible cache line.
Direct Mapping

13. Direct Mapping

14. Fully Associative Mapping
 In associative cache mapping, the data from any location in
RAM can be stored in any location in cache.
 When the processor wants an address, all tag fields in the
cache as checked to determine if the data is already in the
cache.
 Each tag line requires circuitry to compare the desired
address with the tag field.
 All fields are checked in parallel.

15. Fully Associative Mapping

16.  Set associative mapping is a mixture of direct and associative mapping.
 The cache lines are grouped into sets.
 The number of lines in a set can vary from 2 to 16.
 A portion of the address is used to specify which set will hold an
address.
 The data can be stored in any of the lines in the set.
Set-Associative Mapping

17. Set Associative Mapping
V-Set Associative
Mapping

18. Set Associative Mapping
K-Set Associative
Mapping

19. Interrupt Driven I/O

20. What is Interrupt?
 Event that disrupts the normal execution of a program and causes the
execution of special instructions.

21. Interrupt Driven I/O
 In Interrupt Driven I/O approach, the processor issues an I/O command
to a module and then go on to do some other useful work.
 The I/O module with then interrupt the processor to request service
when it is ready to exchange data with the processor. The processor
then executes resumes its former processing.

22. Simple Interrupt Processing

23. Advantages of Interrupt Driven I/O
 I/O is important aspect for communicating.
 Interrupt adapts to the processor speed and I/O device, automatically.

24. Drawbacks of Interrupt Driven I/O
 The I/O transfer rate is limited by the speed with which the processor
can test and service a device.
 Needs continues intervention of processor, so it consumes time.

25. DMA Based I/O

26. What is DMA?
 DMA – Direct Memory Access
 In this method the input and output devices read/write information from
the main memory without interference of the CPU through the system
bus.

27. Block Diagram of DMA

28. DMA Operation
 The processor issues a command to DMA module
 Read or write
 I/O device address using data lines
 Starting memory address using data lines – stored in address
register
 Number of words to be transferred using data lines – stored in
data register

29. DMA Operation (Cont.)
 The processor then continues with other work.
 DMA module transfers the entire block of data – one word at a time –
directly to or from memory without going through the processor.
 DMA module sends an interrupt to the processor when complete.

30. Configuration of DMA
Single-bus, Detached DMA
Single-bus, Integrated DMA
I/O Bus

31. Advantages of DMA
 Fast transfer of data.
 CPU and DMA run concurrently under cache mode.
 DMA can trigger an interrupt, which frees the CPU so the speed
increases.

32. Input Output Channels and
Processors

33. Input Output Channels and Processors
 I/O processor is an extension of the concept of DMA. The I/O
processor can execute specialized I/O program residing in the memory
without intervention of the CPU.
 CPU only needs to specify a sequence of I/O activity to I/O processor
 An advanced I/O processor can have its own memory, enabling a large
set of I/O devices to be controlled without much involvement from the
CPU.

34. Types of I/O channels
 Controls multiple high-speed devices
 Dedicated to the transfer of data with one of the devices
 Each device handled by a controller or I/O module
 I/O channel controls these I/O controllers
 1.) Selector Channel

35. Types of I/O channels
 2.) Multiplexor Channel
 Can handle multiple devices at the same time
 Byte multiplexor – used for low-speed devices
 Block multiplexor – interleaves blocks of data from several devices.

36. Advantages I/O channels
 Makes transfers less visible to CPU, spreads the complexity
 Can Improve speed
 Can improve device organization flexibility

37. Conclusion
 Input output devices gets connected to computer through I/O Ports.
 There are Direct mapping, Fully Associative and Set-Associative
method techniques for mapping the memory.
 There are various method of transferring data from Input output
devices to the memory or memory to Input Output devices.
Like : Interrupt Driven I/O, DMA Based I/O, Input Output
Processors.

38.  Book : Computer Organization and Architecture by William Stallings
 Images : Google Images
Reference

39. Any Queries?

40. Thank You