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BITS Pilani
Pilani Campus
Data Storage Technologies
& Networks
Dr. Virendra Singh Shekhawat
Department of Computer Science and Information Systems
BITS Pilani, Pilani Campus
Topics
โ€ข Storage Devices (Secondary Storage)
โ€“ Solid State Storage (SSDs and PCI expansion card)
โ€ข Flash Memory
2
Image Source: electronicdesign.com
BITS Pilani, Pilani Campus
SSD Fundamentals
โ€“ 2.5 in. and 3.5 in. form factors
โ€“ Supports SAS, SATA and FC interfaces and protocols
โ€“ Different types as Flash Memory, Phase change
Memory (PCM) Ferroelectric RAM (FRAM)
โ€“ Semiconductor based hence no mechanical parts
โ€“ Predictable performance due to no positional
latency (i.e. Seek time and Rotational latency)
3
BITS Pilani, Pilani Campus
Flash Memory
โ€ข Semiconductor based persistent storage
โ€ข Two types
โ€“ NAND and NOR flash
โ€ข Anatomy of flash memory
โ€“ Cells ๏ƒ  Pages ๏ƒ  Blocks
โ€“ New flash device comes with all cells set to 1
โ€“ Cells can be programmed from 1 to 0
โ€“ To change the value of cell back to 1 then we need
to erase entire block
โ€ข Can be erased at block level only!
4
BITS Pilani, Pilani Campus
Read/Write/Programming on
Flash Memory
โ€ข Read operation is the fastest operation
โ€ข First time write is very fast
โ€“ Every cell in the block is preset to 1 and can be
individually programmed to 0
โ€“ If any part of a flash memory block has already been
written to, all subsequent writes to any part of that
block will require a process called read/erase/program
โ€ข It is 100 times slower than read operation
โ€“ Erasing is a 10 times slower process than read
operation
5
BITS Pilani, Pilani Campus
NAND vs. NOR
6
NAND NOR
Cost per bit Low High
Capacity High Low
Read Speed Medium *High
Write Speed High Low
File Storage Use Yes No
Code Execution Hard Easy
Stand by Power Medium Low
Erase Cycles High Low
*Individual cells (in NOR) are connected in parallel which enables random reads faster
BITS Pilani, Pilani Campus
Anatomy of NAND Flash
โ€ข NAND Flash types
โ€“ Single level cell (SLC)
โ€ข A cell can store 1 bit of data
โ€ข Highest performance and longest life span (100,000 program/erase cycles
per cell)
โ€“ Multi level cell (MLC)
โ€ข Stores 2 bits of data per cell.
โ€ข P/E cycles = 10,000
โ€“ Enterprise MLC (eMLC)
โ€ข MLC with stronger error correction
โ€ข Heavily over-provisioned for high performance and reliability
โ€“ e.g. a 400 GB eMLC drive might actually have 800 GB of eMLC flash
โ€“ Triple level cell (TLC)
โ€ข Stores 3 bits per cell
โ€ข P/E cycles = 5,000 per cell
โ€ข High on capacity but low on performance and reliability
7
BITS Pilani, Pilani Campus
Enterprise Class SSD
โ€ข More over-provisioned capacity
โ€“ Provides Better performance and life-time
โ€ข More cache
โ€“ Any write to a block that already contains data
requires to copy the existing contents into the cache
โ€“ Helps to coalesce writes and combining writes
โ€ข More channels
โ€“ Allows concurrent I/O operations
โ€ข More comprehensive warranty
8
BITS Pilani, Pilani Campus
Hybrid Drives
โ€ข Having both rotating platter
and solid-state memory (i.e.
combination of HDD and SSD)
โ€“ Tradeoff between high capacity
and performance
โ€ข Hybrid storage technologies
โ€“ Dual drive
โ€ข Separate SSD and HDD devices are
installed in a computer
โ€“ SSHD drive
โ€ข Single drive having NAND flash
memory and HDD
9
BITS Pilani, Pilani Campus
Thank You!
10

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M1 rl 1.3.1

  • 1. BITS Pilani Pilani Campus Data Storage Technologies & Networks Dr. Virendra Singh Shekhawat Department of Computer Science and Information Systems
  • 2. BITS Pilani, Pilani Campus Topics โ€ข Storage Devices (Secondary Storage) โ€“ Solid State Storage (SSDs and PCI expansion card) โ€ข Flash Memory 2 Image Source: electronicdesign.com
  • 3. BITS Pilani, Pilani Campus SSD Fundamentals โ€“ 2.5 in. and 3.5 in. form factors โ€“ Supports SAS, SATA and FC interfaces and protocols โ€“ Different types as Flash Memory, Phase change Memory (PCM) Ferroelectric RAM (FRAM) โ€“ Semiconductor based hence no mechanical parts โ€“ Predictable performance due to no positional latency (i.e. Seek time and Rotational latency) 3
  • 4. BITS Pilani, Pilani Campus Flash Memory โ€ข Semiconductor based persistent storage โ€ข Two types โ€“ NAND and NOR flash โ€ข Anatomy of flash memory โ€“ Cells ๏ƒ  Pages ๏ƒ  Blocks โ€“ New flash device comes with all cells set to 1 โ€“ Cells can be programmed from 1 to 0 โ€“ To change the value of cell back to 1 then we need to erase entire block โ€ข Can be erased at block level only! 4
  • 5. BITS Pilani, Pilani Campus Read/Write/Programming on Flash Memory โ€ข Read operation is the fastest operation โ€ข First time write is very fast โ€“ Every cell in the block is preset to 1 and can be individually programmed to 0 โ€“ If any part of a flash memory block has already been written to, all subsequent writes to any part of that block will require a process called read/erase/program โ€ข It is 100 times slower than read operation โ€“ Erasing is a 10 times slower process than read operation 5
  • 6. BITS Pilani, Pilani Campus NAND vs. NOR 6 NAND NOR Cost per bit Low High Capacity High Low Read Speed Medium *High Write Speed High Low File Storage Use Yes No Code Execution Hard Easy Stand by Power Medium Low Erase Cycles High Low *Individual cells (in NOR) are connected in parallel which enables random reads faster
  • 7. BITS Pilani, Pilani Campus Anatomy of NAND Flash โ€ข NAND Flash types โ€“ Single level cell (SLC) โ€ข A cell can store 1 bit of data โ€ข Highest performance and longest life span (100,000 program/erase cycles per cell) โ€“ Multi level cell (MLC) โ€ข Stores 2 bits of data per cell. โ€ข P/E cycles = 10,000 โ€“ Enterprise MLC (eMLC) โ€ข MLC with stronger error correction โ€ข Heavily over-provisioned for high performance and reliability โ€“ e.g. a 400 GB eMLC drive might actually have 800 GB of eMLC flash โ€“ Triple level cell (TLC) โ€ข Stores 3 bits per cell โ€ข P/E cycles = 5,000 per cell โ€ข High on capacity but low on performance and reliability 7
  • 8. BITS Pilani, Pilani Campus Enterprise Class SSD โ€ข More over-provisioned capacity โ€“ Provides Better performance and life-time โ€ข More cache โ€“ Any write to a block that already contains data requires to copy the existing contents into the cache โ€“ Helps to coalesce writes and combining writes โ€ข More channels โ€“ Allows concurrent I/O operations โ€ข More comprehensive warranty 8
  • 9. BITS Pilani, Pilani Campus Hybrid Drives โ€ข Having both rotating platter and solid-state memory (i.e. combination of HDD and SSD) โ€“ Tradeoff between high capacity and performance โ€ข Hybrid storage technologies โ€“ Dual drive โ€ข Separate SSD and HDD devices are installed in a computer โ€“ SSHD drive โ€ข Single drive having NAND flash memory and HDD 9
  • 10. BITS Pilani, Pilani Campus Thank You! 10