3. BITS Pilani, Pilani Campus
SSD Fundamentals
โ 2.5 in. and 3.5 in. form factors
โ Supports SAS, SATA and FC interfaces and protocols
โ Different types as Flash Memory, Phase change
Memory (PCM) Ferroelectric RAM (FRAM)
โ Semiconductor based hence no mechanical parts
โ Predictable performance due to no positional
latency (i.e. Seek time and Rotational latency)
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4. BITS Pilani, Pilani Campus
Flash Memory
โข Semiconductor based persistent storage
โข Two types
โ NAND and NOR flash
โข Anatomy of flash memory
โ Cells ๏ Pages ๏ Blocks
โ New flash device comes with all cells set to 1
โ Cells can be programmed from 1 to 0
โ To change the value of cell back to 1 then we need
to erase entire block
โข Can be erased at block level only!
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5. BITS Pilani, Pilani Campus
Read/Write/Programming on
Flash Memory
โข Read operation is the fastest operation
โข First time write is very fast
โ Every cell in the block is preset to 1 and can be
individually programmed to 0
โ If any part of a flash memory block has already been
written to, all subsequent writes to any part of that
block will require a process called read/erase/program
โข It is 100 times slower than read operation
โ Erasing is a 10 times slower process than read
operation
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6. BITS Pilani, Pilani Campus
NAND vs. NOR
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NAND NOR
Cost per bit Low High
Capacity High Low
Read Speed Medium *High
Write Speed High Low
File Storage Use Yes No
Code Execution Hard Easy
Stand by Power Medium Low
Erase Cycles High Low
*Individual cells (in NOR) are connected in parallel which enables random reads faster
7. BITS Pilani, Pilani Campus
Anatomy of NAND Flash
โข NAND Flash types
โ Single level cell (SLC)
โข A cell can store 1 bit of data
โข Highest performance and longest life span (100,000 program/erase cycles
per cell)
โ Multi level cell (MLC)
โข Stores 2 bits of data per cell.
โข P/E cycles = 10,000
โ Enterprise MLC (eMLC)
โข MLC with stronger error correction
โข Heavily over-provisioned for high performance and reliability
โ e.g. a 400 GB eMLC drive might actually have 800 GB of eMLC flash
โ Triple level cell (TLC)
โข Stores 3 bits per cell
โข P/E cycles = 5,000 per cell
โข High on capacity but low on performance and reliability
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8. BITS Pilani, Pilani Campus
Enterprise Class SSD
โข More over-provisioned capacity
โ Provides Better performance and life-time
โข More cache
โ Any write to a block that already contains data
requires to copy the existing contents into the cache
โ Helps to coalesce writes and combining writes
โข More channels
โ Allows concurrent I/O operations
โข More comprehensive warranty
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9. BITS Pilani, Pilani Campus
Hybrid Drives
โข Having both rotating platter
and solid-state memory (i.e.
combination of HDD and SSD)
โ Tradeoff between high capacity
and performance
โข Hybrid storage technologies
โ Dual drive
โข Separate SSD and HDD devices are
installed in a computer
โ SSHD drive
โข Single drive having NAND flash
memory and HDD
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