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JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016 3901
Losses of Slot Mode Devices
Maithem Salih, Keyon Janani, Xi Chen, Eric Jacobson, Sarita Gautam, and Alan Mickelson
Abstract—An array of 200 silicon-on-insulator slot waveguide
devices of varying slot widths, ribs widths, taper lengths, and slot
lengths were created in each cell of a wafer fabricated at a com-
mercial foundry. The cells were cleaved into individual chips after
fabrication. Some chips were coated with thin films of polymers
that fully infiltrated the slots. Measurements of spectral loss were
made on the grating coupler waveguide devices of both coated and
uncoated chips. Individual devices exhibited insertion losses vary-
ing from several dB up to values so great that the response was
below the noise floor of the optical spectrum analyzer (OSA) em-
ployed as a receiver. The chips that failed the transmission test were
primarily uncoated ones. Nominally identical devices on different
chips exhibited nominally identical behavior. A commercial soft-
ware program was used to simulate each of the structures that were
included in the 200 device test. The simulations were seen to agree
quantitatively well with the experimental results and to show a de-
gree of qualitative agreement. Comparison of the experiment and
the simulations indicate that the loss inherent in a slot waveguide
is quite low. Also near loss free couplers from ridges to slots are
achievable. Use of a surface roughness model in comparison with
analytical results for slow mode propagation indicates that the ex-
cess loss that slots exhibit with respect to a ridge mode counterpart
arise almost solely from surface scattering off the surface rough-
ness. The increased loss in the case of the slot guide arises from the
higher electromagnetic energy density at the surface of the guide
due to the electric field discontinuity that is employed as a guidance
mechanism in slot modes in contradistinction to ridge modes that
are index-guided. Conclusions include some speculation as to the
limits on the loss that can be achieved by variation aware design
of slot guides without any improvement in surface roughness over
what is now available with fabrication in commercial foundries.
Index Terms—Optical losses, optical propagation, optical scat-
tering, optical waveguides, optics, silicon on insulator technology.
I. INTRODUCTION
THE demand in the 21st century for innovation and ad-
vancement in the field of data communication has driven a
Manuscript received December 01, 2015; revised February 18, 2016 and
March 17, 2016; accepted March 25, 2016. Date of publication April 13,
2016; date of current version July 22, 2016. This work was supported
in part by the NSF under Grant CCF-0829950 EMT/NANO: Broadcast
Optical Interconnects for Global Communication in Many-Core Chips Mul-
tiprocessor, CAREER: Communication System Design for Future Integrated
Circuit, and IIP 1342641 “I-Corps: Multiwavelength Integrated Nanophotonic
Transceiver” CCF-0954157; and in part by Lightwave Logic, Inc. under re-
search contract OCG5700B and OCG6092B “Silicon Organic Hybrid for Data
Communication, and OCG5665B ”Measuring (χ3 ) on a Device." The work of
M. Salih was supported by the Republic of Iraq, Ministry of Higher Education
and Scientific Research, Research and Development Directorate.
M. Salih is with the Department of Electronics and Communication Engi-
neering, University of Kufa, Najaf 54001, Iraq, and also with Guided Wave
Optics Lab, University of Colorado Boulder, Boulder, CO 80309 USA (e-mail:
maythem.shukur@uokufa.edu.iq).
K. Janani, X. Chen, E. Jacobson, S. Gautam, and A. Mickelson are with
the Department of Electrical, Computer and Energy Engineering, University of
Colorado Boulder, Boulder, CO 80309 USA (e-mail: keyon.janani@colorado.
edu; xi.chen@colorado.edu; erja3656@colorado.edu; sarita.gautam@colorado.
edu; alan.mickelson@colorado.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JLT.2016.2554467
surge of research towards the applications of silicon photonics
in this field. Many attempts have been made to shrink photonic
building blocks in order to realize higher scales of integration.
The strong guidance of silicon on insulator (SOI) allows for
sub-wavelength light confinement [1].
Slot waveguides that allow for tighter confinement than ridges
have been demonstrated in numerous works such as [2]–[4] and
maintain said confinement through various functionalities such
as have been shown in [5]. Slots allow for infiltration and further
manipulation [6] of dissimilar materials into a silicon integrated
optical structure. These materials are usually designed with a
goal of high optical nonlinearity [7], [8]. Silicon organic hybrids
facilitate all optical processing [9]–[12] using devices such as all
optical switches and gates which have been explored for decades
[13]–[25] and are still being expanded upon today [26]. More
recent works have used these organic hybrids to pursue electro
optic modulation through components [27] and devices theo-
rized and characterized by many in the field [28]–[31] and later
demonstrated as IQ modulators, electro-optic ring modulators
[32], and Mach Zehnder slot modulators able to operate above
the GHz range [33]–[42]. For all optical processing, though, low
insertion loss is vital [43]. Understanding loss mechanisms is
necessary for design of a desired function.
In this paper, we have measured and simulated the transmis-
sion of slot devices with different characteristics in alternative
ways from previous works [44]–[46]. Several deductions are
made by comparing the experimental and simulation results.
We isolate the influence of several parameters on propagation
loss and investigate the possibility of reducing loss through other
means than improving the surface roughness of the sidewalls.
II. STRUCTURE OF A SLOT DEVICE
Fig. 1(a) shows a general layout for the grating coupler wave-
guide devices which were used in order to test SOI slot devices
in this work. Each of these devices starts and ends with grating
couplers in order to couple light into out of single-mode fibers.
After the input grating coupler there is a short strip waveguide,
25 μm in length, of Si (n= 3.49) with a (10 ∗ 0.22) μm2
cross
section to keep the mode size compatible between the fiber
and the guiding elements in PICs. Then the strip waveguide
tapers in a linear inverse shape to form a taper mode converter
that works to reduce the mode size from (10 ∗ 0.22) μm2
to
(0.45 ∗ 0.22) μm2
cross section along 500 μm. As shown in Fig.
1(b), a strip-slot taper coupler region [47], or an overlap region
between strip and slot, starts where the waveguide tapers from a
(0.45 ∗ 0.22) μm2
width to a (0.13 ∗ 0.22) μm2
width along the
taper coupler length LT and is sandwiched between two Si ribs
in a (V) shape with a small gap between the tapered waveguide
and each rib. In the geometry of the taper coupler, and for more
efficient coupling, the Si ribs extend along LT with increases in
0733-8724 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
3902 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016
Fig. 1. (a) Layout of the slot device and (b) geometry of a strip-slot taper
coupler.
Fig. 2. Layout of the ridge waveguide device.
their widths by the inner sides only, thus coupling all light in the
Si ribs. Beyond a few μms from LT their widths are decreased
on the outer side along 30 _m in order to couple all of the light
into the slot, as is shown later. The structure then continues with
constant size at each rib, (0.22 ∗ Wr) μm2
, to configure the slot
waveguide with slot size (0.22 ∗ Ws) μm2
, and slot length Ls,
where Wr and Ws are rib and slot widths respectively. Since
all devices are symmetric, all these sections are repeated in the
opposite direction at the output end. All of the segments in all
structures have been made on an SiO2 layer (n = 1.44) with
height hSiO2
= 2 μm. Furthermore, some of the SOI devices
are uncoated and some of them coated with a polyimide (PI)
polymer layer (n = 1.7) with height hP I = 0.5 μm.
Several of the SOI ridge devices, with size (0.45 ∗ 0.22) μm2
and different lengths, are designed, as shown in Fig. 2, fabricated
and tested. These ridge devices have been tested using the same
grating couplers waveguide configurations as the slot devices.
The sizes of the ridge waveguides were made in order to keep
the single-mode guided throughout without radiation and with
loss as low as possible. The measurements of these devices were
used to de-embed the influence of the grating coupler. As in slot
devices, there are polymer coated ridge devices.
III. FABRICATION
All slot and ridge devices used in this study are fabricated
on a 200-mm-diameter SOI wafer with an IMEC 193 nm deep
ultra-violet lithography process. The functional layers of the
wafer are comprised of a 220(±3.5) nm crystalline silicon layer
Fig. 3. SEM images for (a) a slot waveguide, (b) a ridge waveguide, (c) a
strip-slot coupling region, and (d) a whole strip-slot taper coupler.
Fig. 4. Schematic of the in-house measurement setup.
on top of a 2 μm buried silicon oxide layer. The silicon ox-
ide layer is sufficiently thick to reduce optical leakage through
the substrate. A 500 nm polymer coating is deposited after the
wafer is fabricated. The polymer used is a photo-definable PI
(HD-8820) from MicroSystems. Scanning electron microscopic
(SEM) images of sections of fabricated devices are shown in
Fig. 3. As can be seen in SEM images, a little roughness appears
on the sidewall of each Si rib regardless of the width. The stan-
dard deviation (σ) of the surface roughness is estimated about
4 nm. The size magnitude of this roughness is small compared
to the slot dimensions, but the effects on guiding properties and
propagation loss may still be significant.
IV. MEASURING SETUP
All of the device measurements were carried out in-house
using the apparatus depicted in Fig. 4. The system employs
a broadband SLED light source with a wavelength range of
1500–1600 nm. The photonic chip is placed on a temperature
controlled sample stage. A single mode fiber delivers the light
signal to the photonic chip where light is coupled into device
through a grating coupler located at one end of each device. The
grating coupler is optimized for passing TE modes where E-
field is parallel to the grating grooves. After passing through the
device, light is coupled out through another TE-mode grating
coupler into an OSA via the second single mode fiber. The maxi-
mum resolution of the OSA is 80 pm throughout the wavelength
range of 600–1700 nm. The fiber movements are precisely con-
SALIH et al.: LOSSES OF SLOT MODE DEVICES 3903
trolled by two 3D motion controllers which are capable of sub-
micrometer adjustment. A visible camera is used to monitor the
movement of the two fiber tips. Two probes are used to apply
electrical signals to the photonic chip where necessary.
V. SIMULATION METHODS
In the simulation section, a commercial software program
has been used to simulate SOI slot waveguide structures which
are included in this work. The simulation was done for each of
the structures as strip-slot-strip waveguides without involving
the grating couplers. The impossibility of simulating the whole
structure results from incompatibility of 2D simulation, which
is required for grating couplers, with 3D one which is used
for the waveguides devices. For this reason the measurement
results were calibrated by using transmission results of ridge
waveguides, as was shown in Section V. This tool aims to solve
modes across any section of the slot or ridge device, as well as to
simulate the optical wave propagation in waveguides. In all sim-
ulation cases, whether it is mode solving or optical propagation,
the wavelength is set at 1.55 μm with a quasi-TE polarization.
A. Mode Solving
This tool uses a fully vectorial solver based on the Film Mode
Matching (FMM) analysis, which is a perfect solver for both
slot and ridge waveguides with rectangular geometry. The FMM
method models an arbitrary waveguide by a list of vertical slices,
each laterally uniform, but composed vertically of a number of
layers. FMM solver is used to find the modes of a polarization-
independent structure. The mode profile for the fundamental
quasi-TE mode is plotted below in Fig. 5, with a calculating
computing area (4 ∗ 2) μm2
and waveguide dimensions; Ws =
0.2 μm, Wr = 0.2 μm, and rib height = 0.22 μm. A wide range
of parameters can be calculated for each mode, including the
effective index, group index, mode dispersion and confinement
factor that can be defined as the fraction of power that confined
and guided in slot region, where it can be found as [48]
Γ = Slot Re (E × H∗
)
Total Re (E × H∗
)
(1)
where E and H are the electric and magnetic fields. All these
parameters can be scanned with varying geometry of the wave-
guide, allowing fine-tuning the design of the SOI devices for
specific purposes. Mode profiles can be taken across any section
along any simulated SOI device, thus coupling and propagating
modes can be monitored along the slot device. Also, 1D plots of
quasi-TE modes across ridge and slot waveguides can be done
by the simulation and they can be used to analyze the single
mode condition and the relation between the confinement factor
and device dimensions, as shown in Fig. 5(b).
B. Optical Wave Propagation
On the other hand, the same software program is also used
for simulating the optical propagation in waveguides devices in
3D and it is fully integrated with the mode solver where it relies
on the Eigen Mode Expansion, which is a rigorous and highly
Fig. 5. (a)Profile of the quasi-TE mode and (b) the corresponding electric
field intensity distribution across an SOI slot waveguide with Ws = 0.2 μm,
Wr = 0.2 μm, a rib height = 0.22 μm, and at 1.55 μm wavelength.
Fig. 6. Intensity propagation profile through a whole slot device with slot
length Ls = 1868 μm, Wr = 0.2 μm, and Ws = 0.13 μm (a) without in-
cluded scattering interface loss and (b) included scattering loss.
efficient method [49], [50]. Theoretically, the propagation losses
in optical waveguides include the absorption loss, the interface
scattering loss, and the bending radiation loss [51]. Both of the
straight structure of the slot and the low absorption of coeffi-
cients of Si and polymer [9] limit the bending and absorption
losses while the scattering loss due to the roughness of the side-
walls of the ribs becomes more dominated. The transmission
loss of any simulated device which is reported by simulation,
includes the inherent and insertion loss, is closed to be free along
the device with assuming ideal smooth surfaces.Fig. 6(a) shows
a simulated optical propagation via an SOI slot device without
an effect of the surface roughness. In case of optical propagation
under effect of the surface roughness; the scattering coefficient
model is involved in the simulation as an attenuation coefficient.
The scattering coefficient model, αscatt, is adopted as following
[52]
αscatt =
σ2
k2
0 h
β
E2
s
E2dx
Δn2
(2)
where, σ is the standard deviation of roughness on the side-
walls in μm, k0 is the free space wavenumber, β is the model
propagation constant, h is the transverse propagation constant,
Δn is the refractive index contrast between the waveguide ribs
3904 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016
and the coating layer (cladding), and E 2
s
E 2 dx
is the normalize
electric field intensity at the side interfaces of core/cladding.
In case of a slot waveguide structure the electric field intensity
at the interfaces E2
s is represented by sum of both; the electric
field intensity at the inner sidewall E2
s1, and the electric field
intensity at the outer sidewall E2
s2, i.e. E2
s = E2
s1 + E2
s2 [53].
Fig. 6(b) shows a simulated optical propagation via an SOI slot
device with an effect of the surface roughness loss model.
VI. RESULTS AND DISCUSSION
In this section, simulations, calculations and room tempera-
ture measurements of the transmission of slot devices are pre-
sented. Analysis of these measurements and their theoretical
counterparts is depended to indicate an optimum design of an
SOI slot waveguide structure from point of how much light can
be confined into the slot region and how much light will be
propagated through it. Thus, a structure with high confinement
factor and low propagation loss is investigated. The strip slot
inverted taper coupler, with high coupling efficiency [47], is
used to ensure low coupling loss over all samples. On the other
hand, due to the low absorption of the Si strip and ribs and the
straight geometry of the slot device, the absorption and bend-
ing radiation losses are so small compared with the interface
scattering loss. Therefore, the scattering loss is considered the
dominant contributor to propagation losses [9]. Several factors
control the propagation loss and the confinement factor of the
slot waveguide structure like; structure dimensions and if it is
coated or not. Here, these factors will be discussed in order to
present a comprehensive analysis pave the way to an optimum
design.
A. Effect of Slot Waveguide Dimensions
The performance of the slot waveguide is wide affected by
the waveguide dimensions like; the slot width and rib width,
while the waveguide height does not significantly effect on this
performance [3]. The variation of the slot and ribs widths will
lead to vary the effective index of the fundamental mode in
this slot waveguide structure, where both slot and rib widths
play an important role in configure the profile of the electric
and magnetic fields across the waveguide section. Fig. 7 shows
the variation of both slot waveguide dimensions (slot width and
rib width) with the effective refractive index of the quasi-TE
fundamental mode of an SOI slot waveguide with Si ribs height,
hSi = 0.22 μm and operation wavelength at 1.55 μm.
It can be seen that the effective index is changed slowly
with varying the slot width varying the slot width while it has
significant variation when the Si rib width is changed. The
change in ribs width changes the individual mode at each rib
waveguide and then the fundamental mode at the slot which
results from their superimposing. The variation of the effective
index value will be reflected on the electric field intensity distri-
bution of the fundamental TE-mode of an SOI slot waveguide,
as shown in Fig. 8.
According to Eq. (1), a high confinement factor is ob-
tained when a high electric field intensity is confined in a slot
Fig. 7. Effective refractive index versus the slot and ribs widths of an SOI slot
waveguide structure with PI coating layer in thickness 0.5μm.
Fig. 8. Electric field intensity distribution of the fundamental quasi-TE mode
across an SOI slot waveguide with Si rib height 0.22 μm, PI coating layer
with 0.5 μm thickness, an operation wavelength 1.55 μm, (a) different Si ribs
width (Wr = 0.13, 0.2 and 0.3 μm), with a slot width Ws = 0.2 μm, and
(b) different slot widths (Ws = 0.1, 0.18, 0.26 μm) with a rib width Wr =
0.2 μm.
Fig. 9. Confinement factor versus slot waveguide dimensions (slot and ribs
widths) with constant Si ribs height = 0.22 μm, PI coating layer with 0.5 μm
thickness, quasi-TE polarization, and 1.55 μm an operation wavelength.
region. Thus, increasing the confinement factor is expected
when the slot width is decreased with constant ribs width.
Whereas the relation with the rib width is little bit complicated.
With a certain width, ribs can sandwich a strong electric field and
then give a maximum confinement factor. This is produced by
obtaining a fundamental effective index is closed to the refrac-
tive index of the slot region. Fig. 9 shows the variation of the
confinement factor with both slot waveguide dimensions, slot
and rib widths, for a fundamental quasi-TE mode and an oper-
ation wavelength 1.55 μm. The manipulation of slot waveguide
dimensions and change the profile of the electric field intensity
across the waveguide will also lead to vary the value of the elec-
tric field intensity at the side walls of ribs, as shown in Fig. 8,
which affect directly on the scattering loss of slot waveguides,
according to Eq. (2). Increasing this value will increase the effect
of the surface roughness at sidewalls of ribs and then increasing
SALIH et al.: LOSSES OF SLOT MODE DEVICES 3905
Fig. 10. Measured propagation losses (marks) of SOI slot waveguide struc-
tures with different slot width Ws; 0.13, 0.2, and 0.25 μm and different ribs
widths Wr ; 0.13 μm (blue quadrants) and 0.2 μm(red squares), compare with
calculated propagation losses (curves) of simulated samples with different slot
widths and ribs widths; 0.13 μm (green), 0.2 μm (violet), 0.3 μm (blue), at a
quasi-TE polarization and 1.55 μm an operating wavelength.
Fig. 11. Effective refractive index versus the slot and ribs widths of an SOI
slot waveguide structure without coating layer application.
the propagation loss. The transmission of several slot waveg-
uides with different slot width, like 0.13, 0.2, and 0.25 μm, and
different ribs widths, like 0.13 and 0.2 μm, are measured, de-
embedded and compared with theoretical calculations as shown
in Fig. 10.
It’s clear that the scattering loss is decreased when the slot
width is increased as a result of decreasing the electric field
intensity at the sidewalls of ribs. Also high scattering loss is
expected with Si ribs widths which confine high electric field
intensity at the slot region. According to the confinement factor
and the scattering loss of coated slot waveguide structures with
different dimensions, an optimum structure can be given with a
slot region width about 0.2 μm and Si ribs width about 0.2 μm
too. With these dimensions, the SOI slot waveguide structure
is suitable for using as a functional device as it can confined
maximum light in the slot region even with significant scattering
loss. Especially for functional applications, where it does not
need for a long slot waveguide.
B. Effect of the Refractive Index of the Slot Region
Same as the above scenario, the performance of the SOI slot
waveguide, without a coating layer application, is analyzed,
especially almost samples over uncoated chips are failed in ex-
perimental transmission test. As in case of coated structures, the
relations of structure dimensions (slot and ribs widths) with the
effective index, electric field intensity, and then the confinement
factor are introduced as shown in Figs. 11, 12, and 13. By com-
paring both Figs. 13 and 15, a very low confinement factor can
Fig. 12. Electric field intensity distribution of the fundamental quasi-TE mode
across an uncoated SOI slot waveguide with Si rib height 0.22 μm, an operation
wavelength 1.55μm, (a) different Si ribs width (Wr = 0.13, 0.2, and 0.3 μm),
with a slot width Ws = 0.2 μm and (b) different slot widths (Ws = 0.1, 0.18,
and 0.26 μm) with a rib width Wr = 0.2 μm.
Fig. 13. Confinement factor versus slot waveguide dimensions (slot and ribs
widths) with constant Si ribs height = 0.22 μm, without any coating layer
application, quasi-TE polarization, and 1.55 μm an operation wavelength.
be recorded (≈0.06) with thin ribs (Wr below 0.2 μm) where
the resultant effective index is closed to unity so almost light
will be radiated out of the waveguide, as shown in Fig. 11.
As a result of the large contrast index between air and silicon,
the confinement factor shows a significant enhancement (0.35
to 0.41) when the ribs width get more wide (from 0.2 to 0.3 μm)
where the effective index value shifts from unity. Definitely,
when the ribs width is more a low confinement factor is expected
because light will be kept inside ribs.
According to that, to get maximum confinement factor of
an uncoated SOI structure a rib width about 0.25 to 0.3 μm is
required with a slot width about 0.2 μm in order to rein the ex-
pected high scattering loss. In fact, the scattering loss is very
high in uncoated structure, comparing with coated ones, even
with wide slot widths. This is because of the high electric field
intensity at the sidewalls of ribs as well as to the large con-
trast index between air and silicon. Fig. 14 shows the simulated
scattering loss for uncoated SOI slot waveguide structures with
different slot widths and ribs widths; 0.13, 0.2, and 0.2 μm. This
indicates a reason of the faulty of almost uncoated sample in the
transmission measuring test.
A comparison can be done between two SOI slot waveguide
structures, with and without a coating layer application, where
they have approximately a same good confinement factor. These
structures are; coated device with ribs and slot widths 0.2 μm
and, and uncoated one with a rib width 0.2 μm and a slot width
0.2 μm. The confinement factor of both devices is about (0.34).
Although they have approximately equal confinement factors,
3906 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016
Fig. 14. Calculated scattering loss of uncoated SOI slot waveguide structures
with different slot widths, ribs height 0.22 μm, and ribs widths; 0.13 μm (blue),
0.2 μm (red), and 0.3 μm (green), at quasi-TE polarization and an operation
wavelength 1.55 μm.
Fig. 15. Electric field intensity distribution of the fundamental quasi-TE mode
across (a) a coated SOI slot waveguide by PI with a Si ribs width Wr = 0.2 μm,
a slot width Ws = 0.2 μm, (b) an uncoated SOI slot waveguide with a Si ribs
width Wr = 0.3 μm, a slot width Ws = 0.2 μm. Both of them with Si rib
height 0.22 μm, an operation wavelength 1.55 μm.
the electric field intensity at sidewalls of ribs in case of uncoated
structure is more higher than its counterpart in the coated struc-
ture, as shown in Fig. 15. This may describe the effect of the
coating layer that enhances the performance by reducing the
propagation loss in SOI slot waveguide structures.
VII. CONCLUSION
From all the measurements which have been performed in
this work for several slot devices with different specifications,
and all of the analysis which have been formed depending on
the theoretical background, simulation results, and mathemat-
ical calculations the following conclusions are deduced. The
scattering loss by the surface roughness of the waveguide side-
walls is the dominant loss in slot waveguides compared with
absorption, radiation losses. Scattering loss can be reduced ef-
fectively without an improvement in the surface roughness by
decreasing the electric field intensity at the sidewalls. This can
be achieved primarily by decreasing the index contrast between
slot and ribs regions via polymer coating processes, and by se-
lecting the proper slot and rib widths. Optimum confinement
can be produced with slot waveguide dimensions; 0.2 μm for
both slot and rib widths in case of coated structures, and 0.2 μm
as a slot and 0.3 μm as a rib width in case of uncoated struc-
ture. Almost uncoated devices are failed in transmission with
lengths do not exceed 1 mm, as a result of the high scattering
loss through these structures.
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Maithem Salih received the B.Sc. and M.Sc. degrees in laser and optoelec-
tronics engineering from Al-Nahrain University, Baghdad, Iraq, in 2005 and
2009, respectively, and the Ph.D. degree in optoelectronics engineering from
the University of Baghdad in 2015. He is a Faculty with Electronics and Com-
munication Engineering, University of Kufa, Iraq, and a Visiting Scholar with
Guided Wave Optics Lab, University of Colorado Boulder. His research inter-
ests include silicon photonics material and devices, SOH waveguides, nonlinear
optical devices.
Keyon Janani received the B.S. degree in electrical engineering from Louisiana
State University in 2010, and the M.S. degree in electrical engineering from the
University of Colorado Boulder in 2013. He is currently with the Guided Wave
Optics Laboratory, University of Colorado Boulder working on the Ph.D. in the
area of optics and biomedical application. His research interests include silicon
photonics material and devices, polymer thin-film waveguides, nonlinear optical
devices, and biosensing.
Xi Chen received the B.S. degree in microelectronics from Peking University,
Beijing, China, the M.S.E.E. degree from the University of Colorado Boulder,
and the Ph.D. degree in the area of nano-photonics. He is currently working as
a Postdoctoral Researcher. His research interests include silicon photonics ma-
terial and devices, polymer thinfilm waveguides, and nonlinear optical devices.
Eric Jacobson received the B.S. degree in engineering physics with minors
in electrical engineering and mathematics from the University of Colorado,
Boulder, in 2014. During the summer of 2013, he received a NSF funded
UROP grant to continue research within the Guided Wave Optics Laboratory.
His research interests include semiconductor materials, electro-optics, silicon
photonic and SOH devices, and nonlinear optics.
Sarita Gautam received the B.S. degree in electrical engineering from the
University of Colorado Boulder in 2013. She is currently working as a Profes-
sional Research Assistant at Guided Wave Optics Laboratory. Her research inter-
ests include semiconductor devices, silicon photonics devices, and optical data
communication.
Alan Mickelson received the Bachelors of Science degree in electrical engi-
neering from the University of Texas El Paso in 1973, and the Master of Science
degree in electrical engineering, and the Doctorate degree in electrical engineer-
ing with a subject minor in physics from the California Institute of Technology
in 1974 and 1978, respectively.

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Losses of Slot Mode Devices by Dr.Maithem Salih

  • 1. JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016 3901 Losses of Slot Mode Devices Maithem Salih, Keyon Janani, Xi Chen, Eric Jacobson, Sarita Gautam, and Alan Mickelson Abstract—An array of 200 silicon-on-insulator slot waveguide devices of varying slot widths, ribs widths, taper lengths, and slot lengths were created in each cell of a wafer fabricated at a com- mercial foundry. The cells were cleaved into individual chips after fabrication. Some chips were coated with thin films of polymers that fully infiltrated the slots. Measurements of spectral loss were made on the grating coupler waveguide devices of both coated and uncoated chips. Individual devices exhibited insertion losses vary- ing from several dB up to values so great that the response was below the noise floor of the optical spectrum analyzer (OSA) em- ployed as a receiver. The chips that failed the transmission test were primarily uncoated ones. Nominally identical devices on different chips exhibited nominally identical behavior. A commercial soft- ware program was used to simulate each of the structures that were included in the 200 device test. The simulations were seen to agree quantitatively well with the experimental results and to show a de- gree of qualitative agreement. Comparison of the experiment and the simulations indicate that the loss inherent in a slot waveguide is quite low. Also near loss free couplers from ridges to slots are achievable. Use of a surface roughness model in comparison with analytical results for slow mode propagation indicates that the ex- cess loss that slots exhibit with respect to a ridge mode counterpart arise almost solely from surface scattering off the surface rough- ness. The increased loss in the case of the slot guide arises from the higher electromagnetic energy density at the surface of the guide due to the electric field discontinuity that is employed as a guidance mechanism in slot modes in contradistinction to ridge modes that are index-guided. Conclusions include some speculation as to the limits on the loss that can be achieved by variation aware design of slot guides without any improvement in surface roughness over what is now available with fabrication in commercial foundries. Index Terms—Optical losses, optical propagation, optical scat- tering, optical waveguides, optics, silicon on insulator technology. I. INTRODUCTION THE demand in the 21st century for innovation and ad- vancement in the field of data communication has driven a Manuscript received December 01, 2015; revised February 18, 2016 and March 17, 2016; accepted March 25, 2016. Date of publication April 13, 2016; date of current version July 22, 2016. This work was supported in part by the NSF under Grant CCF-0829950 EMT/NANO: Broadcast Optical Interconnects for Global Communication in Many-Core Chips Mul- tiprocessor, CAREER: Communication System Design for Future Integrated Circuit, and IIP 1342641 “I-Corps: Multiwavelength Integrated Nanophotonic Transceiver” CCF-0954157; and in part by Lightwave Logic, Inc. under re- search contract OCG5700B and OCG6092B “Silicon Organic Hybrid for Data Communication, and OCG5665B ”Measuring (χ3 ) on a Device." The work of M. Salih was supported by the Republic of Iraq, Ministry of Higher Education and Scientific Research, Research and Development Directorate. M. Salih is with the Department of Electronics and Communication Engi- neering, University of Kufa, Najaf 54001, Iraq, and also with Guided Wave Optics Lab, University of Colorado Boulder, Boulder, CO 80309 USA (e-mail: maythem.shukur@uokufa.edu.iq). K. Janani, X. Chen, E. Jacobson, S. Gautam, and A. Mickelson are with the Department of Electrical, Computer and Energy Engineering, University of Colorado Boulder, Boulder, CO 80309 USA (e-mail: keyon.janani@colorado. edu; xi.chen@colorado.edu; erja3656@colorado.edu; sarita.gautam@colorado. edu; alan.mickelson@colorado.edu). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JLT.2016.2554467 surge of research towards the applications of silicon photonics in this field. Many attempts have been made to shrink photonic building blocks in order to realize higher scales of integration. The strong guidance of silicon on insulator (SOI) allows for sub-wavelength light confinement [1]. Slot waveguides that allow for tighter confinement than ridges have been demonstrated in numerous works such as [2]–[4] and maintain said confinement through various functionalities such as have been shown in [5]. Slots allow for infiltration and further manipulation [6] of dissimilar materials into a silicon integrated optical structure. These materials are usually designed with a goal of high optical nonlinearity [7], [8]. Silicon organic hybrids facilitate all optical processing [9]–[12] using devices such as all optical switches and gates which have been explored for decades [13]–[25] and are still being expanded upon today [26]. More recent works have used these organic hybrids to pursue electro optic modulation through components [27] and devices theo- rized and characterized by many in the field [28]–[31] and later demonstrated as IQ modulators, electro-optic ring modulators [32], and Mach Zehnder slot modulators able to operate above the GHz range [33]–[42]. For all optical processing, though, low insertion loss is vital [43]. Understanding loss mechanisms is necessary for design of a desired function. In this paper, we have measured and simulated the transmis- sion of slot devices with different characteristics in alternative ways from previous works [44]–[46]. Several deductions are made by comparing the experimental and simulation results. We isolate the influence of several parameters on propagation loss and investigate the possibility of reducing loss through other means than improving the surface roughness of the sidewalls. II. STRUCTURE OF A SLOT DEVICE Fig. 1(a) shows a general layout for the grating coupler wave- guide devices which were used in order to test SOI slot devices in this work. Each of these devices starts and ends with grating couplers in order to couple light into out of single-mode fibers. After the input grating coupler there is a short strip waveguide, 25 μm in length, of Si (n= 3.49) with a (10 ∗ 0.22) μm2 cross section to keep the mode size compatible between the fiber and the guiding elements in PICs. Then the strip waveguide tapers in a linear inverse shape to form a taper mode converter that works to reduce the mode size from (10 ∗ 0.22) μm2 to (0.45 ∗ 0.22) μm2 cross section along 500 μm. As shown in Fig. 1(b), a strip-slot taper coupler region [47], or an overlap region between strip and slot, starts where the waveguide tapers from a (0.45 ∗ 0.22) μm2 width to a (0.13 ∗ 0.22) μm2 width along the taper coupler length LT and is sandwiched between two Si ribs in a (V) shape with a small gap between the tapered waveguide and each rib. In the geometry of the taper coupler, and for more efficient coupling, the Si ribs extend along LT with increases in 0733-8724 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
  • 2. 3902 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016 Fig. 1. (a) Layout of the slot device and (b) geometry of a strip-slot taper coupler. Fig. 2. Layout of the ridge waveguide device. their widths by the inner sides only, thus coupling all light in the Si ribs. Beyond a few μms from LT their widths are decreased on the outer side along 30 _m in order to couple all of the light into the slot, as is shown later. The structure then continues with constant size at each rib, (0.22 ∗ Wr) μm2 , to configure the slot waveguide with slot size (0.22 ∗ Ws) μm2 , and slot length Ls, where Wr and Ws are rib and slot widths respectively. Since all devices are symmetric, all these sections are repeated in the opposite direction at the output end. All of the segments in all structures have been made on an SiO2 layer (n = 1.44) with height hSiO2 = 2 μm. Furthermore, some of the SOI devices are uncoated and some of them coated with a polyimide (PI) polymer layer (n = 1.7) with height hP I = 0.5 μm. Several of the SOI ridge devices, with size (0.45 ∗ 0.22) μm2 and different lengths, are designed, as shown in Fig. 2, fabricated and tested. These ridge devices have been tested using the same grating couplers waveguide configurations as the slot devices. The sizes of the ridge waveguides were made in order to keep the single-mode guided throughout without radiation and with loss as low as possible. The measurements of these devices were used to de-embed the influence of the grating coupler. As in slot devices, there are polymer coated ridge devices. III. FABRICATION All slot and ridge devices used in this study are fabricated on a 200-mm-diameter SOI wafer with an IMEC 193 nm deep ultra-violet lithography process. The functional layers of the wafer are comprised of a 220(±3.5) nm crystalline silicon layer Fig. 3. SEM images for (a) a slot waveguide, (b) a ridge waveguide, (c) a strip-slot coupling region, and (d) a whole strip-slot taper coupler. Fig. 4. Schematic of the in-house measurement setup. on top of a 2 μm buried silicon oxide layer. The silicon ox- ide layer is sufficiently thick to reduce optical leakage through the substrate. A 500 nm polymer coating is deposited after the wafer is fabricated. The polymer used is a photo-definable PI (HD-8820) from MicroSystems. Scanning electron microscopic (SEM) images of sections of fabricated devices are shown in Fig. 3. As can be seen in SEM images, a little roughness appears on the sidewall of each Si rib regardless of the width. The stan- dard deviation (σ) of the surface roughness is estimated about 4 nm. The size magnitude of this roughness is small compared to the slot dimensions, but the effects on guiding properties and propagation loss may still be significant. IV. MEASURING SETUP All of the device measurements were carried out in-house using the apparatus depicted in Fig. 4. The system employs a broadband SLED light source with a wavelength range of 1500–1600 nm. The photonic chip is placed on a temperature controlled sample stage. A single mode fiber delivers the light signal to the photonic chip where light is coupled into device through a grating coupler located at one end of each device. The grating coupler is optimized for passing TE modes where E- field is parallel to the grating grooves. After passing through the device, light is coupled out through another TE-mode grating coupler into an OSA via the second single mode fiber. The maxi- mum resolution of the OSA is 80 pm throughout the wavelength range of 600–1700 nm. The fiber movements are precisely con-
  • 3. SALIH et al.: LOSSES OF SLOT MODE DEVICES 3903 trolled by two 3D motion controllers which are capable of sub- micrometer adjustment. A visible camera is used to monitor the movement of the two fiber tips. Two probes are used to apply electrical signals to the photonic chip where necessary. V. SIMULATION METHODS In the simulation section, a commercial software program has been used to simulate SOI slot waveguide structures which are included in this work. The simulation was done for each of the structures as strip-slot-strip waveguides without involving the grating couplers. The impossibility of simulating the whole structure results from incompatibility of 2D simulation, which is required for grating couplers, with 3D one which is used for the waveguides devices. For this reason the measurement results were calibrated by using transmission results of ridge waveguides, as was shown in Section V. This tool aims to solve modes across any section of the slot or ridge device, as well as to simulate the optical wave propagation in waveguides. In all sim- ulation cases, whether it is mode solving or optical propagation, the wavelength is set at 1.55 μm with a quasi-TE polarization. A. Mode Solving This tool uses a fully vectorial solver based on the Film Mode Matching (FMM) analysis, which is a perfect solver for both slot and ridge waveguides with rectangular geometry. The FMM method models an arbitrary waveguide by a list of vertical slices, each laterally uniform, but composed vertically of a number of layers. FMM solver is used to find the modes of a polarization- independent structure. The mode profile for the fundamental quasi-TE mode is plotted below in Fig. 5, with a calculating computing area (4 ∗ 2) μm2 and waveguide dimensions; Ws = 0.2 μm, Wr = 0.2 μm, and rib height = 0.22 μm. A wide range of parameters can be calculated for each mode, including the effective index, group index, mode dispersion and confinement factor that can be defined as the fraction of power that confined and guided in slot region, where it can be found as [48] Γ = Slot Re (E × H∗ ) Total Re (E × H∗ ) (1) where E and H are the electric and magnetic fields. All these parameters can be scanned with varying geometry of the wave- guide, allowing fine-tuning the design of the SOI devices for specific purposes. Mode profiles can be taken across any section along any simulated SOI device, thus coupling and propagating modes can be monitored along the slot device. Also, 1D plots of quasi-TE modes across ridge and slot waveguides can be done by the simulation and they can be used to analyze the single mode condition and the relation between the confinement factor and device dimensions, as shown in Fig. 5(b). B. Optical Wave Propagation On the other hand, the same software program is also used for simulating the optical propagation in waveguides devices in 3D and it is fully integrated with the mode solver where it relies on the Eigen Mode Expansion, which is a rigorous and highly Fig. 5. (a)Profile of the quasi-TE mode and (b) the corresponding electric field intensity distribution across an SOI slot waveguide with Ws = 0.2 μm, Wr = 0.2 μm, a rib height = 0.22 μm, and at 1.55 μm wavelength. Fig. 6. Intensity propagation profile through a whole slot device with slot length Ls = 1868 μm, Wr = 0.2 μm, and Ws = 0.13 μm (a) without in- cluded scattering interface loss and (b) included scattering loss. efficient method [49], [50]. Theoretically, the propagation losses in optical waveguides include the absorption loss, the interface scattering loss, and the bending radiation loss [51]. Both of the straight structure of the slot and the low absorption of coeffi- cients of Si and polymer [9] limit the bending and absorption losses while the scattering loss due to the roughness of the side- walls of the ribs becomes more dominated. The transmission loss of any simulated device which is reported by simulation, includes the inherent and insertion loss, is closed to be free along the device with assuming ideal smooth surfaces.Fig. 6(a) shows a simulated optical propagation via an SOI slot device without an effect of the surface roughness. In case of optical propagation under effect of the surface roughness; the scattering coefficient model is involved in the simulation as an attenuation coefficient. The scattering coefficient model, αscatt, is adopted as following [52] αscatt = σ2 k2 0 h β E2 s E2dx Δn2 (2) where, σ is the standard deviation of roughness on the side- walls in μm, k0 is the free space wavenumber, β is the model propagation constant, h is the transverse propagation constant, Δn is the refractive index contrast between the waveguide ribs
  • 4. 3904 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016 and the coating layer (cladding), and E 2 s E 2 dx is the normalize electric field intensity at the side interfaces of core/cladding. In case of a slot waveguide structure the electric field intensity at the interfaces E2 s is represented by sum of both; the electric field intensity at the inner sidewall E2 s1, and the electric field intensity at the outer sidewall E2 s2, i.e. E2 s = E2 s1 + E2 s2 [53]. Fig. 6(b) shows a simulated optical propagation via an SOI slot device with an effect of the surface roughness loss model. VI. RESULTS AND DISCUSSION In this section, simulations, calculations and room tempera- ture measurements of the transmission of slot devices are pre- sented. Analysis of these measurements and their theoretical counterparts is depended to indicate an optimum design of an SOI slot waveguide structure from point of how much light can be confined into the slot region and how much light will be propagated through it. Thus, a structure with high confinement factor and low propagation loss is investigated. The strip slot inverted taper coupler, with high coupling efficiency [47], is used to ensure low coupling loss over all samples. On the other hand, due to the low absorption of the Si strip and ribs and the straight geometry of the slot device, the absorption and bend- ing radiation losses are so small compared with the interface scattering loss. Therefore, the scattering loss is considered the dominant contributor to propagation losses [9]. Several factors control the propagation loss and the confinement factor of the slot waveguide structure like; structure dimensions and if it is coated or not. Here, these factors will be discussed in order to present a comprehensive analysis pave the way to an optimum design. A. Effect of Slot Waveguide Dimensions The performance of the slot waveguide is wide affected by the waveguide dimensions like; the slot width and rib width, while the waveguide height does not significantly effect on this performance [3]. The variation of the slot and ribs widths will lead to vary the effective index of the fundamental mode in this slot waveguide structure, where both slot and rib widths play an important role in configure the profile of the electric and magnetic fields across the waveguide section. Fig. 7 shows the variation of both slot waveguide dimensions (slot width and rib width) with the effective refractive index of the quasi-TE fundamental mode of an SOI slot waveguide with Si ribs height, hSi = 0.22 μm and operation wavelength at 1.55 μm. It can be seen that the effective index is changed slowly with varying the slot width varying the slot width while it has significant variation when the Si rib width is changed. The change in ribs width changes the individual mode at each rib waveguide and then the fundamental mode at the slot which results from their superimposing. The variation of the effective index value will be reflected on the electric field intensity distri- bution of the fundamental TE-mode of an SOI slot waveguide, as shown in Fig. 8. According to Eq. (1), a high confinement factor is ob- tained when a high electric field intensity is confined in a slot Fig. 7. Effective refractive index versus the slot and ribs widths of an SOI slot waveguide structure with PI coating layer in thickness 0.5μm. Fig. 8. Electric field intensity distribution of the fundamental quasi-TE mode across an SOI slot waveguide with Si rib height 0.22 μm, PI coating layer with 0.5 μm thickness, an operation wavelength 1.55 μm, (a) different Si ribs width (Wr = 0.13, 0.2 and 0.3 μm), with a slot width Ws = 0.2 μm, and (b) different slot widths (Ws = 0.1, 0.18, 0.26 μm) with a rib width Wr = 0.2 μm. Fig. 9. Confinement factor versus slot waveguide dimensions (slot and ribs widths) with constant Si ribs height = 0.22 μm, PI coating layer with 0.5 μm thickness, quasi-TE polarization, and 1.55 μm an operation wavelength. region. Thus, increasing the confinement factor is expected when the slot width is decreased with constant ribs width. Whereas the relation with the rib width is little bit complicated. With a certain width, ribs can sandwich a strong electric field and then give a maximum confinement factor. This is produced by obtaining a fundamental effective index is closed to the refrac- tive index of the slot region. Fig. 9 shows the variation of the confinement factor with both slot waveguide dimensions, slot and rib widths, for a fundamental quasi-TE mode and an oper- ation wavelength 1.55 μm. The manipulation of slot waveguide dimensions and change the profile of the electric field intensity across the waveguide will also lead to vary the value of the elec- tric field intensity at the side walls of ribs, as shown in Fig. 8, which affect directly on the scattering loss of slot waveguides, according to Eq. (2). Increasing this value will increase the effect of the surface roughness at sidewalls of ribs and then increasing
  • 5. SALIH et al.: LOSSES OF SLOT MODE DEVICES 3905 Fig. 10. Measured propagation losses (marks) of SOI slot waveguide struc- tures with different slot width Ws; 0.13, 0.2, and 0.25 μm and different ribs widths Wr ; 0.13 μm (blue quadrants) and 0.2 μm(red squares), compare with calculated propagation losses (curves) of simulated samples with different slot widths and ribs widths; 0.13 μm (green), 0.2 μm (violet), 0.3 μm (blue), at a quasi-TE polarization and 1.55 μm an operating wavelength. Fig. 11. Effective refractive index versus the slot and ribs widths of an SOI slot waveguide structure without coating layer application. the propagation loss. The transmission of several slot waveg- uides with different slot width, like 0.13, 0.2, and 0.25 μm, and different ribs widths, like 0.13 and 0.2 μm, are measured, de- embedded and compared with theoretical calculations as shown in Fig. 10. It’s clear that the scattering loss is decreased when the slot width is increased as a result of decreasing the electric field intensity at the sidewalls of ribs. Also high scattering loss is expected with Si ribs widths which confine high electric field intensity at the slot region. According to the confinement factor and the scattering loss of coated slot waveguide structures with different dimensions, an optimum structure can be given with a slot region width about 0.2 μm and Si ribs width about 0.2 μm too. With these dimensions, the SOI slot waveguide structure is suitable for using as a functional device as it can confined maximum light in the slot region even with significant scattering loss. Especially for functional applications, where it does not need for a long slot waveguide. B. Effect of the Refractive Index of the Slot Region Same as the above scenario, the performance of the SOI slot waveguide, without a coating layer application, is analyzed, especially almost samples over uncoated chips are failed in ex- perimental transmission test. As in case of coated structures, the relations of structure dimensions (slot and ribs widths) with the effective index, electric field intensity, and then the confinement factor are introduced as shown in Figs. 11, 12, and 13. By com- paring both Figs. 13 and 15, a very low confinement factor can Fig. 12. Electric field intensity distribution of the fundamental quasi-TE mode across an uncoated SOI slot waveguide with Si rib height 0.22 μm, an operation wavelength 1.55μm, (a) different Si ribs width (Wr = 0.13, 0.2, and 0.3 μm), with a slot width Ws = 0.2 μm and (b) different slot widths (Ws = 0.1, 0.18, and 0.26 μm) with a rib width Wr = 0.2 μm. Fig. 13. Confinement factor versus slot waveguide dimensions (slot and ribs widths) with constant Si ribs height = 0.22 μm, without any coating layer application, quasi-TE polarization, and 1.55 μm an operation wavelength. be recorded (≈0.06) with thin ribs (Wr below 0.2 μm) where the resultant effective index is closed to unity so almost light will be radiated out of the waveguide, as shown in Fig. 11. As a result of the large contrast index between air and silicon, the confinement factor shows a significant enhancement (0.35 to 0.41) when the ribs width get more wide (from 0.2 to 0.3 μm) where the effective index value shifts from unity. Definitely, when the ribs width is more a low confinement factor is expected because light will be kept inside ribs. According to that, to get maximum confinement factor of an uncoated SOI structure a rib width about 0.25 to 0.3 μm is required with a slot width about 0.2 μm in order to rein the ex- pected high scattering loss. In fact, the scattering loss is very high in uncoated structure, comparing with coated ones, even with wide slot widths. This is because of the high electric field intensity at the sidewalls of ribs as well as to the large con- trast index between air and silicon. Fig. 14 shows the simulated scattering loss for uncoated SOI slot waveguide structures with different slot widths and ribs widths; 0.13, 0.2, and 0.2 μm. This indicates a reason of the faulty of almost uncoated sample in the transmission measuring test. A comparison can be done between two SOI slot waveguide structures, with and without a coating layer application, where they have approximately a same good confinement factor. These structures are; coated device with ribs and slot widths 0.2 μm and, and uncoated one with a rib width 0.2 μm and a slot width 0.2 μm. The confinement factor of both devices is about (0.34). Although they have approximately equal confinement factors,
  • 6. 3906 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 34, NO. 16, AUGUST 15, 2016 Fig. 14. Calculated scattering loss of uncoated SOI slot waveguide structures with different slot widths, ribs height 0.22 μm, and ribs widths; 0.13 μm (blue), 0.2 μm (red), and 0.3 μm (green), at quasi-TE polarization and an operation wavelength 1.55 μm. Fig. 15. Electric field intensity distribution of the fundamental quasi-TE mode across (a) a coated SOI slot waveguide by PI with a Si ribs width Wr = 0.2 μm, a slot width Ws = 0.2 μm, (b) an uncoated SOI slot waveguide with a Si ribs width Wr = 0.3 μm, a slot width Ws = 0.2 μm. Both of them with Si rib height 0.22 μm, an operation wavelength 1.55 μm. the electric field intensity at sidewalls of ribs in case of uncoated structure is more higher than its counterpart in the coated struc- ture, as shown in Fig. 15. This may describe the effect of the coating layer that enhances the performance by reducing the propagation loss in SOI slot waveguide structures. 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Lipson, “Experimental demon- stration of silicon slot waveguide with low transmission loss at 1064 nm,” Opt. Commun., vol. 329, pp. 168–172, Oct. 2014. Maithem Salih received the B.Sc. and M.Sc. degrees in laser and optoelec- tronics engineering from Al-Nahrain University, Baghdad, Iraq, in 2005 and 2009, respectively, and the Ph.D. degree in optoelectronics engineering from the University of Baghdad in 2015. He is a Faculty with Electronics and Com- munication Engineering, University of Kufa, Iraq, and a Visiting Scholar with Guided Wave Optics Lab, University of Colorado Boulder. His research inter- ests include silicon photonics material and devices, SOH waveguides, nonlinear optical devices. Keyon Janani received the B.S. degree in electrical engineering from Louisiana State University in 2010, and the M.S. degree in electrical engineering from the University of Colorado Boulder in 2013. He is currently with the Guided Wave Optics Laboratory, University of Colorado Boulder working on the Ph.D. in the area of optics and biomedical application. His research interests include silicon photonics material and devices, polymer thin-film waveguides, nonlinear optical devices, and biosensing. Xi Chen received the B.S. degree in microelectronics from Peking University, Beijing, China, the M.S.E.E. degree from the University of Colorado Boulder, and the Ph.D. degree in the area of nano-photonics. He is currently working as a Postdoctoral Researcher. His research interests include silicon photonics ma- terial and devices, polymer thinfilm waveguides, and nonlinear optical devices. Eric Jacobson received the B.S. degree in engineering physics with minors in electrical engineering and mathematics from the University of Colorado, Boulder, in 2014. During the summer of 2013, he received a NSF funded UROP grant to continue research within the Guided Wave Optics Laboratory. His research interests include semiconductor materials, electro-optics, silicon photonic and SOH devices, and nonlinear optics. Sarita Gautam received the B.S. degree in electrical engineering from the University of Colorado Boulder in 2013. She is currently working as a Profes- sional Research Assistant at Guided Wave Optics Laboratory. Her research inter- ests include semiconductor devices, silicon photonics devices, and optical data communication. Alan Mickelson received the Bachelors of Science degree in electrical engi- neering from the University of Texas El Paso in 1973, and the Master of Science degree in electrical engineering, and the Doctorate degree in electrical engineer- ing with a subject minor in physics from the California Institute of Technology in 1974 and 1978, respectively.