Keypad scanner
Presented By:
Srishti Kakade– BETB130
Yamini Mehattar– BETB131
Arjun Mandage– BETB133
Content
• Introduction
• Block Diagram
• Truth Table
• Verilog Code
• Output
• Applications
Keypad scanner
• We design a scanner for a keypad with three columns and
four rows.
• The keypad is wired in matrix form with a switch at the
intersection of each row and column. Pressing a key
establishes a connection between a row and column.
• The purpose of the scanner is to determine which key has
been pressed and to output a binary number N =
N3N2N1N0, which corresponds to the key number.
• For example - pressing key 5 must output 0101, pressing
the * key must output1010, and pressing the # key must
output 1011. When a valid key has been detected,the
scanner should output a signal V for one clock time.
Block Diagram
Truth Table for decoder
Verilog Code
• module scanner (R, CLK,C,N, V);
• input [3:0] R;
• input CLK;
• inout [2:0] C;
• output [3:0]N;
• reg C0_tmp, C1_tmp, C2_tmp;
• assign C[0] = C0_tmp;
• assign C[1] = C1_tmp;
• assign C[2] = C2_tmp;
• assign K = R[0] | R[1] | R[2] | R[3] ;
• assign N[3] = (R[2] & ~C[0]) | (R[3] & ~C[1]) ;
• assign N[2] = R[1] | (R[2] & C[0]) ;
• assign N[1] = (R[0] & ~C[0]) | (~R[2] & C[2]) | (~R[1] & ~R[0] & C[0]) ;
• assign N[0] = (R[1] & C[1]) | (~R[1] & C[2]) | (~R[3] & ~R[1] & ~C[1]) ;
• endmodule
OUTPUT
Hardware Output
Application
Mobile phones
Calculators
ATM machine
Telephone
Thank You.!

Keypad scanner using Verilog code in VLSI Systems

  • 1.
    Keypad scanner Presented By: SrishtiKakade– BETB130 Yamini Mehattar– BETB131 Arjun Mandage– BETB133
  • 2.
    Content • Introduction • BlockDiagram • Truth Table • Verilog Code • Output • Applications
  • 3.
    Keypad scanner • Wedesign a scanner for a keypad with three columns and four rows. • The keypad is wired in matrix form with a switch at the intersection of each row and column. Pressing a key establishes a connection between a row and column. • The purpose of the scanner is to determine which key has been pressed and to output a binary number N = N3N2N1N0, which corresponds to the key number. • For example - pressing key 5 must output 0101, pressing the * key must output1010, and pressing the # key must output 1011. When a valid key has been detected,the scanner should output a signal V for one clock time.
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    Verilog Code • modulescanner (R, CLK,C,N, V); • input [3:0] R; • input CLK; • inout [2:0] C; • output [3:0]N; • reg C0_tmp, C1_tmp, C2_tmp; • assign C[0] = C0_tmp; • assign C[1] = C1_tmp; • assign C[2] = C2_tmp; • assign K = R[0] | R[1] | R[2] | R[3] ; • assign N[3] = (R[2] & ~C[0]) | (R[3] & ~C[1]) ; • assign N[2] = R[1] | (R[2] & C[0]) ; • assign N[1] = (R[0] & ~C[0]) | (~R[2] & C[2]) | (~R[1] & ~R[0] & C[0]) ; • assign N[0] = (R[1] & C[1]) | (~R[1] & C[2]) | (~R[3] & ~R[1] & ~C[1]) ; • endmodule
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