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Non-von-Neumann Heap for
Better Streaming, Capturing
and Storing of Raw 8K Video
Data
Mohamed Shaafiee 1 and Rajasvaran Logeswaran 2
Asia Pacific University of Technology and Innovation
Technology Park Malaysia, Bukit Jalil, 57000 Kuala Lumpur, Malaysia
1 mail@shaafiee.com, 2 loges@ieee.org
85 GB/s on most powerful
Xeon processors
1.9 GB/s
Single Xeon processor: up to 3TB [1]
6-way system to store 8K football match in RAM
Increases synchronization latencies
Inefficient power and CPU utilization
At least 9 SSDs on independent channels for 8K video bandwidth
Increases synchronization latencies
Can jam enough SSDs into a machine to store 90 min of 8K football
[2]
1.9 GB/s
• SSD cannot be mapped to memory bus
• Video sources are written into memory first
• Memory-mapped files reside in memory
• Contents synchronized with the non-volatile file
• Real-time persistence is impossible
• Variables in drivers are stored in RAM
• Intermediate write latency to RAM increases with
the increase in data
Resolution
Chroma
subsampling
for YUV[3]
Bandwidth
(GB/s)
90min raw
video
payload (TB)
4K UHD (3840x2160) 4:2:2 0.50 2.70
4K UHD (3840x2160) None 0.75 4.10
8K (8192x4320) 4:2:2 2.13 11.48
8K (8192x4320) None 3.18 17.15
16K (15260x8640) 4:2:2 7.93 42.80
16K (15260x8640) None 11.88 64.20
Table 1. Video payload at various resolutions (10 bits per YUV channel and
24 frames per second)
• Replace RAM with a non-volatile memory
• Implement non-von-Neumann architecture
• No intermediate layer in data acquisition or
processing
• Write directly to non-volatile memory
•Intel Optane memory[4]
• Can be mapped to the
memory bus
• Intel to introduce
specific chipsets and
processors
An Optane memory module
(www.intel.com)
ASRock motherboard with Optane support
(www.asrock.com)
• Create pointer to address in
the Optane range instead of
RAM
• Read from video source
directly into this pointer
• Thus bypass RAM
• Create multiple pointers to
addresses in multiple
devices to increase
bandwidth
• NVNHeap = non-von-Neumann heap
•Optane device hosts the heap
• Video data is written directly into it
• Optane device is non-volatile
• Thus, no explicit persistence is required
• RAM does not partake in the write cycle
• von Neumann architectures require memory
• Currently possible as a kernel module
• For contiguous access to physical memory
• Direct mapping using ioremap
• Create a pointer to this address range
void *addr;
addr = optaneAddress;
• Assign data directly to this pointer
*addr = hardware.getData();
Resolution
Chroma
subsampling
Raw data bandwidth
in GB/s
No. of Optane
devices needed
4K 4:2:2 0.50 1
4K None 0.75 1
8K 4:2:2 2.13 2
8K None 3.18 2
16K 4:2:2 7.93 4
16K None 11.80 6
Table 2. No of Optane devices needed to yield the required bandwidth
(10 bits per YUV channel and 24 frames per second)
• NVNHeap has been successfully simulated in SSD
• Only simulated – stacks are still maintained in RAM
• Awaiting the arrival of Optane to market
• A non-von-Neumann VM is currently being tested
• Native user-space NVNHeaps
[1] Intel, “Intel® Xeon® Processor E7-8893 v4 (60M Cache, 3.20 GHz)
Specifications,” Intel® ARK (Product Specs), 06-Jun-2016. [Online]. Available:
http://ark.intel.com/products/93791/Intel-Xeon-Processor-E7-8893-v4-60M-
Cache-3_20-GHz. [Accessed: 25-Jun-2016].
[2] J. Edwards and S. O’Keefe, “Eager recirculating memory to alleviate the von
Neumann Bottleneck,” in 2016 IEEE Symposium Series on Computational
Intelligence (SSCI), 2016, pp. 1–5.
[3] C. H. Lin, K. L. Chung, and C. W. Yu, “Novel Chroma Subsampling Strategy
Based on Mathematical Optimization for Compressing Mosaic Videos With
Arbitrary RGB Color Filter Arrays in H.264/AVC and HEVC,” IEEE Trans. Circuits
Syst. Video Technol., vol. 26, no. 9, pp. 1722–1733, Sep. 2016.
[4] A. Kingsley-Hughes, “Can Optane SSD DC P4800X allow Intel to keep its lead
in the server storage market?,” ZDNet. [Online]. Available:
http://www.zdnet.com/article/can-optane-ssd-dc-p4800x-allow-intel-to-
keep-its-lead-in-the-server-storage-market/. [Accessed: 17-Apr-2017].
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ICSIPA 2017 presentation

  • 1. Non-von-Neumann Heap for Better Streaming, Capturing and Storing of Raw 8K Video Data Mohamed Shaafiee 1 and Rajasvaran Logeswaran 2 Asia Pacific University of Technology and Innovation Technology Park Malaysia, Bukit Jalil, 57000 Kuala Lumpur, Malaysia 1 mail@shaafiee.com, 2 loges@ieee.org
  • 2.
  • 3. 85 GB/s on most powerful Xeon processors 1.9 GB/s Single Xeon processor: up to 3TB [1] 6-way system to store 8K football match in RAM Increases synchronization latencies Inefficient power and CPU utilization At least 9 SSDs on independent channels for 8K video bandwidth Increases synchronization latencies Can jam enough SSDs into a machine to store 90 min of 8K football
  • 5. • SSD cannot be mapped to memory bus • Video sources are written into memory first • Memory-mapped files reside in memory • Contents synchronized with the non-volatile file • Real-time persistence is impossible • Variables in drivers are stored in RAM • Intermediate write latency to RAM increases with the increase in data
  • 6. Resolution Chroma subsampling for YUV[3] Bandwidth (GB/s) 90min raw video payload (TB) 4K UHD (3840x2160) 4:2:2 0.50 2.70 4K UHD (3840x2160) None 0.75 4.10 8K (8192x4320) 4:2:2 2.13 11.48 8K (8192x4320) None 3.18 17.15 16K (15260x8640) 4:2:2 7.93 42.80 16K (15260x8640) None 11.88 64.20 Table 1. Video payload at various resolutions (10 bits per YUV channel and 24 frames per second)
  • 7. • Replace RAM with a non-volatile memory • Implement non-von-Neumann architecture • No intermediate layer in data acquisition or processing • Write directly to non-volatile memory
  • 8. •Intel Optane memory[4] • Can be mapped to the memory bus • Intel to introduce specific chipsets and processors An Optane memory module (www.intel.com) ASRock motherboard with Optane support (www.asrock.com)
  • 9. • Create pointer to address in the Optane range instead of RAM • Read from video source directly into this pointer • Thus bypass RAM • Create multiple pointers to addresses in multiple devices to increase bandwidth
  • 10. • NVNHeap = non-von-Neumann heap •Optane device hosts the heap • Video data is written directly into it • Optane device is non-volatile • Thus, no explicit persistence is required • RAM does not partake in the write cycle • von Neumann architectures require memory
  • 11. • Currently possible as a kernel module • For contiguous access to physical memory • Direct mapping using ioremap • Create a pointer to this address range void *addr; addr = optaneAddress; • Assign data directly to this pointer *addr = hardware.getData();
  • 12. Resolution Chroma subsampling Raw data bandwidth in GB/s No. of Optane devices needed 4K 4:2:2 0.50 1 4K None 0.75 1 8K 4:2:2 2.13 2 8K None 3.18 2 16K 4:2:2 7.93 4 16K None 11.80 6 Table 2. No of Optane devices needed to yield the required bandwidth (10 bits per YUV channel and 24 frames per second)
  • 13. • NVNHeap has been successfully simulated in SSD • Only simulated – stacks are still maintained in RAM • Awaiting the arrival of Optane to market • A non-von-Neumann VM is currently being tested • Native user-space NVNHeaps
  • 14. [1] Intel, “Intel® Xeon® Processor E7-8893 v4 (60M Cache, 3.20 GHz) Specifications,” Intel® ARK (Product Specs), 06-Jun-2016. [Online]. Available: http://ark.intel.com/products/93791/Intel-Xeon-Processor-E7-8893-v4-60M- Cache-3_20-GHz. [Accessed: 25-Jun-2016]. [2] J. Edwards and S. O’Keefe, “Eager recirculating memory to alleviate the von Neumann Bottleneck,” in 2016 IEEE Symposium Series on Computational Intelligence (SSCI), 2016, pp. 1–5. [3] C. H. Lin, K. L. Chung, and C. W. Yu, “Novel Chroma Subsampling Strategy Based on Mathematical Optimization for Compressing Mosaic Videos With Arbitrary RGB Color Filter Arrays in H.264/AVC and HEVC,” IEEE Trans. Circuits Syst. Video Technol., vol. 26, no. 9, pp. 1722–1733, Sep. 2016. [4] A. Kingsley-Hughes, “Can Optane SSD DC P4800X allow Intel to keep its lead in the server storage market?,” ZDNet. [Online]. Available: http://www.zdnet.com/article/can-optane-ssd-dc-p4800x-allow-intel-to- keep-its-lead-in-the-server-storage-market/. [Accessed: 17-Apr-2017].