The ICL7660 and ICL7660A are monolithic CMOS voltage converter circuits that can convert a positive input voltage into complementary negative output voltages, with input ranges of 1.5V to 10V for the ICL7660 and 1.5V to 12V for the ICL7660A. They require only two external capacitors and have high voltage conversion efficiency between 97-99.9%. The devices contain an internal regulator, oscillator, switches, and logic to ensure latchup-free operation over a wide temperature range.
Catalog bộ nguồn omron S8 FS-C Beeteco.com
Beeteco.com là trang mua sắm trực tuyến thiết bị điện - Tự
động hóa uy tín tại Việt Nam.
Chuyên cung cấp các thiết bị: Đèn báo nút nhấn, Relay, Timer, Contactor, MCCB ELCB, Biến tần, Van, Thiết bị cảm biến, phụ kiện tủ điện, .... Từ các thương hiệu hàng đầu trên thế giới.
www.beeteco.com @ Công ty TNHH TM KT ASTER
Địa chỉ : Số 7/31 KDC Thương Mại Sóng Thần, KP. Nhị Đồng 1, P. Dĩ An, Tx. Dĩ An, Tỉnh Bình Dương
FB: www.facebook.com/beeteco
Email: contact@beeteco.com
Tel: 0650 3617 012
Hotline: 0909.41.61.43
ABB Contactors - 4 Pole Contactors ABB AF09 AF09Z (AC DC) Contactors
ABB Extended Product Type:
ABB AF09-40-00-11
ABB Product ID:
1SBL137201R1100
EAN: 3471523115019
ABB Catalogue Description:
ABB 4 Pole Contactors : AF09-40-00-11 24-60V50/60HZ 20-60VDC Contactor
ABB AF09 4-pole contactors are used for controlling power circuits up to 690 V AC and 440 V DC. ABB AF09 contactors are mainly used for controlling non-inductive or slightly inductive loads (i.e. resistance furnaces...). ABB AF09 contactors include an electronic coil interface accepting a wide control voltage Uc min. ... Uc max. Only four coils cover control voltages between 24...500 V 50/60 Hz or 20...500 V DC. ABB AF contactors can manage large control voltage variations. One coil can be used for different control voltages used worldwide without any coil change. ABB AF contactors have built-in surge protection and do not require additional surge suppressors. The ABB AF... series 4-pole contactors are of the block type design. Main poles and auxiliary contact blocks: 4 N.O. main poles, front and side-mounted add-on auxiliary contact blocks (mechanically-linked auxiliary contacts compliant with Annex L of IEC 60947-5-1. N.C. mirror contacts compliant with Annex F of IEC 60947-4-1) - Control circuit: AC or DC operated - Accessories: a wide range of accessories is available. Note: - AF..-..-..-11 not suitable for a direct control by PLC-output. - ABB AF..-..-..-11 type available in some countries: please consult Thorne & Derrick t 00 44 191 4901547
ISL97684 Led Driver Evaluation Board User ManualGeorgage Zim
The ISL97684 Evaluation Board provides a complete testing platform for ISL97684, a four channel LED driver. including pinout, pin function descriptions, electrical specifications and applications related information. http://www.intersil.com/en/products/power-management/led-drivers.html
Catalog bộ nguồn omron S8 FS-C Beeteco.com
Beeteco.com là trang mua sắm trực tuyến thiết bị điện - Tự
động hóa uy tín tại Việt Nam.
Chuyên cung cấp các thiết bị: Đèn báo nút nhấn, Relay, Timer, Contactor, MCCB ELCB, Biến tần, Van, Thiết bị cảm biến, phụ kiện tủ điện, .... Từ các thương hiệu hàng đầu trên thế giới.
www.beeteco.com @ Công ty TNHH TM KT ASTER
Địa chỉ : Số 7/31 KDC Thương Mại Sóng Thần, KP. Nhị Đồng 1, P. Dĩ An, Tx. Dĩ An, Tỉnh Bình Dương
FB: www.facebook.com/beeteco
Email: contact@beeteco.com
Tel: 0650 3617 012
Hotline: 0909.41.61.43
ABB Contactors - 4 Pole Contactors ABB AF09 AF09Z (AC DC) Contactors
ABB Extended Product Type:
ABB AF09-40-00-11
ABB Product ID:
1SBL137201R1100
EAN: 3471523115019
ABB Catalogue Description:
ABB 4 Pole Contactors : AF09-40-00-11 24-60V50/60HZ 20-60VDC Contactor
ABB AF09 4-pole contactors are used for controlling power circuits up to 690 V AC and 440 V DC. ABB AF09 contactors are mainly used for controlling non-inductive or slightly inductive loads (i.e. resistance furnaces...). ABB AF09 contactors include an electronic coil interface accepting a wide control voltage Uc min. ... Uc max. Only four coils cover control voltages between 24...500 V 50/60 Hz or 20...500 V DC. ABB AF contactors can manage large control voltage variations. One coil can be used for different control voltages used worldwide without any coil change. ABB AF contactors have built-in surge protection and do not require additional surge suppressors. The ABB AF... series 4-pole contactors are of the block type design. Main poles and auxiliary contact blocks: 4 N.O. main poles, front and side-mounted add-on auxiliary contact blocks (mechanically-linked auxiliary contacts compliant with Annex L of IEC 60947-5-1. N.C. mirror contacts compliant with Annex F of IEC 60947-4-1) - Control circuit: AC or DC operated - Accessories: a wide range of accessories is available. Note: - AF..-..-..-11 not suitable for a direct control by PLC-output. - ABB AF..-..-..-11 type available in some countries: please consult Thorne & Derrick t 00 44 191 4901547
ISL97684 Led Driver Evaluation Board User ManualGeorgage Zim
The ISL97684 Evaluation Board provides a complete testing platform for ISL97684, a four channel LED driver. including pinout, pin function descriptions, electrical specifications and applications related information. http://www.intersil.com/en/products/power-management/led-drivers.html
Shireen Afkari- Professional Marketing PortfolioShireen Afkari
I work hard and with passion. I bring this quality to my work in design and marketing, and I help organizations identify how they want to be viewed by their audiences. I execute that by creating digital content such as infographics, logos and social media components. I also market their missions with visual and written storytelling.
How Hexoskin smart shirts can help you in your ResearchHexoskin
This presentation will show you how Hexoskin's biometric shirt works and most of all why you need it for your research project!
Hexoskin measures:
- Heart Rate + ECG
- Heart rate variability (HRV)
- VO2max
- Heart Rate Max
- Heart Rate Recovery
- Resting Heart Rate
- Breathing Rate
- Minute Ventilation (Breathing Volume)
- Activity (Steps, cadence)
- Calorie Expenditure
- Sleep Efficiency
Hexoskin smart shirts are used by athletes, trainers, and health researchers worldwide to track body metrics in real life settings. Hexoskin users include NASA, MIT, Columbia and professionals from Singapore to Moscow, from Dubai to Switzerland. Hexoskin shirts are designed and made in Canada.
This presentation will show you how Hexoskin's biometric shirt works and most of all how it can take you to the next level by improving your training and recovery.
Hexoskin measures:
- Heart Rate + ECG
- Heart rate variability (HRV)
- VO2max
- Heart Rate Max
- Heart Rate Recovery
- Resting Heart Rate
- Breathing Rate
- Minute Ventilation (Breathing Volume)
- Activity (Steps, cadence)
- Calorie Expenditure
- Sleep Efficiency
Hexoskin smart shirts are used by athletes, trainers, and health researchers worldwide to track body metrics in real life settings. Hexoskin users include NASA, MIT, Columbia and professionals from Singapore to Moscow, from Dubai to Switzerland. Hexoskin shirts are designed and made in Canada.
Вы узнаете, что такое открытые образовательные ресурсы и что такое лицензии Creative Commons, историю появления открытых образовательных ресурсов, преимущества их использования в учебной деятельности.
Webinar: Desmistificando projetos de fontes chaveadasEmbarcados
Possibilitar engenheiros com pouca familiaridade com eletronica de potencia a desenvolver fontes chaveadas. São apresentadas também soluções para o projeto de fontes chaveadas da ST.
Video do Webinar: https://www.embarcados.com.br/webinars/webinar-desmistificando-projetos-de-fontes-chaveadas/
Original Driver Mosfet IRS21814STRPBF IRS21814S 21814 SOP-14 New Internationa...AUTHELECTRONIC
Original Driver Mosfet IRS21814STRPBF IRS21814S 21814 SOP-14 New International Rectifier
https://authelectronic.com/original-driver-mosfet-irs21814strpbf-irs21814s-21814-sop-14-new-international-rectifier
Kubernetes & AI - Beauty and the Beast !?! @KCD Istanbul 2024Tobias Schneck
As AI technology is pushing into IT I was wondering myself, as an “infrastructure container kubernetes guy”, how get this fancy AI technology get managed from an infrastructure operational view? Is it possible to apply our lovely cloud native principals as well? What benefit’s both technologies could bring to each other?
Let me take this questions and provide you a short journey through existing deployment models and use cases for AI software. On practical examples, we discuss what cloud/on-premise strategy we may need for applying it to our own infrastructure to get it to work from an enterprise perspective. I want to give an overview about infrastructure requirements and technologies, what could be beneficial or limiting your AI use cases in an enterprise environment. An interactive Demo will give you some insides, what approaches I got already working for real.
UiPath Test Automation using UiPath Test Suite series, part 4DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 4. In this session, we will cover Test Manager overview along with SAP heatmap.
The UiPath Test Manager overview with SAP heatmap webinar offers a concise yet comprehensive exploration of the role of a Test Manager within SAP environments, coupled with the utilization of heatmaps for effective testing strategies.
Participants will gain insights into the responsibilities, challenges, and best practices associated with test management in SAP projects. Additionally, the webinar delves into the significance of heatmaps as a visual aid for identifying testing priorities, areas of risk, and resource allocation within SAP landscapes. Through this session, attendees can expect to enhance their understanding of test management principles while learning practical approaches to optimize testing processes in SAP environments using heatmap visualization techniques
What will you get from this session?
1. Insights into SAP testing best practices
2. Heatmap utilization for testing
3. Optimization of testing processes
4. Demo
Topics covered:
Execution from the test manager
Orchestrator execution result
Defect reporting
SAP heatmap example with demo
Speaker:
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
Neuro-symbolic is not enough, we need neuro-*semantic*Frank van Harmelen
Neuro-symbolic (NeSy) AI is on the rise. However, simply machine learning on just any symbolic structure is not sufficient to really harvest the gains of NeSy. These will only be gained when the symbolic structures have an actual semantics. I give an operational definition of semantics as “predictable inference”.
All of this illustrated with link prediction over knowledge graphs, but the argument is general.
GraphRAG is All You need? LLM & Knowledge GraphGuy Korland
Guy Korland, CEO and Co-founder of FalkorDB, will review two articles on the integration of language models with knowledge graphs.
1. Unifying Large Language Models and Knowledge Graphs: A Roadmap.
https://arxiv.org/abs/2306.08302
2. Microsoft Research's GraphRAG paper and a review paper on various uses of knowledge graphs:
https://www.microsoft.com/en-us/research/blog/graphrag-unlocking-llm-discovery-on-narrative-private-data/
Software Delivery At the Speed of AI: Inflectra Invests In AI-Powered QualityInflectra
In this insightful webinar, Inflectra explores how artificial intelligence (AI) is transforming software development and testing. Discover how AI-powered tools are revolutionizing every stage of the software development lifecycle (SDLC), from design and prototyping to testing, deployment, and monitoring.
Learn about:
• The Future of Testing: How AI is shifting testing towards verification, analysis, and higher-level skills, while reducing repetitive tasks.
• Test Automation: How AI-powered test case generation, optimization, and self-healing tests are making testing more efficient and effective.
• Visual Testing: Explore the emerging capabilities of AI in visual testing and how it's set to revolutionize UI verification.
• Inflectra's AI Solutions: See demonstrations of Inflectra's cutting-edge AI tools like the ChatGPT plugin and Azure Open AI platform, designed to streamline your testing process.
Whether you're a developer, tester, or QA professional, this webinar will give you valuable insights into how AI is shaping the future of software delivery.
Accelerate your Kubernetes clusters with Varnish CachingThijs Feryn
A presentation about the usage and availability of Varnish on Kubernetes. This talk explores the capabilities of Varnish caching and shows how to use the Varnish Helm chart to deploy it to Kubernetes.
This presentation was delivered at K8SUG Singapore. See https://feryn.eu/presentations/accelerate-your-kubernetes-clusters-with-varnish-caching-k8sug-singapore-28-2024 for more details.
DevOps and Testing slides at DASA ConnectKari Kakkonen
My and Rik Marselis slides at 30.5.2024 DASA Connect conference. We discuss about what is testing, then what is agile testing and finally what is Testing in DevOps. Finally we had lovely workshop with the participants trying to find out different ways to think about quality and testing in different parts of the DevOps infinity loop.
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
Let's dive deeper into the world of ODC! Ricardo Alves (OutSystems) will join us to tell all about the new Data Fabric. After that, Sezen de Bruijn (OutSystems) will get into the details on how to best design a sturdy architecture within ODC.
State of ICS and IoT Cyber Threat Landscape Report 2024 previewPrayukth K V
The IoT and OT threat landscape report has been prepared by the Threat Research Team at Sectrio using data from Sectrio, cyber threat intelligence farming facilities spread across over 85 cities around the world. In addition, Sectrio also runs AI-based advanced threat and payload engagement facilities that serve as sinks to attract and engage sophisticated threat actors, and newer malware including new variants and latent threats that are at an earlier stage of development.
The latest edition of the OT/ICS and IoT security Threat Landscape Report 2024 also covers:
State of global ICS asset and network exposure
Sectoral targets and attacks as well as the cost of ransom
Global APT activity, AI usage, actor and tactic profiles, and implications
Rise in volumes of AI-powered cyberattacks
Major cyber events in 2024
Malware and malicious payload trends
Cyberattack types and targets
Vulnerability exploit attempts on CVEs
Attacks on counties – USA
Expansion of bot farms – how, where, and why
In-depth analysis of the cyber threat landscape across North America, South America, Europe, APAC, and the Middle East
Why are attacks on smart factories rising?
Cyber risk predictions
Axis of attacks – Europe
Systemic attacks in the Middle East
Download the full report from here:
https://sectrio.com/resources/ot-threat-landscape-reports/sectrio-releases-ot-ics-and-iot-security-threat-landscape-report-2024/
"Impact of front-end architecture on development cost", Viktor TurskyiFwdays
I have heard many times that architecture is not important for the front-end. Also, many times I have seen how developers implement features on the front-end just following the standard rules for a framework and think that this is enough to successfully launch the project, and then the project fails. How to prevent this and what approach to choose? I have launched dozens of complex projects and during the talk we will analyze which approaches have worked for me and which have not.
JMeter webinar - integration with InfluxDB and GrafanaRTTS
Watch this recorded webinar about real-time monitoring of application performance. See how to integrate Apache JMeter, the open-source leader in performance testing, with InfluxDB, the open-source time-series database, and Grafana, the open-source analytics and visualization application.
In this webinar, we will review the benefits of leveraging InfluxDB and Grafana when executing load tests and demonstrate how these tools are used to visualize performance metrics.
Length: 30 minutes
Session Overview
-------------------------------------------
During this webinar, we will cover the following topics while demonstrating the integrations of JMeter, InfluxDB and Grafana:
- What out-of-the-box solutions are available for real-time monitoring JMeter tests?
- What are the benefits of integrating InfluxDB and Grafana into the load testing stack?
- Which features are provided by Grafana?
- Demonstration of InfluxDB and Grafana using a practice web application
To view the webinar recording, go to:
https://www.rttsweb.com/jmeter-integration-webinar
Transcript: Selling digital books in 2024: Insights from industry leaders - T...BookNet Canada
The publishing industry has been selling digital audiobooks and ebooks for over a decade and has found its groove. What’s changed? What has stayed the same? Where do we go from here? Join a group of leading sales peers from across the industry for a conversation about the lessons learned since the popularization of digital books, best practices, digital book supply chain management, and more.
Link to video recording: https://bnctechforum.ca/sessions/selling-digital-books-in-2024-insights-from-industry-leaders/
Presented by BookNet Canada on May 28, 2024, with support from the Department of Canadian Heritage.
PHP Frameworks: I want to break free (IPC Berlin 2024)Ralf Eggert
In this presentation, we examine the challenges and limitations of relying too heavily on PHP frameworks in web development. We discuss the history of PHP and its frameworks to understand how this dependence has evolved. The focus will be on providing concrete tips and strategies to reduce reliance on these frameworks, based on real-world examples and practical considerations. The goal is to equip developers with the skills and knowledge to create more flexible and future-proof web applications. We'll explore the importance of maintaining autonomy in a rapidly changing tech landscape and how to make informed decisions in PHP development.
This talk is aimed at encouraging a more independent approach to using PHP frameworks, moving towards a more flexible and future-proof approach to PHP development.
Epistemic Interaction - tuning interfaces to provide information for AI supportAlan Dix
Paper presented at SYNERGY workshop at AVI 2024, Genoa, Italy. 3rd June 2024
https://alandix.com/academic/papers/synergy2024-epistemic/
As machine learning integrates deeper into human-computer interactions, the concept of epistemic interaction emerges, aiming to refine these interactions to enhance system adaptability. This approach encourages minor, intentional adjustments in user behaviour to enrich the data available for system learning. This paper introduces epistemic interaction within the context of human-system communication, illustrating how deliberate interaction design can improve system understanding and adaptation. Through concrete examples, we demonstrate the potential of epistemic interaction to significantly advance human-computer interaction by leveraging intuitive human communication strategies to inform system design and functionality, offering a novel pathway for enriching user-system engagements.
Search and Society: Reimagining Information Access for Radical FuturesBhaskar Mitra
The field of Information retrieval (IR) is currently undergoing a transformative shift, at least partly due to the emerging applications of generative AI to information access. In this talk, we will deliberate on the sociotechnical implications of generative AI for information access. We will argue that there is both a critical necessity and an exciting opportunity for the IR community to re-center our research agendas on societal needs while dismantling the artificial separation between the work on fairness, accountability, transparency, and ethics in IR and the rest of IR research. Instead of adopting a reactionary strategy of trying to mitigate potential social harms from emerging technologies, the community should aim to proactively set the research agenda for the kinds of systems we should build inspired by diverse explicitly stated sociotechnical imaginaries. The sociotechnical imaginaries that underpin the design and development of information access technologies needs to be explicitly articulated, and we need to develop theories of change in context of these diverse perspectives. Our guiding future imaginaries must be informed by other academic fields, such as democratic theory and critical theory, and should be co-developed with social science scholars, legal scholars, civil rights and social justice activists, and artists, among others.
2. 2 FN3072.7
October 10, 2005
Ordering Information
PART NUMBER TEMP. RANGE (°C) PACKAGE PKG. DWG. #
ICL7660CBA* 7660CBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7660CBAZ* (See Note) 7660CBAZ 0 to 70 8 Ld SOIC (N) (Pb-free) M8.15
ICL7660CBAZA* (See Note) 7660CBAZ 0 to 70 8 Ld SOIC (N) (Pb-free) M8.15
ICL7660CPA 7660CPA 0 to 70 8 Ld PDIP E8.3
ICL7660CPAZ ( See Note) 7660CPAZ 0 to 70 8 Ld PDIP** (Pb-free) E8.3
ICL7660ACBA* 7660ACBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7660ACBAZA* (See Note) 7660ACBAZ 0 to 70 8 Ld SOIC (N) (Pb-free) M8.15
ICL7660ACPA 7660ACPA 0 to 70 8 Ld PDIP E8.3
ICL7660ACPAZ (See Note) 7660ACPAZ 0 to 70 8 Ld PDIP** (Pb-free) E8.3
ICL7660AIBA* 7660AIBA -40 to 85 8 Ld SOIC (N) M8.15
ICL7660AIBAZA* (See Note) 7660AIBAZ -40 to 85 8 Ld SOIC (N) (Pb-free) M8.15
*Add “-T” suffix to part number for tape and reel packaging.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
ICL7660, ICL7660A
3. 3 FN3072.7
October 10, 2005
C
Absolute Maximum Ratings Thermal Information
Supply Voltage
ICL7660 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +10.5V
ICL7660A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13.0V
LV and OSC Input Voltage . . . . . . -0.3V to (V+ +0.3V) for V+ < 5.5V
(Note 2) . . . . . . . . . . . . . . (V+ -5.5V) to (V+ +0.3V) for V+ > 5.5V
Current into LV (Note 2). . . . . . . . . . . . . . . . . . . 20µA for V+ > 3.5V
Output Short Duration (VSUPPLY ≤ 5.5V) . . . . . . . . . . . .Continuous
Operating Conditions
Temperature Range
ICL7660C, ICL7660AC. . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ICL7660AI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Thermal Resistance (Typical, Note 1) θJA (°C/W) θJC (°C/W)
PDIP Package* . . . . . . . . . . . . . . . . . . 110 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 160 N/A
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, TA = 25°C, COSC = 0, Test Circuit Figure 11
Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS
ICL7660 ICL7660A
UNITSMIN TYP MAX MIN TYP MAX
Supply Current I+ RL = ∞ - 170 500 - 80 165 µA
Supply Voltage Range - Lo VL+ MIN ≤ TA ≤ MAX, RL = 10kΩ, LV to GND 1.5 - 3.5 1.5 - 3.5 V
Supply Voltage Range - Hi VH+ MIN ≤ TA ≤ MAX, RL = 10kΩ, LV to Open 3.0 - 10.0 3 - 12 V
Output Source Resistance ROUT IOUT = 20mA, TA = 25°C - 55 100 - 60 100 Ω
IOUT = 20mA, 0°C ≤ TA ≤ 70°C - - 120 - - 120 Ω
IOUT = 20mA, -55°C ≤ TA ≤ 125°C - - 150 - - - Ω
IOUT = 20mA, -40°C ≤ TA ≤ 85°C - - - - - 120 Ω
V+ = 2V, IOUT = 3mA, LV to GND
0°C ≤ TA ≤ 70°C
- - 300 - - 300 Ω
V+ = 2V, IOUT = 3mA, LV to GND,
-55°C ≤ TA ≤ 125°C
- - 400 - - - Ω
Oscillator Frequency fOSC - 10 - - 10 - kHz
Power Efficiency PEF RL = 5kΩ 95 98 - 96 98 - %
Voltage Conversion Efficiency VOUT EF RL = ∞ 97 99.9 - 99 99.9 - %
Oscillator Impedance ZOSC V+ = 2V - 1.0 - - 1 - MΩ
V = 5V - 100 - - - - kΩ
ICL7660A, V+ = 3V, TA = 25°C, OSC = Free running, Test Circuit Figure 11, Unless Otherwise Specified
Supply Current (Note 3) I+ V+ = 3V, RL = ∞, 25°C - - - - 26 100 µA
0°C < TA < 70°C - - - - - 125 µA
-40°C < TA < 85°C - - - - - 125 µA
Output Source Resistance ROUT V+ = 3V, IOUT = 10mA - - - - 97 150 Ω
0°C < TA < 70°C - - - - - 200 Ω
-40°C < TA < 85°C - - - - - 200 Ω
Oscillator Frequency (Note 3) fOSC V+ = 3V (same as 5V conditions) - - - 5.0 8 - kHz
0°C < TA < 70°C - - - 3.0 - - kHz
-40°C < TA < 85°C - - - 3.0 - - kHz
ICL7660, ICL7660A
4. 4 FN3072.7
October 10, 2005
Functional Block Diagram
Voltage Conversion Efficiency VOUTEFF V+ = 3V, RL = ∞ - - - 99 - - %
TMIN < TA < TMAX - - - 99 - - %
Power Efficiency PEFF V+ = 3V, RL = 5kΩ - - - 96 - - %
TMIN < TA < TMAX - - - 95 - - %
NOTES:
2. Connecting any input terminal to voltages greater than V+ or less than GND may cause destructive latchup. It is recommended that no inputs
from sources operating from external supplies be applied prior to “power up” of the ICL7660, ICL7660A.
3. Derate linearly above 50°C by 5.5mW/°C.
4. In the test circuit, there is no external capacitor applied to pin 7. However, when the device is plugged into a test socket, there is usually a very
small but finite stray capacitance present, of the order of 5pF.
5. The Intersil ICL7660A can operate without an external diode over the full temperature and voltage range. This device will function in existing
designs which incorporate an external diode with no degradation in overall circuit performance.
Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, TA = 25°C, COSC = 0, Test Circuit Figure 11
Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS
ICL7660 ICL7660A
UNITSMIN TYP MAX MIN TYP MAX
RC
OSCILLATOR ÷2
VOLTAGE
LEVEL
TRANSLATOR
VOLTAGE
REGULATOR
LOGIC
NETWORK
OSC LV
V+
CAP+
CAP-
VOUT
Typical Performance Curves (Test Circuit of Figure 11)
FIGURE 1. OPERATING VOLTAGE AS A FUNCTION OF
TEMPERATURE
FIGURE 2. OUTPUT SOURCE RESISTANCE AS A FUNCTION
OF SUPPLY VOLTAGE
10
SUPPLY VOLTAGE RANGE
(NO DIODE REQUIRED)
8
6
4
2
0
-55 -25 0 25 50 100 125
TEMPERATURE (°C)
SUPPLYVOLTAGE(V)
10K
TA = 25°C
1000
100
10
0 1 2 3 4 5 6 7 8
SUPPLY VOLTAGE (V+)
OUTPUTSOURCERESISTANCE(Ω)
ICL7660, ICL7660A
5. 5 FN3072.7
October 10, 2005
FIGURE 3. OUTPUT SOURCE RESISTANCE AS A FUNCTION
OF TEMPERATURE
FIGURE 4. POWER CONVERSION EFFICIENCY AS A
FUNCTION OF OSC. FREQUENCY
FIGURE 5. FREQUENCY OF OSCILLATION AS A FUNCTION
OF EXTERNAL OSC. CAPACITANCE
FIGURE 6. UNLOADED OSCILLATOR FREQUENCY AS A
FUNCTION OF TEMPERATURE
FIGURE 7. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT
CURRENT
FIGURE 8. SUPPLY CURRENT AND POWER CONVERSION
EFFICIENCY AS A FUNCTION OF LOAD
CURRENT
Typical Performance Curves (Test Circuit of Figure 11) (Continued)
350
300
250
200
150
100
50
0
-55 -25 0 25 50 75 100 125
TEMPERATURE (°C)
OUTPUTSOURCERESISTANCE(Ω)
IOUT = 1mA
V+ = +2V
V+ = 5V
POWERCONVERSIONEFFICIENCY(%)
TA = 25°C
IOUT = 1mA
IOUT = 15mA
100
98
96
94
92
90
88
86
84
82
80
100 1K 10K
OSC. FREQUENCY fOSC (Hz)
V+ = +5V
OSCILLATORFREQUENCYfOSC(Hz)
10K
1K
100
10
V+ = 5V
TA = 25°C
1.0 10 100 1000 10K
COSC (pF)
20
18
16
14
12
10
8
6
-50 -25 0 25 50 75 100 125
OSCILLATORFREQUENCYfOSC(kHz)
TEMPERATURE (°C)
V+ = +5V
TA = 25°C
V+ = +5V
5
4
3
2
1
0
-1
-2
-3
-4
-5
OUTPUTVOLTAGE
LOAD CURRENT IL (mA)
SLOPE 55Ω
0 10 20 30 40 50 60 70 80
PEFF I+
TA = 25°C
V+ = +5V
SUPPLYCURRENTI+(mA)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
0 10 20 30 40 50 60
POWERCONVERSIONEFFICIENCY(%)
LOAD CURRENT IL (mA)
ICL7660, ICL7660A
6. 6 FN3072.7
October 10, 2005
Detailed Description
The ICL7660 and ICL7660A contain all the necessary
circuitry to complete a negative voltage converter, with the
exception of 2 external capacitors which may be inexpensive
10µF polarized electrolytic types. The mode of operation of
the device may be best understood by considering Figure
12, which shows an idealized negative voltage converter.
Capacitor C1 is charged to a voltage, V+, for the half cycle
when switches S1 and S3 are closed. (Note: Switches S2
and S4 are open during this half cycle.) During the second
half cycle of operation, switches S2 and S4 are closed, with
S1 and S3 open, thereby shifting capacitor C1 negatively by
V+ volts. Charge is then transferred from C1 to C2 such that
the voltage on C2 is exactly V+, assuming ideal switches and
no load on C2. The ICL7660 approaches this ideal situation
more closely than existing non-mechanical circuits.
In the ICL7660 and ICL7660A, the 4 switches of Figure 12
are MOS power switches; S1 is a P-Channel device and S2,
S3 and S4 are N-Channel devices. The main difficulty with
this approach is that in integrating the switches, the
substrates of S3 and S4 must always remain reverse biased
with respect to their sources, but not so much as to degrade
their “ON” resistances. In addition, at circuit start-up, and
under output short circuit conditions (VOUT = V+), the output
voltage must be sensed and the substrate bias adjusted
accordingly. Failure to accomplish this would result in high
power losses and probable device latchup.
This problem is eliminated in the ICL7660 and ICL7660A by a
logic network which senses the output voltage (VOUT) together
with the level translators, and switches the substrates of S3 and
S4 to the correct level to maintain necessary reverse bias.
FIGURE 9. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT
CURRENT
FIGURE 10. SUPPLY CURRENT AND POWER CONVERSION
EFFICIENCY AS A FUNCTION OF LOAD
CURRENT
NOTE:
6. These curves include in the supply current that current fed directly into the load RL from the V+ (See Figure 11). Thus, approximately half the
supply current goes directly to the positive side of the load, and the other half, through the ICL7660/ICL7660A, to the negative side of the load.
Ideally, VOUT ∼ 2VIN, IS ∼ 2IL, so VIN x IS ∼ VOUT x IL.
NOTE: For large values of COSC (>1000pF) the values of C1 and C2 should be increased to 100µF.
FIGURE 11. ICL7660, ICL7660A TEST CIRCUIT
Typical Performance Curves (Test Circuit of Figure 11) (Continued)
TA = 25°C
V+ = 2V
+2
+1
0
-1
-2
SLOPE 150Ω
0 1 2 3 4 5 6 7 8
LOAD CURRENT IL (mA)
OUTPUTVOLTAGE
100
90
80
70
60
50
40
30
20
10
0
POWERCONVERSIONEFFICIENCY(%)
PEFF
I+
LOAD CURRENT IL (mA)
0 1.5 3.0 4.5 6.0 7.5 9.0
20.0
18.0
16.0
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0
SUPPLYCURRENT(mA)(NOTE6)
TA = 25°C
V+ = 2V
1
2
3
4
8
7
6
5
+
-
C1
10µF
IS V+
(+5V)
IL
RL
-VOUT
C2
10µF
ICL7660
COSC
+
-
(NOTE)
ICL7660A
ICL7660, ICL7660A
7. 7 FN3072.7
October 10, 2005
The voltage regulator portion of the ICL7660 and ICL7660A is
an integral part of the anti-latchup circuitry, however its inherent
voltage drop can degrade operation at low voltages. Therefore,
to improve low voltage operation the “LV” pin should be
connected to GROUND, disabling the regulator. For supply
voltages greater than 3.5V the LV terminal must be left open to
insure latchup proof operation, and prevent device damage.
Theoretical Power Efficiency
Considerations
In theory a voltage converter can approach 100% efficiency
if certain conditions are met.
1. The driver circuitry consumes minimal power.
2. The output switches have extremely low ON resistance
and virtually no offset.
3. The impedances of the pump and reservoir capacitors
are negligible at the pump frequency.
The ICL7660 and ICL7660A approach these conditions for
negative voltage conversion if large values of C1 and C2
are used.
ENERGY IS LOST ONLY IN THE TRANSFER OF
CHARGE BETWEEN CAPACITORS IF A CHANGE IN
VOLTAGE OCCURS. The energy lost is defined by:
E = 1/2 C1 (V1
2 - V2
2)
where V1 and V2 are the voltages on C1 during the pump and
transfer cycles. If the impedances of C1 and C2 are relatively
high at the pump frequency (refer to Figure 12) compared to
the value of RL, there will be a substantial difference in the
voltages V1 and V2. Therefore it is not only desirable to make
C2 as large as possible to eliminate output voltage ripple, but
also to employ a correspondingly large value for C1 in order to
achieve maximum efficiency of operation.
Do’s And Don’ts
1. Do not exceed maximum supply voltages.
2. Do not connect LV terminal to GROUND for supply
voltages greater than 3.5V.
3. Do not short circuit the output to V+ supply for supply
voltages above 5.5V for extended periods, however,
transient conditions including start-up are okay.
4. When using polarized capacitors, the + terminal of C1
must be connected to pin 2 of the ICL7660 and ICL7660A
and the + terminal of C2 must be connected to GROUND.
5. If the voltage supply driving the ICL7660 and ICL7660A
has a large source impedance (25Ω - 30Ω), then a 2.2µF
capacitor from pin 8 to ground may be required to limit
rate of rise of input voltage to less than 2V/µs.
6. User should insure that the output (pin 5) does not go
more positive than GND (pin 3). Device latch up will occur
under these conditions. A 1N914 or similar diode placed
in parallel with C2 will prevent the device from latching up
under these conditions. (Anode pin 5, Cathode pin 3).
VOUT = -VIN
C2
VIN
C1
S3
S4
S1 S28
3
2
5
3
7
FIGURE 12. IDEALIZED NEGATIVE VOLTAGE CONVERTER
FIGURE 13A. CONFIGURATION FIGURE 13B. THEVENIN EQUIVALENT
FIGURE 13. SIMPLE NEGATIVE CONVERTER
1
2
3
4
8
7
6
5
+
-
10µF
ICL7660
VOUT = -V+
V+
+
-
10µF
ICL7660A
V+
+
-
RO
VOUT
ICL7660, ICL7660A
8. 8 FN3072.7
October 10, 2005
Typical Applications
Simple Negative Voltage Converter
The majority of applications will undoubtedly utilize the ICL7660
and ICL7660A for generation of negative supply voltages.
Figure 13 shows typical connections to provide a negative
supply negative (GND) for supply voltages below 3.5V.
The output characteristics of the circuit in Figure 13A can be
approximated by an ideal voltage source in series with a
resistance as shown in Figure 13B. The voltage source has
a value of -V+. The output impedance (RO) is a function of
the ON resistance of the internal MOS switches (shown in
Figure 12), the switching frequency, the value of C1 and C2,
and the ESR (equivalent series resistance) of C1 and C2. A
good first order approximation for RO is:
RSW, the total switch resistance, is a function of supply
voltage and temperature (See the Output Source Resistance
graphs), typically 23Ω at 25°C and 5V. Careful selection of
C1 and C2 will reduce the remaining terms, minimizing the
output impedance. High value capacitors will reduce the
1/(fPUMP • C1) component, and low ESR capacitors will
lower the ESR term. Increasing the oscillator frequency will
reduce the 1/(fPUMP • C1) term, but may have the side effect
of a net increase in output impedance when C1 > 10µF and
there is no longer enough time to fully charge the capacitors
FIGURE 14. OUTPUT RIPPLE
FIGURE 15. PARALLELING DEVICES
FIGURE 16. CASCADING DEVICES FOR INCREASED OUTPUT VOLTAGE
A
t2 t1
B
0
-(V+)
V
1
2
3
4
8
7
6
5
ICL7660
V+
C1
ICL7660A
1
2
3
4
8
7
6
5
ICL7660
C1
ICL7660A
RL
+
-
C2
“n”
“1”
1
2
3
4
8
7
6
5
V+
1
2
3
4
8
7
6
5
+
-
10µF
+
-
10µF
+
-
10µF +
-
10µF
VOUT = -nV+
ICL7660
ICL7660A
“n”
ICL7660
ICL7660A
“1”
RO ≅ 2(RSW1 + RSW3 + ESRC1) +
2(RSW2 + RSW4 + ESRC1) +
1
+ ESRC2
(fPUMP) (C1)
(fPUMP =
fOSC
, RSWX = MOSFET switch resistance)
2
Combining the four RSWX terms as RSW, we see that:
RO ≅ 2 (RSW) +
1
+ 4 (ESRC1) + ESRC2
(fPUMP) (C1)
RO ≅ 2(RSW1 + RSW3 + ESRC1) +
ICL7660, ICL7660A
9. 9 FN3072.7
October 10, 2005
every cycle. In a typical application where fOSC = 10kHz and
C = C1 = C2 = 10µF:
RO ≅ 46 + 20 + 5 (ESRC)
Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high value could
potentially swamp out a low 1/(fPUMP • C1) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10Ω.
RO/ ≅ 46 + 20 + 5 (ESRC)
Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high value could
potentially swamp out a low 1/(fPUMP • C1) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10Ω.
Output Ripple
ESR also affects the ripple voltage seen at the output. The
total ripple is determined by 2 voltages, A and B, as shown in
Figure 14. Segment A is the voltage drop across the ESR of
C2 at the instant it goes from being charged by C1 (current
flow into C2) to being discharged through the load (current
flowing out of C2). The magnitude of this current change is
2• IOUT, hence the total drop is 2• IOUT • eSRC2V. Segment
B is the voltage change across C2 during time t2, the half of
the cycle when C2 supplies current to the load. The drop at B
is lOUT • t2/C2V. The peak-to-peak ripple voltage is the sum
of these voltage drops:
Again, a low ESR capacitor will reset in a higher
performance output.
Paralleling Devices
Any number of ICL7660 and ICL7660A voltage converters
may be paralleled to reduce output resistance. The reservoir
capacitor, C2, serves all devices while each device requires
its own pump capacitor, C1. The resultant output resistance
would be approximately:
Cascading Devices
The ICL7660 and ICL7660A may be cascaded as shown to
produced larger negative multiplication of the initial supply
voltage. However, due to the finite efficiency of each device,
the practical limit is 10 devices for light loads. The output
voltage is defined by:
VOUT = -n (VIN),
where n is an integer representing the number of devices
cascaded. The resulting output resistance would be
approximately the weighted sum of the individual ICL7660
and ICL7660A ROUT values.
Changing the ICL7660/ICL7660A Oscillator
Frequency
It may be desirable in some applications, due to noise or
other considerations, to increase the oscillator frequency.
This is achieved by overdriving the oscillator from an
external clock, as shown in Figure 17. In order to prevent
possible device latchup, a 1kΩ resistor must be used in
series with the clock output. In a situation where the
designer has generated the external clock frequency using
TTL logic, the addition of a 10kΩ pullup resistor to V+ supply
is required. Note that the pump frequency with external
clocking, as with internal clocking, will be 1/2 of the clock
frequency. Output transitions occur on the positive-going
edge of the clock.
It is also possible to increase the conversion efficiency of the
ICL7660 and ICL7660A at low load levels by lowering the
oscillator frequency. This reduces the switching losses, and is
shown in Figure 18. However, lowering the oscillator
frequency will cause an undesirable increase in the
impedance of the pump (C1) and reservoir (C2) capacitors;
this is overcome by increasing the values of C1 and C2 by the
same factor that the frequency has been reduced. For
example, the addition of a 100pF capacitor between pin 7
(OSC) and V+ will lower the oscillator frequency to 1kHz from
its nominal frequency of 10kHz (a multiple of 10), and thereby
necessitate a corresponding increase in the value of C1 and
C2 (from 10µF to 100µF).
RO ≅ 2 (23) +
1
+ 4 (ESRC1) + ESRC2
(5 • 103) (10-5)
RO ≅ 2 (23) +
1
+ 4 (ESRC1) + ESRC2
(5 • 103) (10-5)
VRIPPLE
≅ [ 1
+ 2 (ESRC2) ]IOUT
2 (fPUMP) (C2)
ROUT =
ROUT (of ICL7660/ICL7660A)
n (number of devices)
1
2
3
4
8
7
6
5
+
-
10µF
ICL7660
VOUT
V+
+
-
10µF
V+
CMOS
GATE
1kΩ
ICL7660A
FIGURE 17. EXTERNAL CLOCKING
ICL7660, ICL7660A
10. 10 FN3072.7
October 10, 2005
Positive Voltage Doubling
The ICL7660 and ICL7660A may be employed to achieve
positive voltage doubling using the circuit shown in Figure
19. In this application, the pump inverter switches of the
ICL7660 and ICL7660A are used to charge C1 to a voltage
level of V+ -VF (where V+ is the supply voltage and VF is the
forward voltage drop of diode D1). On the transfer cycle, the
voltage on C1 plus the supply voltage (V+) is applied through
diode D2 to capacitor C2. The voltage thus created on C2
becomes (2V+) - (2VF) or twice the supply voltage minus the
combined forward voltage drops of diodes D1 and D2.
The source impedance of the output (VOUT) will depend on
the output current, but for V+ = 5V and an output current of
10mA it will be approximately 60Ω.
Combined Negative Voltage Conversion
and Positive Supply Doubling
Figure 20 combines the functions shown in Figures 13 and
Figure 19 to provide negative voltage conversion and
positive voltage doubling simultaneously. This approach
would be, for example, suitable for generating +9V and -5V
from an existing +5V supply. In this instance capacitors C1
and C3 perform the pump and reservoir functions
respectively for the generation of the negative voltage, while
capacitors C2 and C4 are pump and reservoir respectively
for the doubled positive voltage. There is a penalty in this
configuration which combines both functions, however, in
that the source impedances of the generated supplies will be
somewhat higher due to the finite impedance of the common
charge pump driver at pin 2 of the device.
Voltage Splitting
The bidirectional characteristics can also be used to split a
higher supply in half, as shown in Figure 21. The combined
load will be evenly shared between the two sides. Because
the switches share the load in parallel, the output impedance
is much lower than in the standard circuits, and higher
currents can be drawn from the device. By using this circuit,
and then the circuit of Figure 16, +15V can be converted (via
+7.5, and -7.5) to a nominal -15V, although with rather high
series output resistance (~250Ω).
Regulated Negative Voltage Supply
In some cases, the output impedance of the ICL7660 and
ICL7660A can be a problem, particularly if the load current
varies substantially. The circuit of Figure 22 can be used to
overcome this by controlling the input voltage, via an ICL7611
low-power CMOS op amp, in such a way as to maintain a
nearly constant output voltage. Direct feedback is inadvisable,
since the ICL7660s and ICL7660As output does not respond
instantaneously to change in input, but only after the switching
delay. The circuit shown supplies enough delay to
accommodate the ICL7660 and ICL7660A, while maintaining
adequate feedback. An increase in pump and storage
capacitors is desirable, and the values shown provides an
output impedance of less than 5Ω to a load of 10mA.
1
2
3
4
8
7
6
5
+
-
VOUT
V+
+
-
C2
C1
COSC
ICL7660
ICL7660A
FIGURE 18. LOWERING OSCILLATOR FREQUENCY
1
2
3
4
8
7
6
5
V+
D2
C1 C2
VOUT =
(2V+) - (2VF)
+
-
+
-
D1ICL7660
ICL7660A
FIGURE 19. POSITIVE VOLT DOUBLER
1
2
3
4
8
7
6
5
V+
D1
D2
C4
VOUT = (2V+) -
(VFD1) - (VFD2)
+
-C2
+-
C3+
-
VOUT =
- (nVIN - VFDX)
C1
+
-
ICL7660
ICL7660A
FIGURE 20. COMBINED NEGATIVE VOLTAGE CONVERTER
AND POSITIVE DOUBLER
1
2
3
4
8
7
6
5
+
-
+
-
50µF
50µF
+
-
50µFRL1
VOUT = V+ - V-
2
V+
V -
RL2
ICL7660
ICL7660A
FIGURE 21. SPLITTING A SUPPLY IN HALF
ICL7660, ICL7660A
11. 11
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN3072.7
October 10, 2005
Other Applications
Further information on the operation and use of the ICL7660
and ICL7660A may be found in AN051 “Principals and
Applications of the ICL7660 and ICL7660A CMOS Voltage
Converter”.
1
2
3
4
8
7
6
5
+
-
100µF
100µF
VOUT
+
-
10µF
ICL7611
+
-
100Ω
50K
+8V
100K
50K
ICL8069
56K
+8V
800K 250K
VOLTAGE
ADJUST
-
+
ICL7660
ICL7660A
FIGURE 22. REGULATING THE OUTPUT VOLTAGE
1
2
3
4
8
7
6
5
+
-
+
-
10µF
16TTL DATA
INPUT
15
4
10µF
13 14
12 11
+5V LOGIC SUPPLY
RS232
DATA
OUTPUT
IH5142
1
3
+5V
-5V
ICL7660
ICL7660A
FIGURE 23. RS232 LEVELS FROM A SINGLE 5V SUPPLY
ICL7660, ICL7660A