This document provides an overview of topics in computer arithmetic covered in Chapter 3, including addition, subtraction, multiplication, division, floating point representation, parallelism, and implications for instruction sets. Key points covered include how addition and subtraction are performed at the bit level; how overflow is detected in two's complement systems; how unsigned integers handle overflow; and how parallel arithmetic units can perform simultaneous operations on vector data for applications like graphics and audio.

1. Chapter3 Notes: Hennessy | Arithmetic for Computers 1
Chapter 3 (Hennessy 4th Ed): Arithmetic for Computers
Supplement(s):
Objectives:
 Introduction
 Addition and Subtraction
 Multiplication
 Division
 Floating Point
 Parallelism and Computer Arithmetic
 Associativity
 Fallacies and Pitfalls
 Concluding Remarks
The goal of this chapter includes representationof realnumbers, what happens ifanoperation creates a number bigger thancanbe represented, howdoes
hardware reallymultiplyor divide numbers, arithmetic algorithms, hardware that follows these algorithms, and the implications of all this for instruction sets.
Content
Addition and Subtraction
 In addition, digits are addedbit bybit from right to left, withcarries passedto the next digit to the left, just as you woulddo byhand. Subtraction
uses addition:the appropriate operand is simplynegated before being added.
 Overflow occurs whenthe result fromanoperation cannot be representedwiththe available hardware, in thiscase a 32-bit word. When can
overflowoccur in addition? When addingoperands withdifferent signs, overflow cannot occur. There are similar restrictions to the occurrence of
overflowduringsubtract, but it’s just the opposite principle: whenthe signs of the operands are the same, overflow cannot occur (as when we
subtract operands of the same sign we endupbyadding operands of different signs). Knowing when overflow cannot occur in additionand
subtraction is all well and good, but howdo we detect it whenit does occur? Clearly, adding or subtracting two 32-bit numbers canyielda result that
needs 33 bits to be fullyexpressed. The lack of a 33rd bit means that whenoverflow occurs, the sign bit is set withthe value of the result insteadof
the proper signof the result. Since we need just one extra bit, onlythe signbit can be wrong. Hence, overflow occurs whenadding two positive
numbers andthe sum is negative, or vice versa. This means a carryout occurredintothe signbit.
 Overflow occurs insubtraction whenwe subtract a negative number from a positive number and get a negative result, or when w e subtract a
positive number from a negative number and get a positive result. Thismeans a borrow occurred fromthe signbit. Figure 3.2 shows the

2. Chapter3 Notes: Hennessy | Arithmetic for Computers 2
combination ofoperations, operands, andresults that indicate anoverflow.
 We have just seenhow to detect overflowfor two’s complement numbers ina computer. What about overflow withunsignedintegers? Unsigned
integers are commonlyusedfor memoryaddresseswhere overflows are ignored. The computer designer must therefore provide a wayto ignore
overflowinsome casesandto recognize it inothers. The MIPS solutionis to have twokinds ofarithmetic instructions to re cognize the two choices:
■■ Add (add), addimmediate (addi), andsubtract (sub)cause exceptions onoverflow.
■■ Add unsigned (addu), add immediate unsigned(addiu), and subtract unsigned (subu)do not cause exceptions onoverflow.
 Because Cignores overflows, the MIPSC compilers willalways generate the unsigned versions of the arithmetic instructions addu, addiu, andsubu,
no matter what the type ofthe variables. The MIPSFortrancompilers, however, pick the appropriate arithmetic instructions, depending onthe type
of the operands.
 Appendix Cdescribes the hardware that performs additionandsubtraction, which is calledan Arithmetic Logic Unit or ALU (It is the hardware that
performs addition, subtraction, and usuallylogical operations such as AND and OR.)
 Although some languageslike CandJava ignore integer overflow, languages like Ada andFortranrequire that the programbe notified. The
programmer or the programming environment must then decide what to dowhenoverflowoccurs.
 MIPS detects overflow withanexception, also calledaninterrupt onmanycomputers. An exception or interrupt is essentiallyanunscheduled
procedure call. The addressof the instructionthat overflowedis saved ina register, andthe computer jumps to a predefined address to invoke the
appropriate routine for that exception. The interrupted addressis savedsothat in some situations the programcancontinue after corrective code is
executed. (Section4.9 covers exceptions in more detail;Chapters 5 and6 describe other situations where exceptions andinterrupts occur.)
 MIPS includes a register calledthe exceptionprogram counter (EPC) to containthe address ofthe instruction that causedthe exception. The
instruction move from system control (mfc0) is usedto copyEPCinto a general-purpose register so that MIPS software has the optionof returning
to the offending instruction via a jumpregister instruction(The mfc0 (move from coprocessor 0) instructionloads data from a coprocessor0 register
into a CPU register – uwm.edu).
Arithmetic for Multimedia (relevant summary)
 Manygraphics systems originallyused8 bits to represent eachof the three primarycolors plus 8 bits for a locationof a pixel.
 Architects recognizedthat manygraphics andaudioa pplications wouldperform the same operationon vectors of thisdata. Bypartitioningthe carry
chains withina 64-bit adder, a processor couldperform simultaneous operations onshort vectors ofeight 8-bit operands, four 16-bit operands, or
two 32-bit operands. The cost of such partitionedadders was small. These extensions have beencalledvector or SIMD, for single instruction,
multiple data (see Section 2.17 and Chapter 7).
 One feature not generallyfoundingeneral-purpose microprocessors is saturating operations. Saturation means that whena calculation overflows,
the result is set to the largest positive number or most negative number, rather than a modulocalculationas intwo’s complement arithmetic.
Saturationis likelywhat you want for mediaoperations.
 It’s easyto detect overflowinunsignednumbers, althoughthese are almost always ignored because programs don’t want to detect overflow for
address arithmetic, the most commonuse of natural numbers. Two’s complement presents a greater challenge, yet some software systems require
detection ofoverflow, sotodayall computers have a wayto detect it.
 The risingpopularityof multimediaapplications led to arithmetic instructions that support narrower operations that caneasilyoperate inparallel.
 Elaboration: We had saidthat youcopyEPCinto a register via mfc0 andthen returnto the interruptedcode via jump register. Thisleads to an
interesting question:since you must first transfer EPCto a register to use with jump register, how can jump register return to the interruptedcode

3. Chapter3 Notes: Hennessy | Arithmetic for Computers 3
and restore the original valuesof all registers?Either you restore the oldregisters first, therebydestroyingyour return address fromEPC, which you
placedina register for use injump register, or you restore all registers but the one withthe return addresssothat you canjump—meaningan
exceptionwouldresult inchanging that one register at anytime duringprogram execution!Neither optionis satisfactory. To rescue the hardware
from this dilemma, MIPSprogrammers agreedto reserve registers $k0 and $k1 for the operating system;these registers are not resto redon
exceptions. Just as the MIPS compilers avoidusingregister $at so that the assembler canuse it as a temporaryregister (seeHardware/Software
Interface in Section2.10), compilers also abstainfrom using registers $k0 and$k1 to make them available for the operating system. Exception
routines place the return address inone ofthese registers andthenuse jump register to restore the instruction address.
 Elaboration: The speedof additionis increasedbydetermining the carryin to the high-order bits sooner. There are a varietyof schemes to
anticipate the carryso that the worst-case scenariois a functionof the log2 of the number of bits in the adder. These anticipatorysignals are faster
because theygo throughfewer gates in sequence, but it takes manymore gates to anticipate the proper carry. The most popular is carry lookahead,
which Section C.6 in Appendix Con the CD describes.
Multiplication
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ASSOCIATED CONTENT
 XXX
To be cleared
Further Reading
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More Research
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