Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year.
This document provides an informal introduction to modeling the Resource Reservation Protocol (RSVP) using Coloured Petri Nets (CPNs). It describes the key components of CPNs including places, transitions, types, markings, and dynamic behavior. An example CPN model of a simplified RSVP service specification is presented to illustrate these concepts. The model includes places representing network nodes and protocol states, transitions representing events, and arc expressions defining token movement between places during transition firing. The example demonstrates how CPNs can be used to formally specify and analyze communication protocols like RSVP.
Feasibility Issues in Shortest-Path Routing with Trafiic Flow SplitAbang Sabri
The document discusses issues with finding feasible traffic routing configurations using shortest paths in autonomous systems and IP networks. It formulates the problem of determining if a given routing configuration is feasible as a linear program, which can be used to derive cuts for solving the overall routing optimization problem using a branch-and-cut method. The paper also presents examples of non-feasible routing patterns to demonstrate that the relationship between the degree of non-feasibility and the optimal objective value of the linear program is not obvious.
Joint Timing and Frequency Synchronization in OFDMidescitation
1) The document discusses synchronization challenges in OFDM systems, including packet detection, timing synchronization, and frequency offset calculation. It analyzes various synchronization techniques like auto-correlation difference, auto-correlation sum, and cross-correlation methods for packet detection and timing synchronization.
2) For frequency offset calculation, it describes data-aided and non-data aided algorithms, including the van De Beek algorithm which relies on cyclic prefix redundancy rather than pilot symbols.
3) The key synchronization challenges are maintaining orthogonality between subcarriers in the presence of frequency offsets introduced by the wireless channel, which can significantly degrade performance if not corrected. Accurate synchronization algorithms are important for OFDM receivers to function properly.
This summarizes a fast re-route method to find an alternate path after a link failure, before the interior gateway protocol has reconverged. The method selects the next hop among a source node's neighbors based on which has the lowest number of visits (multiplicity) and shortest estimated distance to the destination. It is proven to always find an alternate path if one exists. The method improves over loop-free alternate approaches by not requiring tunnels. It can find paths for simple cases like a square topology where LFA fails.
A Low Power VITERBI Decoder Design With Minimum Transition Hybrid Register Ex...VLSICS Design
This work proposes the low power implementation of Viterbi Decoder. Majority of viterbi decoder designs in the past use simple Register Exchange or Traceback method to achieve very high speed and low power decoding respectively, but it suffers from both complex routing and high switching activity. Here simplification is made in survivor memory unit by storing only m-1 bits to identify previous state in the survivor path, and by assigning m-1 registers to decision vectors. This approach eliminates unnecessary shift operations. Also for storing the decoded data only half memory is required than register exchange method. In this paper Hybrid approach that combines both Traceback and Register Exchange schemes has been applied to the viterbi decoder design. By using distance properties of encoder we further modified to minimum transition hybrid register exchange method. It leads to lower dynamic power consumption because of lower switching activity. Dynamic power estimation obtained through gate level simulation indicates that the proposed design reduces the power dissipation of a conventional viterbi decoder design by 30%.
High Speed Decoding of Non-Binary Irregular LDPC Codes Using GPUs (Paper)Enrique Monzo Solves
Implementation of a high speed decoding of non-binary irregular LDPC codes using CUDA GPUs.
Moritz Beermann, Enrique Monzó, Laurent Schmalen, Peter Vary
IEEE SiPS, Oct. 2013, Taipei, Taiwan
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Design, Analysis and Implementation of Modified Luby Transform CodeIOSR Journals
Abstract : Bit losses in erasure channels like computer networks are of great concern. The existing methods to combat bit losses are either inefficient or time consuming due to the retransmission protocols involved. Through this paper, we propose a Modified Luby Transform (MLT) coding scheme to efficiently transmit data over live computer networks. The MLT code can combat bit losses as well as eliminate the need for retransmission. The usability and reliability of the proposed MLT code is verified by testing it on a live computer network. Keywords : Erasure channel, Fountain Codes, Luby Transform Codes , Wired Networks, Wireless Networks
Iaetsd computational performances of ofdm usingIaetsd Iaetsd
This document discusses computational performances of OFDM using different pruned radix FFT algorithms. It introduces various FFT techniques such as radix-2, radix-4, radix-8, mixed radix and split radix. It then proposes an input zero traced radix DIF FFT pruning (IZTFFTP) algorithm to improve the efficiency of these FFT techniques when there are many zero valued inputs in OFDM. The computational complexity of implementing different radix FFTs with and without this pruning technique is calculated, and results show pruning provides more efficient OFDM performance in terms of reducing calculations.
Feasibility Issues in Shortest-Path Routing with Trafiic Flow SplitAbang Sabri
The document discusses issues with finding feasible traffic routing configurations using shortest paths in autonomous systems and IP networks. It formulates the problem of determining if a given routing configuration is feasible as a linear program, which can be used to derive cuts for solving the overall routing optimization problem using a branch-and-cut method. The paper also presents examples of non-feasible routing patterns to demonstrate that the relationship between the degree of non-feasibility and the optimal objective value of the linear program is not obvious.
Joint Timing and Frequency Synchronization in OFDMidescitation
1) The document discusses synchronization challenges in OFDM systems, including packet detection, timing synchronization, and frequency offset calculation. It analyzes various synchronization techniques like auto-correlation difference, auto-correlation sum, and cross-correlation methods for packet detection and timing synchronization.
2) For frequency offset calculation, it describes data-aided and non-data aided algorithms, including the van De Beek algorithm which relies on cyclic prefix redundancy rather than pilot symbols.
3) The key synchronization challenges are maintaining orthogonality between subcarriers in the presence of frequency offsets introduced by the wireless channel, which can significantly degrade performance if not corrected. Accurate synchronization algorithms are important for OFDM receivers to function properly.
This summarizes a fast re-route method to find an alternate path after a link failure, before the interior gateway protocol has reconverged. The method selects the next hop among a source node's neighbors based on which has the lowest number of visits (multiplicity) and shortest estimated distance to the destination. It is proven to always find an alternate path if one exists. The method improves over loop-free alternate approaches by not requiring tunnels. It can find paths for simple cases like a square topology where LFA fails.
A Low Power VITERBI Decoder Design With Minimum Transition Hybrid Register Ex...VLSICS Design
This work proposes the low power implementation of Viterbi Decoder. Majority of viterbi decoder designs in the past use simple Register Exchange or Traceback method to achieve very high speed and low power decoding respectively, but it suffers from both complex routing and high switching activity. Here simplification is made in survivor memory unit by storing only m-1 bits to identify previous state in the survivor path, and by assigning m-1 registers to decision vectors. This approach eliminates unnecessary shift operations. Also for storing the decoded data only half memory is required than register exchange method. In this paper Hybrid approach that combines both Traceback and Register Exchange schemes has been applied to the viterbi decoder design. By using distance properties of encoder we further modified to minimum transition hybrid register exchange method. It leads to lower dynamic power consumption because of lower switching activity. Dynamic power estimation obtained through gate level simulation indicates that the proposed design reduces the power dissipation of a conventional viterbi decoder design by 30%.
High Speed Decoding of Non-Binary Irregular LDPC Codes Using GPUs (Paper)Enrique Monzo Solves
Implementation of a high speed decoding of non-binary irregular LDPC codes using CUDA GPUs.
Moritz Beermann, Enrique Monzó, Laurent Schmalen, Peter Vary
IEEE SiPS, Oct. 2013, Taipei, Taiwan
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Design, Analysis and Implementation of Modified Luby Transform CodeIOSR Journals
Abstract : Bit losses in erasure channels like computer networks are of great concern. The existing methods to combat bit losses are either inefficient or time consuming due to the retransmission protocols involved. Through this paper, we propose a Modified Luby Transform (MLT) coding scheme to efficiently transmit data over live computer networks. The MLT code can combat bit losses as well as eliminate the need for retransmission. The usability and reliability of the proposed MLT code is verified by testing it on a live computer network. Keywords : Erasure channel, Fountain Codes, Luby Transform Codes , Wired Networks, Wireless Networks
Iaetsd computational performances of ofdm usingIaetsd Iaetsd
This document discusses computational performances of OFDM using different pruned radix FFT algorithms. It introduces various FFT techniques such as radix-2, radix-4, radix-8, mixed radix and split radix. It then proposes an input zero traced radix DIF FFT pruning (IZTFFTP) algorithm to improve the efficiency of these FFT techniques when there are many zero valued inputs in OFDM. The computational complexity of implementing different radix FFTs with and without this pruning technique is calculated, and results show pruning provides more efficient OFDM performance in terms of reducing calculations.
Efficient call path detection for android os size of huge source codecsandit
Today most developers utilize source code written by other parties. Because the code is
modified frequently, the developers need to grasp the impact of the modification repeatedly. A
call graph and especially its special type, a call path, help the developers comprehend the
modification. Source code written by other parties, however, becomes too huge to be held in
memory in the form of parsed data for a call graph or path. This paper offers a bidirectional
search algorithm for a call graph of too huge amount of source code to store all parse results of
the code in memory. It refers to a method definition in source code corresponding to the visited
node in the call graph. The significant feature of the algorithm is the referenced information is
used not in order to select a prioritized node to visit next but in order to select a node to
postpone visiting. It reduces path extraction time by 8% for a case in which ordinary path
search algorithms do not reduce the time.
Performance Analysis of OFDM Transceiver with Folded FFT and LMS Filteridescitation
This paper proposes an OFDM transceiver that uses a folded FFT and LMS filter to reduce power consumption and hardware complexity compared to a traditional OFDM system. A folded FFT architecture is developed using folding transformation and register minimization techniques. This leads to less hardware usage and lower power consumption by exploiting redundancies in FFT computation. An LMS filter is also designed to remove noise. The performance of the proposed OFDM transceiver is analyzed in terms of error rate to validate the advantages of lower power and smaller hardware size compared to a conventional OFDM system.
Traffic Features Extraction and Clustering Analysis for Abnormal Behavior Det...Areej Qasrawi
This document proposes methods for extracting traffic features and using DBSCAN clustering to detect abnormal network behaviors. It extracts four traffic features related to IP addresses, ports, packet types and sizes to capture characteristics. DBSCAN clustering is applied to the feature vectors, classifying traffic into core clusters and isolated points. The isolated points likely represent abnormal behaviors and are analyzed for detection. Experimental results on test network traffic demonstrate the methods can effectively identify abnormal clusters, like those generated by a DDoS attack. The performance is better than alternative K-means clustering which cannot distinguish abnormal behavior clusters as clearly.
This document summarizes a method for recognizing online handwritten Tamil characters using fractal features. [1] A novel fractal coding technique is used that exploits redundancy to achieve better compression while requiring less memory and encoding time with minimal distortion. [2] Fractal codes are generated from preprocessed Tamil characters by partitioning them into ranges and finding the most similar transformed domain segments. [3] These fractal codes are then used to classify characters with 90% accuracy, outperforming a nearest neighbor classifier.
The performance of turbo codes for wireless communication systemschakravarthy Gopi
This document describes and compares two algorithms for decoding turbo codes: the Soft-Output Viterbi Algorithm (SOVA) and the Logarithmic Maximum A Posteriori (Log-MAP) algorithm. It provides simulations results that show the Log-MAP algorithm achieves 0.4 dB better bit error rate performance than SOVA for turbo codes with a constraint length of 3 over an additive white Gaussian noise channel. The document is arranged into sections that describe the channel model, each decoding algorithm, iterative decoding principles, and simulation results comparing the two algorithms' performance for different block lengths.
In this paper, low linear architectures for analyzing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. The min-sum giving out step is to that it produces only two diverse output magnitude values irrespective of the number of incoming bit-to check communication. These new micro-architecture structures would utilize the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption. The decoding algorithms we propose generalize and unify the decoding schemes originally presented the product codes and those of low-density parity-check codes.
A QUANTITATIVE ANALYSIS OF HANDOVER TIME AT MAC LAYER FOR WIRELESS MOBILE NET...ijwmn
Extensive studies have been carried out for reducing the handover time of wireless mobile network at
medium access control (MAC) layer. However, none of them show the impact of reduced handover time
on the overall performance of wireless mobile networks. This paper presents a quantitative analysis to
show the impact of reduced handover time on the performance of wireless mobile networks. The proposed
quantitative model incorporates many critical performance parameters involve in reducing the handover
time for wireless mobile networks. In addition, we analyze the use of active scanning technique with
comparatively shorter beacon interval time in a handoff process. Our experiments verify that the active
scanning can reduce the overall handover time at MAC layer if comparatively shorter beacon intervals are
utilized for packet transmission. The performance measures adopted in this paper for experimental
verifications are network throughput under different network loads.
Iaetsd a novel vlsi dht algorithm for a highly modular and parallelIaetsd Iaetsd
The document proposes a new VLSI algorithm for computing the discrete Hartley transform (DHT) that is well-suited for implementation on a highly parallel and modular VLSI architecture. The algorithm can efficiently split the DHT computation into multiple parallel parts that can be executed concurrently. It also leverages sub-expression sharing to significantly reduce hardware complexity. By efficiently sharing multipliers with the same constant, the number of required multipliers is much smaller than existing algorithms, and these constant multipliers can be efficiently implemented in VLSI.
The document proposes an efficient combined single-path delay commutator and multi-path delay feedback (SDC-SDF) radix-4 pipelined fast Fourier transform (FFT) architecture. The architecture includes SDC stages and one SDF stage. The SDC processing engine achieves 100% hardware utilization by time-multiplexing arithmetic resources including adders and multipliers. The proposed architecture requires roughly a minimum number of complex adders and delay memory of 4N+3.0. It provides a concise output order from the pre-stage to stage N/4-1 of a 16 point FFT example.
s.Magesh kumar DECE,BTECH,ME (ASAN MEMORIAL COLLEGE OF ENGINEERING AND TECHNO...sakthi1986
The document proposes a combined single-path delay commutator and multi-path delay feedback (SDC-SDF) radix-4 pipelined fast Fourier transform architecture. The architecture includes SDC stages and one SDF stage. The SDC processing engine achieves 100% hardware resource utilization by time-multiplexing arithmetic resources like adders and multipliers. The proposed architecture requires roughly a minimum number of complex adders and delay memory of 4N+3. It provides high throughput and low latency for applications like OFDM while improving hardware utilization compared to other radix-4 SDC-SDF architectures.
This document describes the implementation of a pipelined double precision floating point multiplier on an FPGA. It begins with background on floating point representation and implementations on FPGAs. It then describes the algorithm for floating point multiplication, which involves adding the exponents and multiplying the mantissas. The design presented in the paper divides the floating point multiplier into three pipeline stages - the first checks for zero operands, the second adds the exponents, and the third multiplies the mantissas, checks the sign, and normalizes the result. Simulation results on a Xilinx Virtex-II FPGA show that the pipelined design can produce one result per clock cycle after an initial delay.
A fast-adaptive-tomlinson-harashima-precoder-for-indoor-wireless-communicationsCemal Ardil
This document summarizes a research paper that proposes a fast adaptive Tomlinson-Harashima precoder for indoor wireless communications. The precoder uses a variable step size least mean squares algorithm to dynamically adjust its parameters according to channel variations over short time spans. It estimates the channel at the end of the uplink frame using system identification, rather than assuming the channel is time-invariant over both uplink and downlink frames as in conventional precoders. Simulation results show the adaptive precoder converges faster than LMS and has similar bit error rate performance to conventional precoders but with lower transmitter complexity.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
In this paper we analyze the cryptanalysis of the simplified data encryption standard algorithm using metaheuristics
and in particular genetic algorithms. The classic fitness function when using such an algorithm
is to compare n-gram statistics of a the decrypted message with those of the target message. We show that
using such a function is irrelevant in case of Genetic Algorithm, simply because there is no correlation
between the distance to the real key (the optimum) and the value of the fitness, in other words, there is no
hidden gradient. In order to emphasize this assumption we experimentally show that a genetic algorithm
perform worse than a random search on the cryptanalysis of the simplified data encryption standard
algorithm.
This paper compares two logarithmic coding techniques for adaptive beamforming in wireless communications. One technique uses a direct lookup table conversion, while the other uses linear interpolation with a smaller lookup table and multiplier. Matlab simulations show that both logarithmic techniques cause small errors for address precisions above 9 bits for direct conversion and 5 bits for interpolation conversion. The results indicate the logarithmic methods provide better error performance than a fixed-point implementation, while requiring less hardware cost.
Analysis of LDPC Codes under Wi-Max IEEE 802.16eIJERD Editor
The LDPC codes have been shown to be by-far the best coding scheme capable for transmitting message over noisy channel. The main aim of this paper is to study the behaviour of LDPC codes on under IEEE 802.16e guidelines. The rate- ½ LDPC codes have been implemented on AWGN channel and the result shows that they can be used on such channels with low BER performance. The BER can be further minimized by increasing the block length.
This document proposes a method for verifying web service compositions using Petri nets and transitive matrices. It presents a model for student online registration and examination web services. These services are represented as Petri nets which are then composed together. Deadlocks in the composition are detected using the transitive matrix of the Petri net. The algorithm computes the transitive matrix and uses it to derive reachable states and check for deadlocks. The method allows for verification of web service compositions and identification of potential deadlocks.
REDUCED COMPLEXITY QUASI-CYCLIC LDPC ENCODER FOR IEEE 802.11N VLSICS Design
In this paper, we present a low complexity Quasi-cyclic -low-density-parity-check (QC-LDPC) encoder hardware based on Richardson and Urbanke lower- triangular algorithm for IEEE 802.11n wireless LAN Standard for 648 block length and 1/2 code rate. The LDPC encoder hardware implementation works at 301.433MHz and it can process 12.12 Gbps throughput. We apply the concept of multiplication by constant matrices in GF(2) due to which hardware required is also optimized. Proposed architecture of QC-LDPC encoder will be compatible for high-speed applications. This hardwired architecture is less
complex as it avoids conventionally used block memories and cyclic-shifters.
On fuctional programming, high order functions, MLSimone Di Maulo
The document discusses the benefits of functional programming. It begins by explaining that functional programs are well-structured, easy to write and debug, and produce reusable modules that reduce costs. It then defines functions as first-class citizens that can take other functions as arguments. Functional programs contain no assignments and have no side effects, allowing functions to be evaluated at any time. Pattern matching is used to define functions with multiple cases. Lists and recursive functions like sum are used to iterate over and operate on data structures. Overall functions are modularized and combined like mathematical functions to build complete programs in a functional style.
Modeling enterprise architecture using timed colored petri net single process...ijmpict
The purpose of modeling enterprise architecture and analysis of it is to ease decision making about
architecture of information systems. Planning is one of the most important tasks in an organization and has
a major role in increasing the productivity of it. Scope of this paper is scheduling processes in the
enterprise architecture. Scheduling is decision making on execution start time of processes that are used in
manufacturing and service systems. Different methods and tools have been proposed for modeling
enterprise architecture. Colored Petri net is extension of traditional Petri net that its modeling capability
has grown dramatically. A developed model with Colored Petri net is suitable for verification of
operational aspects and performance evaluation of information systems. With having ability of hierarchical
modeling, colored Petri nets permits that using predesigned modules for smaller parts of the system and
with a general algorithm, any kind of enterprise architecture can be modeled. A two level hierarchical
model is presented as a building block for modeling architecture of Transaction Processing Systems (TPS)
in this paper. This model schedules and runs processes based on a predetermined non-preemptive
scheduling method. The model can be used for scheduling of processes with four non-preemptive methods
named, priority based (PR), shortest job first (SJF), first come first served (FCFS) and highest response
ratio next (HRRN). The presented model is designed such can be used as one of the main components in
modeling any type of enterprise architecture. Most enterprise architectures can be modeled by putting
together appropriate number of these modules and proper composition of them.
This document provides an introduction to the Standard ML programming language. It discusses how Standard ML combines the virtues of functional and imperative programming. Standard ML is formally defined and consists of a core language for small-scale programming and a module system for large-scale programming. The core language is a higher-order procedural language with an applicative subset, which is the focus of the tutorial. It aims to discuss functions, particularly recursive functions, types and type inference, aggregates, evaluation, abstract data types, imperative programming, and Standard ML modules.
Modelling of walking humanoid robot with capability of floor detection and dy...ijfcstjournal
Most humanoid robots have highly complicated structure and design of robots that are very similar to
human is extremely difficult. In this paper, modelling of a general and comprehensive algorithm for control
of humanoid robots is presented using Colored Petri Nets. For keeping dynamic balance of the robot,
combination of Gyroscope and Accelerometer sensors are used in algorithm. Image processing is used to
identify two fundamental issues: first, detection of target or an object which robot must follow; second,
detecting surface of the ground so that walking robot could maintain its balance just like a human and
shows its best performance. Presented model gives high-level view of humanoid robot's operations.
Efficient call path detection for android os size of huge source codecsandit
Today most developers utilize source code written by other parties. Because the code is
modified frequently, the developers need to grasp the impact of the modification repeatedly. A
call graph and especially its special type, a call path, help the developers comprehend the
modification. Source code written by other parties, however, becomes too huge to be held in
memory in the form of parsed data for a call graph or path. This paper offers a bidirectional
search algorithm for a call graph of too huge amount of source code to store all parse results of
the code in memory. It refers to a method definition in source code corresponding to the visited
node in the call graph. The significant feature of the algorithm is the referenced information is
used not in order to select a prioritized node to visit next but in order to select a node to
postpone visiting. It reduces path extraction time by 8% for a case in which ordinary path
search algorithms do not reduce the time.
Performance Analysis of OFDM Transceiver with Folded FFT and LMS Filteridescitation
This paper proposes an OFDM transceiver that uses a folded FFT and LMS filter to reduce power consumption and hardware complexity compared to a traditional OFDM system. A folded FFT architecture is developed using folding transformation and register minimization techniques. This leads to less hardware usage and lower power consumption by exploiting redundancies in FFT computation. An LMS filter is also designed to remove noise. The performance of the proposed OFDM transceiver is analyzed in terms of error rate to validate the advantages of lower power and smaller hardware size compared to a conventional OFDM system.
Traffic Features Extraction and Clustering Analysis for Abnormal Behavior Det...Areej Qasrawi
This document proposes methods for extracting traffic features and using DBSCAN clustering to detect abnormal network behaviors. It extracts four traffic features related to IP addresses, ports, packet types and sizes to capture characteristics. DBSCAN clustering is applied to the feature vectors, classifying traffic into core clusters and isolated points. The isolated points likely represent abnormal behaviors and are analyzed for detection. Experimental results on test network traffic demonstrate the methods can effectively identify abnormal clusters, like those generated by a DDoS attack. The performance is better than alternative K-means clustering which cannot distinguish abnormal behavior clusters as clearly.
This document summarizes a method for recognizing online handwritten Tamil characters using fractal features. [1] A novel fractal coding technique is used that exploits redundancy to achieve better compression while requiring less memory and encoding time with minimal distortion. [2] Fractal codes are generated from preprocessed Tamil characters by partitioning them into ranges and finding the most similar transformed domain segments. [3] These fractal codes are then used to classify characters with 90% accuracy, outperforming a nearest neighbor classifier.
The performance of turbo codes for wireless communication systemschakravarthy Gopi
This document describes and compares two algorithms for decoding turbo codes: the Soft-Output Viterbi Algorithm (SOVA) and the Logarithmic Maximum A Posteriori (Log-MAP) algorithm. It provides simulations results that show the Log-MAP algorithm achieves 0.4 dB better bit error rate performance than SOVA for turbo codes with a constraint length of 3 over an additive white Gaussian noise channel. The document is arranged into sections that describe the channel model, each decoding algorithm, iterative decoding principles, and simulation results comparing the two algorithms' performance for different block lengths.
In this paper, low linear architectures for analyzing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. The min-sum giving out step is to that it produces only two diverse output magnitude values irrespective of the number of incoming bit-to check communication. These new micro-architecture structures would utilize the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption. The decoding algorithms we propose generalize and unify the decoding schemes originally presented the product codes and those of low-density parity-check codes.
A QUANTITATIVE ANALYSIS OF HANDOVER TIME AT MAC LAYER FOR WIRELESS MOBILE NET...ijwmn
Extensive studies have been carried out for reducing the handover time of wireless mobile network at
medium access control (MAC) layer. However, none of them show the impact of reduced handover time
on the overall performance of wireless mobile networks. This paper presents a quantitative analysis to
show the impact of reduced handover time on the performance of wireless mobile networks. The proposed
quantitative model incorporates many critical performance parameters involve in reducing the handover
time for wireless mobile networks. In addition, we analyze the use of active scanning technique with
comparatively shorter beacon interval time in a handoff process. Our experiments verify that the active
scanning can reduce the overall handover time at MAC layer if comparatively shorter beacon intervals are
utilized for packet transmission. The performance measures adopted in this paper for experimental
verifications are network throughput under different network loads.
Iaetsd a novel vlsi dht algorithm for a highly modular and parallelIaetsd Iaetsd
The document proposes a new VLSI algorithm for computing the discrete Hartley transform (DHT) that is well-suited for implementation on a highly parallel and modular VLSI architecture. The algorithm can efficiently split the DHT computation into multiple parallel parts that can be executed concurrently. It also leverages sub-expression sharing to significantly reduce hardware complexity. By efficiently sharing multipliers with the same constant, the number of required multipliers is much smaller than existing algorithms, and these constant multipliers can be efficiently implemented in VLSI.
The document proposes an efficient combined single-path delay commutator and multi-path delay feedback (SDC-SDF) radix-4 pipelined fast Fourier transform (FFT) architecture. The architecture includes SDC stages and one SDF stage. The SDC processing engine achieves 100% hardware utilization by time-multiplexing arithmetic resources including adders and multipliers. The proposed architecture requires roughly a minimum number of complex adders and delay memory of 4N+3.0. It provides a concise output order from the pre-stage to stage N/4-1 of a 16 point FFT example.
s.Magesh kumar DECE,BTECH,ME (ASAN MEMORIAL COLLEGE OF ENGINEERING AND TECHNO...sakthi1986
The document proposes a combined single-path delay commutator and multi-path delay feedback (SDC-SDF) radix-4 pipelined fast Fourier transform architecture. The architecture includes SDC stages and one SDF stage. The SDC processing engine achieves 100% hardware resource utilization by time-multiplexing arithmetic resources like adders and multipliers. The proposed architecture requires roughly a minimum number of complex adders and delay memory of 4N+3. It provides high throughput and low latency for applications like OFDM while improving hardware utilization compared to other radix-4 SDC-SDF architectures.
This document describes the implementation of a pipelined double precision floating point multiplier on an FPGA. It begins with background on floating point representation and implementations on FPGAs. It then describes the algorithm for floating point multiplication, which involves adding the exponents and multiplying the mantissas. The design presented in the paper divides the floating point multiplier into three pipeline stages - the first checks for zero operands, the second adds the exponents, and the third multiplies the mantissas, checks the sign, and normalizes the result. Simulation results on a Xilinx Virtex-II FPGA show that the pipelined design can produce one result per clock cycle after an initial delay.
A fast-adaptive-tomlinson-harashima-precoder-for-indoor-wireless-communicationsCemal Ardil
This document summarizes a research paper that proposes a fast adaptive Tomlinson-Harashima precoder for indoor wireless communications. The precoder uses a variable step size least mean squares algorithm to dynamically adjust its parameters according to channel variations over short time spans. It estimates the channel at the end of the uplink frame using system identification, rather than assuming the channel is time-invariant over both uplink and downlink frames as in conventional precoders. Simulation results show the adaptive precoder converges faster than LMS and has similar bit error rate performance to conventional precoders but with lower transmitter complexity.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
In this paper we analyze the cryptanalysis of the simplified data encryption standard algorithm using metaheuristics
and in particular genetic algorithms. The classic fitness function when using such an algorithm
is to compare n-gram statistics of a the decrypted message with those of the target message. We show that
using such a function is irrelevant in case of Genetic Algorithm, simply because there is no correlation
between the distance to the real key (the optimum) and the value of the fitness, in other words, there is no
hidden gradient. In order to emphasize this assumption we experimentally show that a genetic algorithm
perform worse than a random search on the cryptanalysis of the simplified data encryption standard
algorithm.
This paper compares two logarithmic coding techniques for adaptive beamforming in wireless communications. One technique uses a direct lookup table conversion, while the other uses linear interpolation with a smaller lookup table and multiplier. Matlab simulations show that both logarithmic techniques cause small errors for address precisions above 9 bits for direct conversion and 5 bits for interpolation conversion. The results indicate the logarithmic methods provide better error performance than a fixed-point implementation, while requiring less hardware cost.
Analysis of LDPC Codes under Wi-Max IEEE 802.16eIJERD Editor
The LDPC codes have been shown to be by-far the best coding scheme capable for transmitting message over noisy channel. The main aim of this paper is to study the behaviour of LDPC codes on under IEEE 802.16e guidelines. The rate- ½ LDPC codes have been implemented on AWGN channel and the result shows that they can be used on such channels with low BER performance. The BER can be further minimized by increasing the block length.
This document proposes a method for verifying web service compositions using Petri nets and transitive matrices. It presents a model for student online registration and examination web services. These services are represented as Petri nets which are then composed together. Deadlocks in the composition are detected using the transitive matrix of the Petri net. The algorithm computes the transitive matrix and uses it to derive reachable states and check for deadlocks. The method allows for verification of web service compositions and identification of potential deadlocks.
REDUCED COMPLEXITY QUASI-CYCLIC LDPC ENCODER FOR IEEE 802.11N VLSICS Design
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Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year.
1. RESEARCH INVENTY: International Journal of Engineering and Science
ISSN: 2278-4721, Vol. 1, Issue 9 (November 2012), PP 33-38
www.researchinventy.com
Modelling of RSVP Protocol using Coloured Petri Net
1
Veena Bharti, 2Sachin Kumar
1
(Assistant Professor,MCA Dept.,Raj Ku mar Goel Institute Of Technology, Ghaziabad ,India)
2
(Associate Professor,CS Dept.,Ajay Kumar GargEngg.College , Ghaziabad ,India)
Abstract: The main formal technique used for RSVP specification and verification is CPNs. In this paper, their
functionality is described briefly by using RSVP without giving an y formal definitions. The paper gives an
informal introduction to the components, dynamic behaviour, occurrence and enabling mechanism of RSVP
using CPNs.
Keywords: CPN, RSVP, service specification.
1. INTRODUCTION
Formal methods encompass a variety of modelling techniques based on mathematics, which are
applicable to computer systems. They are useful in the construction and maintenance of complex
communicat ion protocols and allow protocol specifications to be formally analysed and verified. A wide range
of formal methods have been developed, however, this paper is not intended to present a comprehensive
treatment of them. Instead, it is focussed on Coloured Petri Nets (CPNs) [1].There are several reasons for using
CPNs for modelling and analysis of RSVP. The main ones are summarised as follows. Petri Nets are a mature
technique. That is shown in the thousand of journal papers and research reports generated in more than 30 years
of theoretical and practical work. Petri Nets are a well-defined graphical tool, which allo ws formal analysis.
This paper provides an informal introduction to CPNs and the computer tool, which supports its practical use,
Design/CPN [3].
2. PETRI NETS
Petri Nets [6] are a graphical technique that is based on a solid mathematical foundat ion and can be
used for describing and studying several information processing systems characterised by being concurrent,
asynchronous, non determin istic, parallel and distributed. This paper is intended to give a brief overview of the
main concepts and definitions related to Petri Nets by the means of some examples. Ord inary Petri Nets are also
called Place/Transition systems (PT -systems). The main co mponents of PT-nets are the places, transitions and
arcs . Places are drawn as ellipses or circles while t ransitions are drawn as rectangles. Arcs are directed either
fro m a p lace to a transition or fro m a transition to a place and may have a weight (positive integer) associated
with them (the default weight of an arc is one and is not shown). Depending on the system to be modelled,
places and transitions can have different interpretations [7]. For example, a p lace can represent a condition and a
transition an event. Also, a place can represent resources and a transition a task or job, which requires those
resources. Finally, a place can represent the state of the system and a transition, an action that can be taken,
based on that state.
t1
2
s1
2
s1
Figure 1: An examp le of Petri Nets.
33
2. Modelling Of RSVP Protocol Using Coloured Petri Net...
A place can contain one or more tokens. They are drawn as black dots (see Fig. 1). A distribution of
tokens on the places is called a marking (i.e. marking of the net). The initial state of the system is called the
initial marking. A marking of a place indicates the number of tokens on a particular place. The dyn amic
behaviour of a PT-system can be seen as the state or marking of the net changing according to transition
occurrences. A transition may have input places connected by incoming arcs and output places connected by
outgoing arcs. A transition is enabled (i.e. it can occur) if the marking of each input place consists of as many
tokens as indicated by the weight of the input arc, which connects the place with the transition. The occurrence
of an enabled transition removes tokens from the input places and adds tokens to the output places The number
of removed tokens from each input place corresponds to the number of tokens indicated by the weight of the
(input) arc, which connects the place and the transition. The number of added tokens to each output place
corresponds to the number of tokens indicated by the weight of the (output) arc, which connects the transition
with the place. Fig. 2 presents an example of the occurrence of the transition t1 in Figure 1. After transition t1
occurs, two tokens are removed fro m place S1 and one fro m p lace S2, and two tokens are
added to place S3.
s1 t1
2
S3
2
S2
Figure 2: An illustration of the occurrence of transition t1.
3. COLOURED PETRI NETS
As systems become more co mplex, Petri Net models can become very large, co mplex, and probably
unreadable [5]. This problem has been overcome by introducing new kinds of Petri Nets, called High-Level
Petri Nets [5]. Coloured Petri Nets (CPNs) are high-level nets. They incorporate some definit ions, such as data
types and data values processing found in programming languages [5][9]. In this section, CPNs are introduced
through a small example of the service specification for a communicat ion protocol. A more detailed exp lanation
and the formal definit ions of CPNs can be found in [5]. The example is a simp lified version of the RSVP service
specification model .So me mod ifications have been introduced to the original model to incorporate all the
concepts of the CPN language, which are used in this paper.
3.1 Example: Simplified Version of the RSVP Service S pecification
Fig.3 shows an overview of the system. It consists of two users, the sender and receiver that are connected
through a network that supports RSVP.
SENDER USER RECEIVER USER
RSVP
Figure 3: Overview of the RSVP service specificat ion.
The sender and receiver communicate to request some QoS guarantees, in the form of resource
reservations. The underlying protocol is receiver-oriented. The data packets will travel fro m the sender to the
receiver, but they are not shown in the model. Thus, the sender that wishes to get some QoS guarantees for the
34
3. Modelling Of RSVP Protocol Using Coloured Petri Net...
data flow, signals its intent by sending a request including the traffic characteristics of the data flow to
the receiver.Once the receiver gets the message it can send a reservation request including the details of the
reservation to the sender. The network may reject the reservation request because there are not enough network
resources to satisfy it. In that case, an error message is sent back to the receiver. Otherwise, the requ est arrives at
the sender, and the sender user is notified about the current reservation.
3.2 CPN Model
As Petri Net models, CPN models are created as graphical drawings. Fig.4 shows the CPN model o f the
example. It is divided into five parts: the sender user, the sender application/RSVP interface, the RSVP service
provider, the receiver application/RSVP interface and the receiver user. The basic components of the CPN
model are described as follows.
3.2.1Places
There are six places drawn as ellipses. The Sender and Receiver places represent the state of the sender
user/RSVP interface and receiver user/RSVP interface, respectively. The places SndToRcv and RcvToSnd
represent the RSVP service provider, one for each communication path (i.e. fro m the sende r to the receiver -
SndToRcv and fro m the receiver to the sender - RcvToSnd). A co mmunication path includes all the intermediate
devices along the route from the sender to receiver and vice versa. Finally, the places SenderUser and
ReceiverUser represent the users of the RSVP services.
3.2.2Types
Each place has an associated type or colour set which determines the type of data the place may
contain. It is written in the model in italics at the top left or right of the place. The type definitions are shown in
Figure 5. They are similar to types in programming languages.
(**************** States*****************)
color Status = with SESSION|WAITINGRESV|RESVSENT|RESVRECVD;
color ParValues = with E|Ta|Tb|Fa|Fb;
color STSpec = subset ParValues with [E,Ta,Tb];
color SFSpec = subset ParValues with [E,Fa,Fb];
color State = product Status * STSpec * SFSpec;
(************RSVP Messages ************)
color TSpec = subset ParValues with [Ta,Tb];
color FSpec = subset ParValues with [Fa,Fb];
color Do wnStream = union sender:TSpec + resverror: FSpec;
color UpSt ream = union reserve: FSpec;
Figure 5: Colour set defin itions.
35
4. Modelling Of RSVP Protocol Using Coloured Petri Net...
The places Sender and Receiver have the type State. State is the product of the type Status, STSpec and
SFSpec. Status is an enumeration type representing the four states (i.e. SESSION, WAITINGRESV,
RESVSENT and RESVREC VD), wh ich the service interface can have. SESSION is the initial state for both the
sender and receiver. WAITINGRESV means that a sender request with the traffic characteristics of the d ata
flow has been sent but no reservation request has yet been received. RESVSENT means that the receiver has
sent a reservation request. RESVRECVD means that the sender has received a reservation request. STSpec and
SFSpec are subsets of the type ParValues. ParValues is an enumeration type, which defines the values
(including the empty value E) the parameters can have. STSpec represents the traffic characteristics of the data
flow, wh ich are stored as part of the state information. SFSpec represents the Qo S characteristics of the data
flow, which are also stored as part of the state information. For example, if the Receiver place contains the value
(RESVSENT,Ta,Fb), it means that a reservation request, Fb, has been sent for the data flow with Ta traffic
characteristics.The place SndToRcv has the type DownStream, wh ich is the union of the types TSpec and FSpec
and represents the information flow that travels downstream to the Receiver. The type TSpec is a subset of
ParValues and defines the possible values of the data traffic characteristics. The type FSpec is a subset of the
type ParValues and represents the value of the QoS characteristics included in the reservation request, which
generated an error. The place RcvToSnd has the type UpStream, wh ich is the u nion of the type FSpec and
representsthe information flow that travels upstream to the Sender. The type FSpec represents the value of the
requested QoS characteristics. It may be noted that the union type shows useful to represent both the
downstream and upstream informat ion flo ws because the selectors of the union colours sets can identify them.
The sender and resverror selectors identify the downstream flows and the reserve selector identifies the
upstream flo w.
3.2.3Markings
Tokens are associated with each place. A token is a value (colour), which belongs to the type of the
place. The marking of a p lace is the mult i-set of tokens present on the place. It is a multi-set, since it may
contain several tokens with the same value. For examp le, the place Sen derUser may have the initial marking
2`Ta, which means that the place has two tokens, each with the value Ta. It means that the sender can send two
requests with the same traffic values CPNs include the initial state of the system. It is called the initial marking.
It is written on the upper left or right of the place. In the initial marking, each of the places Sender and Receiver
has a single token with the value (SESSION,E,E), wh ich means that no reservation nor traffic informat ion has
been sent yet (as indicated by the value E). Each of the places SenderUser and ReceiverUser has an initial
marking consisting of two tokens 1`Ta++1`Tb and 1`Fa++1`Fb, respectively. It means that the sender user has
two traffic requests with the values Ta and Tb, and the receiver user has two reservation requests with the values
Fa and Fb. In itially, the remaining places do not contain any tokens.
3.2.4Transitions
Transitions represent the actions of the system. They are drawn as rectangles in Fig . 5. There are six
transitions in the examp le. The transition RSVPSenderReq models the action taken when the sender sends a
request with the traffic characteristics of the data flow. The reception and processing of a sender request is
modelled by the transition RSVPSenderInd. The transition RSVPReserveReq models the action taken when the
receiver generates a reservation request. The transition RSVPReserveInd is used to model the reception and
processing of a reservation request. The transition RequestRejected models the action taken when the RSVP
service provider fails in allocating the requested reservation. Finally, the transition RSVPResvErrorInd models
the reception and processing of a reservation error notification.
3.2.5Arcs
Arcs connect transitions and places. A transition may have input places connected by incoming arcs
and output places connected by outgoing arcs. Arcs have expressions associated with them. They are located
next to arcs and determine which tokens are removed or added to the places as explained in the next se ction.
3.3. Dynamic Behavi our
The dynamic behaviour of the CPN system can be described as the marking of the net changing
according to transition occurrences, which depend on the exp ressions of the surrounding arcs.
3.3.1Variables and Bindings
An arc e xpression is evaluated by assigning (binding) data values to variables. The result of the
evaluation of an arc exp ression is a mu lti-set of tokens. The variab le declarat ion of the examp le is shown in
36
5. Modelling Of RSVP Protocol Using Coloured Petri Net...
Fig. 6.
(*************** Variables ***************)
var sta: Status;
var fspec,fspec1: SFSpec;
var tspec: STSpec;
Figure 6: Variable declaration.
A binding is represented in the form {v 1=d 1,v2=d2,…,vn=dn} where v i for i ∈ {1,2..n} is a variable and di is
the data value assigned to vi. For examp le, assume that the places surrounding transition RSVPReserveReq have
the current markings shown in Fig. 7, indicated next to the places. The token values are enclosed in boxes and
the number of tokens
in small circles. For instance, the place Receiver has a current mar king consisting of one token
1`(WAITINRESV,Ta,E). Two examp les of bindings are:
b1={fspec=Fa,sta=WAITINGRESV,tspec=Ta,fspec1=E}
b2={fspec=Fb,sta=WAITINGRESV,tspec=Ta,fspec1=E}
Figure 7
For binding b1, the arc exp ressions associated with the two input arcs of the transition
RSVPReserveReq evaluate to the mult i-sets of tokens 1`(WAITINGRESV,Ta,E) and 1`Fa. For binding b2, the
two input arc expressions evaluate to 1`(WAITINGRESV,Ta,E) and 1`Fb.A transition may have a boolean
expression attached to it. It is called guard and is enclosed between brackets. Similarly to the arc expression, a
guard may have variables. The guard hasto evaluate to true to accept the binding. Transition RSVPReserveReq
has a guard attached to it. It specifies that the status of the receiver must be WAITINGRESV or RESVSENT to
accept the binding.
3.3.2 Enabling and Occurrence of Transitions
A transition can occur if it is enabled. For a transition to be enabled in the current marking, it must be
possible to bind (assign) data values to the variables appearing on the surrounding arc expressions and in the
guard and the following conditions must be met. Firstly, each of the input arc expressions evaluates to tokens
that are present on the corresponding input places. Secondly, if there is any guard, it must evaluate to true. The
occurrence of a transition removes tokens from the input places and adds tokens to the output places. The
removed tokens are the result of evaluating the expressions on the corresponding incoming arcs, while the
values of the added tokens are the result of evaluating the arc expressions on the corresponding outgoing arcs.
For examp le, the transition RSVPReserveReq is enabled in the current marking shown in Fig . 8 for the binding
b1(introduced in the last section). The occurrence of transition RSVPReserveReq updates the marking of the
place Receiver. Thus, the token representing the state of the receiver shows that the status of the receiver is
RESVSENT and the QoS characteristics are Fa. It also adds a token representing a reserve (i.e. a reservation
request), with the value of the requested QoS equal to Fa, to the place RcvToSnd. There can be more than one
possible binding for the arc exp ressions surrounding a transition. These bindings define the way the transition
can occur. However, for a given marking, the transition will be enabled for a subset of them. The execution of a
CPN can be seen as an occurrence sequence consisting of markings that are reached and steps. A step consists
of potentially several enabled binding elements that occur concurrently. A binding element includes a transition
and a binding of its variables. For examp le, in the marking shown in Figure 8, there are three enabled binding
elements as follows:
be1=(RSVPReserveReq,{fspec=Fb,sta=RESVSENT,tspec=Ta,fspec1=Fa})
be2 = (RequestRejected,{fspec=Fa})
be3=(RSVPReserveInd,{fspec=Fa,tspec=Ta,fspec1=E})
Figure 8
Binding elements be1 and be3 are concurrently enabled, since the mu lti-set of tokens resulting fro m the
evaluation of the input arc exp ress ions are present in the corresponding input places (i.e. the places Sender,
RcvToSnd and Receiver) and the transitions use a disjoint sets of those tokens. Thus, these binding elements can
occur together. It means that a request can be generated and sent b y the receiver (transition RSVPReserveReq),
while a prev ious reservation request is indicated to the sender (transition RSVPReserveInd). Binding elements
be2 and be3 are in conflict, since they cannot get the only token (i.e. reserve(Fa)) in RcvToSnd place
simu ltaneously. Therefore, the transitions RequestRejected and RSVPReserveInd need to share the token with
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6. Modelling Of RSVP Protocol Using Coloured Petri Net...
each other. It means that a reservation request can be rejected (transition RequestRejected) or accepted
(transition RSVPReserveInd). Binding elements be1 and be2 are also concurrently enabled.
4. CONCLUS ION
This paper provides an introduction to the CPN used for modelling and analysis of RSVP. It gives an
informal overview of CPNs by means of an example. Then it presents the CPN model of RSVP protocol, which
is called Design/CPN. Finally, it describes the occurrence of RSVP protocol.
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