The document discusses plans to create a Semiconductor Institute at Unisinos in Brazil to support the local semiconductor industry. It outlines the current semiconductor production chain in Brazil and gaps in back-end production. The Institute would focus on research, training, and technological support for packaging and testing. It proposes a partnership model called "2+2" involving Brazilian and Korean universities and companies. The Institute would have a modular structure covering topics like packaging, MEMS, materials characterization, reliability analysis, and software. The goal is to fulfill the semiconductor production chain in Brazil and support the growth of the local electronics market.
1. Unisinos
SEMICONDUCTOR
RESEARCH
INSTITUTE
October 19th, 2011
2. Semiconductor
Production Chain in Rio Grande do Sul
DESIGN FRONT END BACK END
CEITEC/SMDH CEITEC HT Micron
UFRGS-PUC-UFSM UFRGS -------------
3. Semiconductor
Production Chain in Rio Grande do Sul and Brazil
DESIGN FRONT END BACK END
CEITEC/SMDH CEITEC HT Micron
UFRGS/PUC UFRGS -------------
22 Design
Centers HT Micron
2 Training CEITEC Smart
Centers &
6 Universities Commercial
IC Brazil Scale
Program
4. Fulfilling the Chain
DESIGN FRONT END BACK END
CEITEC/SMDH CEITEC HT Micron
UFRGS/PUC UFRGS UNISINOS
22 Design
Centers HT Micron
2 Training CEITEC Smart
Centers &
6 Universities Commercial
IC Brazil Scale
Program
5. Why Packaging?
• Ht Micron Plant at Unisinos
• CEITEC installation in Porto Alegre
• IC Brazil Program
• Absence of Local Institution in R&D and Training
• Relatively low risk
• Federal Incentives (PADIS Law)
• Possibility of developing research in next generation of
packaging (Flip Chip,3D, TSV, PoP, ...)
• Electronics market in Brazil is growing and represents
about USD 35 billion
7. Main Objective
• To create, in Rio Grande do Sul, a Centre of
Excellence in R&D&I to support local Industry,
focusing on semiconductors packaging and test .
• Priorities
- HR training
- Technological Support
- Research
• Main characteristics
– Environment for the generation, transfer and application of knowledge produced
in universities and research centers in the area of semiconductor packaging and
test (back end)
– Integrated with the productive sector, creating a nuclear cluster of
semiconductor companies
– Promoter of sustainable development of a strategic industry
8. Strategy
In Brazil: Partners and Customers
HT Micron
Research Institutes
& Universities
Unisinos
Semiconductor
Institute
CEITEC & Electro-
Electronic
IC Brazil Brazilian
Program Companies
9. Strategy: The 2+2 Model
Brazil-Korea S&T cooperation agreements
S&T policies including government financial support
South Korea Brazil
Research Institute / Research Institute /
University University
Private company Private company
Partnership
Internal / Global market
10. Strategy: The 2+2 Model
Goal 1
------------------------------------------
Semiconductor Back End Manufacturing Line
HT Micron
Altus (Parit) Hana Micron
Brazilian Company Partnership Korean Company
UNISINOS Korean Research
Partnership
Brazilian Research Institutes / Universities
Institute / University (SKKU)
Brazilian Science & Technology Policies Korean
Government and Cooperation Agreements Government
11. Semiconductor Institute
Modular Structure
Long
Term Graduate
Techincal Courses
Courses
Design Short
Term
Technical Undergra-
Courses HR Training duate
Courses
Software
Proto- Drivers
typing
SMT
Software, Electrica
l Test
Modeling
& Test
Photo- Electrical,
voltaic Unisinos Mechanic
Energy Semiconductor al and
Thermal
Institute Modeling
Polymer
Electro-
nics
Packa-
Reliability
ging
& Failure Reliabi
Analysis lity
Flip MEMS Tests
Chip
IC Materials Failure
Packaging Characte- Structur Analysis
COB rization & Electrical
al
SiP Measurem
Develop Charact ents
ment erization
Chemical,
6 topics
Thermal
Nano and
materials Physical
Charact.
12. Unisinos
Semiconductor Institute Long Term
Techincal
Courses
Graduate
Courses
Design
Short Term
Technical Undergra-
Courses HR
duate
Training Courses
Software
Proto- Drivers
typing
SMT
Software, Electrical
Test
Modeling
Totals & Test
Photo- Electrical,
voltaic
Energy
•Area = 2,000 m²
Unisinos Mechanic
al and
Semiconductor
•Technicians Institute
= 10 Thermal
Modeling
Polymer
Electro-
•Engineers = 14
nics
Packa- •Professors/Researchers = 19
Reliability
ging •Administrative = 2 & Failure
• Total = 45 people
Reliability
Analysis Tests
Flip MEMS
Chip
IC Materials Failure
Packaging Characte- Analysis
COB Structural Electrical
SiP
rization &
Character Measurem
Develop ization ents
ment
Chemical,
Thermal
Nano and
materials Physical
Charact.
15. Priorities - 1
Long
Term Graduate
Techincal Courses
Courses
Design Short
Term
Undergra-
Technical HR duate
Courses
Training Courses
Software
Proto- Drivers
typing
SMT
Software, Electrica
l Test
Modeling
& Test
Photo- Electrical,
voltaic Unisinos Mechanic
Energy Semiconductor al and
Thermal
Institute Modeling
Polymer
Electro-
nics
Packa-
Reliability
ging
& Failure Reliabili
Analysis ty
Flip Tests
MEMS
Chip
IC Materials Failure
Packaging Characte- Structur
Analysis
COB Electrical
SiP
rization & al Measurem
Develop Character ents
ization
ment
Chemical,
Thermal
Nano and
materials Physical
Charact.
16. Priorities - 2 Long
Term Graduate
Techincal Courses
Courses
PCB Short
Design Term
Undergra
Technical HR
Courses
-duate
Training Courses Software
Proto- Drivers
typing
SMT
Software, Electric
Modeling al Test
& Test
Photo- Electrical,
voltaic Unisinos Mechanic
Energy Semiconductor al and
Thermal
Institute Modeling
Polymer
Electro-
nics
Packa-
Reliability
ging
& Failure Reliabili
Analysis ty
Flip MEMS Tests
Chip
IC
Packaging Materials Failure
COB Characte- Structur
Analysis
SiP rization & Electrical
al
Measure
Develop Charact
ments
ment erization
Chemical,
Thermal
Nano and
materials Physical
Charact.
17. HR Training
Training Team Long
Graduate
Term
Techincal Courses
Courses
• Engineers,
• Professors/Researchers Short Undergra-
Term HR duate
Technical Courses
Courses Training
Short Term Courses
• Focused on specific processes or Reliability and Failure Analysis
steps (2011)
•‘Hands on’ or ‘Informative’
• < 80 h Materials and Processes:
Ready to Start Packaging and SMT
Long Term Courses
Infraestructure and
Semiconductors
Process Control:
and Electronic
• Focused on managerial or technician Clean Rooms and
SPC
Technology
training (2012)
•~ 360 h
18. HR Training
Long
Term Graduate
Techincal Courses
Courses
Short Undergra
Term HR -duate
Technical Courses
Courses Training
Graduate Courses
• Changes on graduate curricula (2012)
• Mechanical Engineering
• Production Engineering
• Applied Computing
• New Master Program (2013)
• Electrical/Electronics Engineering
• Double certification (Brazil and Korea)
Undergraduate Courses
• Changes on undergraduate curricula (2012)
• Electrical Engineering
• Mechanical Engineering
• Production Engineering
• Automation Engineering
• Environmental Engineering
• Software Engineering
• Computational Science
19. Reliability & Failure Analysis
Area
• Labs = 2 x 60 m2
• Research Offices = 2 x 40m2
Research Team
• Technician = 2 Reliability
Tests
• Engineers = 2
• Professors/Researchers = 2 Reliability &
Failure
Analysis Failure
Analysis &
Electrical
Measurem
ents
20. Reliability & Failure Analysis
Reliability Lab
• Reliability Analysis tester Reliabili
• Environmental test ty
Tests
• Thermal shock Reliability
& Failure
• Thermal cycling Analysis Electric
• Burn in Measu-
rements
• HAST Analysis
• Salt spray
• Pressure Cooker
• Mechanical test
• Vibration (shaker)
28. Packaging
Area
• Labs = 5 x 60 m2
• Research Offices = 5 x 40 m2 + 1 x 50 m2
Research Team
• Technician = 3
• Engineers = 3
Photo-
voltaic • Professors/Researchers = 5
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
29. Packaging Lab
COB, SiP
• COB – Chip On Board Prototyping
• Open cavity prototyping
• Packaging Development
Photo-
voltaic
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
30. Packaging Lab
COB, SiP - equipment
Photo-
voltaic
Energy
•Die Attach Machine
Polymer
• Cure Oven
Electro
nics • Plasma Cleaning
Packa-
ging • Ball and Wedge Al/Au Wire Bonder
• Dispense Molding Machine
Flip
Chip
MEMS • Pull and Shear Test
IC
Packaging
• Optical Microscope
COB
SiP
•Single Wafer Back Grinding Machine
• Wafer Saw
31. Embedded Software, Modeling & Test
Area
• Labs = 1 x 60 m2
• Research Offices = 1 x 40 m2 + 1 x 50 m2
Research Team Software
Drivers
• Technician = 1 Electrica
• Engineers = 4 l Test
• Professors/Researchers = 5 Software,
Modeling
& Test Electrical,
Mechanic
al and
Thermal
Modeling
32. Software, Modeling & Test
Software
Embedded Software Lab Drivers
Electrical
•Embedded Software Development Test
for Electronic Modules Software,
• Pendrives Modeling
& Test Electrical,
• SSDs
Mechanic
al and
Thermal
• SD cards Modeling
• etc.
33. Software, Modeling & Test
Electrical, Thermal & Mechanical Modeling Lab
Software
• Packaging Electrical Modeling Drivers
• Packaging Thermal Modeling
Electrical
• Packaging Mechanical Modeling Test
Software,
Modeling
Tools & Test Electrical,
• Mentor FloTHERM
Mechanic
al and
Thermal
• Abaqus Modeling
• Spice
• Matlab
34. Embedded Software & Test
Modules & IC Test Lab
• Prototypes Test Software
Drivers
•Test Routines Optimization and Development
• DFT Electrical
Test
Software,
Equipment (future) Modeling
Electrical,
& Test
Mechanic
al and
• Mixed Signal Tester (ATE) + Handlers Thermal
Modeling
35. Packaging
Photovoltaic Energy Lab.
•Training
• Cells and Modules Qualification
• System design and application
• R&D
Photo-
voltaic
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
36. Packaging
Photovoltaic Energy Lab
Equipment
• Piranometer and pyrheliometer
• Spectroradiometer
• Standard solar cells
• Solar PV simulators
• PV simulator power source
• Spectral response equipment
• Climatic and thermal chambers for solar panels
• Thermographical camera
• Power sources
Photo-
voltaic • Irradiance and temperature reference standards
Energy • Electrical isolation tester
Polymer
• I-V curve tracers up to 100 kW
Electro • Electric network simulator and oscilloscope
nics
Packa- • Battery bank, DC sources, variable loads
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
37. Packaging
Flip Chip Lab (future)
• Flip Chip Prototyping
• Flip Chip Process Development
• Flip Chip Products Development
Photo-
voltaic
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
38. Unisinos Semiconductor Institute
Specialties
Packaging Lab
Flip Chip – equipment (future)
• Flip Chip Bonding Machine
• Cure Oven
• Electroless Ni Plating
• Sputtering (may share with MEMS)
• Aligner/Stepper (share with MEMS)
Photo-
• Wafer Track (share with MEMS)
voltaic
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP
39. Unisinos Semiconductor Institute
Specialties
Packaging Lab
Polymer Electronics (future)
• Polymer Electronics R&D
• Polymer Electronics Product Prototyping
Photo-
voltaic
Energy
Polymer
Electro
nics
Packa-
ging
Flip MEMS
Chip
IC
Packaging
COB
SiP