SlideShare a Scribd company logo
Introduction
What is VLSI?
VLSI (very large-scale integration) is the current level of
computer microchip miniaturization and refers to microchips
containing in the hundreds of thousands of transistor s. LSI
(large-scale integration) meant microchips containing
thousands of transistors.
What is the Use of VLSI?
VLSI APPLICATION. VLSI stands for Very Large Scale
Integration. It's used in creating so many chips and circuits
on a single mini chip of silicon.
Introduction
Requirements study
specification
implementation
validation
What do I have to design?
How do I do it?
Have I implemented
What I intended to?
About any design..
market
VLSI SYSTEM DESIGN FLOW
V. ANURADHA
VLSI Design cycle:
VLSI design cycle start with a formal
specification of a VLSI chip, follows
a series of steps, and eventually
produces a packaged chip.
Simplified VLSI Design Flows
System Specification
Functional
(Architecture) Design
Functional Verification
Logic Design
Logic Verification
Circuit Design
Circuit Verification
Physical Design
Physical Verification
Front End Back End
Synthesis Phase Layout Phase
Circuit
Representation
Layout
Representation
Behavioral
Representation
Logic(Gate-Level)
Representation
VLSI SYSTEM DESIGN FLOW
V. ANURADHA
Four Levels of Design Representation
Behavioral
Representation
Logic (Gate-Level)
Representation
Circuit
(Transistor-Level)
Representation
Layout
Representation
Functional Blocks, FSM
Logic Blocks, Gates
Transistor Schematics
Physical Devices
VLSI Design flow
VLSI SYSTEM DESIGN FLOW
V. ANURADHA
Design Methodology
There are two basic types of digital design
methodologies
Top-Down design methodology
Bottom-Up design methodology
Top-Down Design Methodology
 Define top-level block and identify the sub-
blocks
 divide sub-block until we come to leaf cells
Design Methodology
Bottom-Up Design Methodology
identify building block that are available for us
build a bigger cells using these block
continue build a cell until we build top level
the
A combination of Top-Down and Bottom-Up
design are used in today’s digital design
top-level
Top-Down Design Methodology
VLSI SYSTEM DESIGN FLOW
V. ANURADHA
Top Level Block
Sub Block 1 Sub Block 1
Sub Block 1
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Bottom-Up Design Methodology
Top Level Block
Macro Cell 1 Macro Cell 3
Macro Cell 2
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Leaf
Cell
Simplified view of VLSI design Flow
Top Down
(algorithm
Bottom Up
(physical)
Y-Chart
System Specification
 First step of design process is to lay down
the specification of the system.
 High level representation of the system.
 Factors considered:
 Performance,Functionality,Physical
dimension,Design technique,Fabrication
technology
 It is a compromise between market
requirements, technological and economical
viability.
System Specification
The end results are specifications of
 Size,Speed,Power and Functionality
of the VLSI system
 Basic architecture
Functional Design
 Main functional units, Interconnect requirements
of the system are identified
 The area, power and other parameters of each unit
are estimated
 The key idea is to specify behavior, in terms of
Input,Output,Timing of each unit
 The outcome of functional design is usually a
timing diagram
 This information leads to improvement of the
overall design process and reduction of
complexity of the subsequent phases
Logic Design
Design the logic, that is,
Boolean expressions,word width, register allocation,
etc.
The outcome is called an RTL (Register Transfer
Level) description. RTL is expressed in a HDL
(Hardware Description Language), such as VHDL
and Verilog.
Circuit Design
 The purpose of the circuit design is to develop a
circuit representation based on the logic design.
 The Boolean expression can be converted into a
circuit representation by taking into consideration
the speed and power requirements of the original
design.
 Design the circuit including gates, transistors,
interconnections, etc. The outcome is called a
netlist.
 Circuit simulation is used to verify the correctness
and timing of component
Physical Design
Given a circuit after logic
synthesis, to convert it into a
layout
Overall design process
Electronics.ppt

More Related Content

Similar to Electronics.ppt

Digital Design Flow
Digital Design FlowDigital Design Flow
Digital Design Flow
Mostafa Khamis
 
VLSI unit 1 Technology - S.ppt
VLSI unit 1 Technology - S.pptVLSI unit 1 Technology - S.ppt
VLSI unit 1 Technology - S.ppt
indrajeetPatel22
 
Wi Fi documantation
Wi Fi documantationWi Fi documantation
Wi Fi documantation
vijaykumar vodnala
 
Hierarchical design and design abstraction
Hierarchical design and design abstractionHierarchical design and design abstraction
Hierarchical design and design abstraction
Pabna University of Science and Technology
 
RCW@DEI - Design Flow 4 SoPc
RCW@DEI - Design Flow 4 SoPcRCW@DEI - Design Flow 4 SoPc
RCW@DEI - Design Flow 4 SoPc
Marco Santambrogio
 
VLSI- Unit I
VLSI- Unit IVLSI- Unit I
VLSI- Unit I
MADHUMITHA154
 
Gourp 12 Report.pptx
Gourp 12 Report.pptxGourp 12 Report.pptx
Gourp 12 Report.pptx
ShubhamMane733576
 
Vlsi Summer training report pdf
Vlsi Summer training report pdfVlsi Summer training report pdf
Vlsi Summer training report pdf
GirjeshVerma2
 
UNIT 1.docx
UNIT 1.docxUNIT 1.docx
UNIT 1.docx
Nagendrababu Vasa
 
Co question bank LAKSHMAIAH
Co question bank LAKSHMAIAH Co question bank LAKSHMAIAH
Co question bank LAKSHMAIAH
veena babu
 
introduction to cmos vlsi
introduction to cmos vlsi introduction to cmos vlsi
introduction to cmos vlsi
ssuser593a2d
 
VLSI Physical Design Automation.ppt
VLSI Physical Design Automation.pptVLSI Physical Design Automation.ppt
VLSI Physical Design Automation.ppt
RichikDey5
 
VLSI UNIT-1.1.pdf.ppt
VLSI UNIT-1.1.pdf.pptVLSI UNIT-1.1.pdf.ppt
VLSI UNIT-1.1.pdf.ppt
rajukolluri
 
VLSI training PPT, vinay
VLSI training PPT, vinayVLSI training PPT, vinay
VLSI training PPT, vinay
thefacebooktube2023
 
VLSI Design- Guru.ppt
VLSI Design- Guru.pptVLSI Design- Guru.ppt
VLSI Design- Guru.ppt
Ram Pavithra Guru
 
Vlsi
VlsiVlsi
Vlsi physical design-notes
Vlsi physical design-notesVlsi physical design-notes
Vlsi physical design-notes
Dr.YNM
 
Presentation on Behavioral Synthesis & SystemC
Presentation on Behavioral Synthesis & SystemCPresentation on Behavioral Synthesis & SystemC
Presentation on Behavioral Synthesis & SystemC
Mukit Ahmed Chowdhury
 
System on Chip Design and Modelling Dr. David J Greaves
System on Chip Design and Modelling   Dr. David J GreavesSystem on Chip Design and Modelling   Dr. David J Greaves
System on Chip Design and Modelling Dr. David J Greaves
Satya Harish
 
3DD 1e 31 Luglio Apertura
3DD 1e 31 Luglio Apertura3DD 1e 31 Luglio Apertura
3DD 1e 31 Luglio Apertura
Marco Santambrogio
 

Similar to Electronics.ppt (20)

Digital Design Flow
Digital Design FlowDigital Design Flow
Digital Design Flow
 
VLSI unit 1 Technology - S.ppt
VLSI unit 1 Technology - S.pptVLSI unit 1 Technology - S.ppt
VLSI unit 1 Technology - S.ppt
 
Wi Fi documantation
Wi Fi documantationWi Fi documantation
Wi Fi documantation
 
Hierarchical design and design abstraction
Hierarchical design and design abstractionHierarchical design and design abstraction
Hierarchical design and design abstraction
 
RCW@DEI - Design Flow 4 SoPc
RCW@DEI - Design Flow 4 SoPcRCW@DEI - Design Flow 4 SoPc
RCW@DEI - Design Flow 4 SoPc
 
VLSI- Unit I
VLSI- Unit IVLSI- Unit I
VLSI- Unit I
 
Gourp 12 Report.pptx
Gourp 12 Report.pptxGourp 12 Report.pptx
Gourp 12 Report.pptx
 
Vlsi Summer training report pdf
Vlsi Summer training report pdfVlsi Summer training report pdf
Vlsi Summer training report pdf
 
UNIT 1.docx
UNIT 1.docxUNIT 1.docx
UNIT 1.docx
 
Co question bank LAKSHMAIAH
Co question bank LAKSHMAIAH Co question bank LAKSHMAIAH
Co question bank LAKSHMAIAH
 
introduction to cmos vlsi
introduction to cmos vlsi introduction to cmos vlsi
introduction to cmos vlsi
 
VLSI Physical Design Automation.ppt
VLSI Physical Design Automation.pptVLSI Physical Design Automation.ppt
VLSI Physical Design Automation.ppt
 
VLSI UNIT-1.1.pdf.ppt
VLSI UNIT-1.1.pdf.pptVLSI UNIT-1.1.pdf.ppt
VLSI UNIT-1.1.pdf.ppt
 
VLSI training PPT, vinay
VLSI training PPT, vinayVLSI training PPT, vinay
VLSI training PPT, vinay
 
VLSI Design- Guru.ppt
VLSI Design- Guru.pptVLSI Design- Guru.ppt
VLSI Design- Guru.ppt
 
Vlsi
VlsiVlsi
Vlsi
 
Vlsi physical design-notes
Vlsi physical design-notesVlsi physical design-notes
Vlsi physical design-notes
 
Presentation on Behavioral Synthesis & SystemC
Presentation on Behavioral Synthesis & SystemCPresentation on Behavioral Synthesis & SystemC
Presentation on Behavioral Synthesis & SystemC
 
System on Chip Design and Modelling Dr. David J Greaves
System on Chip Design and Modelling   Dr. David J GreavesSystem on Chip Design and Modelling   Dr. David J Greaves
System on Chip Design and Modelling Dr. David J Greaves
 
3DD 1e 31 Luglio Apertura
3DD 1e 31 Luglio Apertura3DD 1e 31 Luglio Apertura
3DD 1e 31 Luglio Apertura
 

Recently uploaded

What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
GeorgeMilliken2
 
Leveraging Generative AI to Drive Nonprofit Innovation
Leveraging Generative AI to Drive Nonprofit InnovationLeveraging Generative AI to Drive Nonprofit Innovation
Leveraging Generative AI to Drive Nonprofit Innovation
TechSoup
 
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) CurriculumPhilippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
MJDuyan
 
B. Ed Syllabus for babasaheb ambedkar education university.pdf
B. Ed Syllabus for babasaheb ambedkar education university.pdfB. Ed Syllabus for babasaheb ambedkar education university.pdf
B. Ed Syllabus for babasaheb ambedkar education university.pdf
BoudhayanBhattachari
 
clinical examination of hip joint (1).pdf
clinical examination of hip joint (1).pdfclinical examination of hip joint (1).pdf
clinical examination of hip joint (1).pdf
Priyankaranawat4
 
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdfবাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
eBook.com.bd (প্রয়োজনীয় বাংলা বই)
 
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
สมใจ จันสุกสี
 
math operations ued in python and all used
math operations ued in python and all usedmath operations ued in python and all used
math operations ued in python and all used
ssuser13ffe4
 
Constructing Your Course Container for Effective Communication
Constructing Your Course Container for Effective CommunicationConstructing Your Course Container for Effective Communication
Constructing Your Course Container for Effective Communication
Chevonnese Chevers Whyte, MBA, B.Sc.
 
How to deliver Powerpoint Presentations.pptx
How to deliver Powerpoint  Presentations.pptxHow to deliver Powerpoint  Presentations.pptx
How to deliver Powerpoint Presentations.pptx
HajraNaeem15
 
Film vocab for eal 3 students: Australia the movie
Film vocab for eal 3 students: Australia the movieFilm vocab for eal 3 students: Australia the movie
Film vocab for eal 3 students: Australia the movie
Nicholas Montgomery
 
How to Setup Warehouse & Location in Odoo 17 Inventory
How to Setup Warehouse & Location in Odoo 17 InventoryHow to Setup Warehouse & Location in Odoo 17 Inventory
How to Setup Warehouse & Location in Odoo 17 Inventory
Celine George
 
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
PECB
 
The basics of sentences session 6pptx.pptx
The basics of sentences session 6pptx.pptxThe basics of sentences session 6pptx.pptx
The basics of sentences session 6pptx.pptx
heathfieldcps1
 
Main Java[All of the Base Concepts}.docx
Main Java[All of the Base Concepts}.docxMain Java[All of the Base Concepts}.docx
Main Java[All of the Base Concepts}.docx
adhitya5119
 
UGC NET Exam Paper 1- Unit 1:Teaching Aptitude
UGC NET Exam Paper 1- Unit 1:Teaching AptitudeUGC NET Exam Paper 1- Unit 1:Teaching Aptitude
UGC NET Exam Paper 1- Unit 1:Teaching Aptitude
S. Raj Kumar
 
How to Create a More Engaging and Human Online Learning Experience
How to Create a More Engaging and Human Online Learning Experience How to Create a More Engaging and Human Online Learning Experience
How to Create a More Engaging and Human Online Learning Experience
Wahiba Chair Training & Consulting
 
Solutons Maths Escape Room Spatial .pptx
Solutons Maths Escape Room Spatial .pptxSolutons Maths Escape Room Spatial .pptx
Solutons Maths Escape Room Spatial .pptx
spdendr
 
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptxNEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
iammrhaywood
 
The History of Stoke Newington Street Names
The History of Stoke Newington Street NamesThe History of Stoke Newington Street Names
The History of Stoke Newington Street Names
History of Stoke Newington
 

Recently uploaded (20)

What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
What is Digital Literacy? A guest blog from Andy McLaughlin, University of Ab...
 
Leveraging Generative AI to Drive Nonprofit Innovation
Leveraging Generative AI to Drive Nonprofit InnovationLeveraging Generative AI to Drive Nonprofit Innovation
Leveraging Generative AI to Drive Nonprofit Innovation
 
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) CurriculumPhilippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
Philippine Edukasyong Pantahanan at Pangkabuhayan (EPP) Curriculum
 
B. Ed Syllabus for babasaheb ambedkar education university.pdf
B. Ed Syllabus for babasaheb ambedkar education university.pdfB. Ed Syllabus for babasaheb ambedkar education university.pdf
B. Ed Syllabus for babasaheb ambedkar education university.pdf
 
clinical examination of hip joint (1).pdf
clinical examination of hip joint (1).pdfclinical examination of hip joint (1).pdf
clinical examination of hip joint (1).pdf
 
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdfবাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
বাংলাদেশ অর্থনৈতিক সমীক্ষা (Economic Review) ২০২৪ UJS App.pdf
 
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
คำศัพท์ คำพื้นฐานการอ่าน ภาษาอังกฤษ ระดับชั้น ม.1
 
math operations ued in python and all used
math operations ued in python and all usedmath operations ued in python and all used
math operations ued in python and all used
 
Constructing Your Course Container for Effective Communication
Constructing Your Course Container for Effective CommunicationConstructing Your Course Container for Effective Communication
Constructing Your Course Container for Effective Communication
 
How to deliver Powerpoint Presentations.pptx
How to deliver Powerpoint  Presentations.pptxHow to deliver Powerpoint  Presentations.pptx
How to deliver Powerpoint Presentations.pptx
 
Film vocab for eal 3 students: Australia the movie
Film vocab for eal 3 students: Australia the movieFilm vocab for eal 3 students: Australia the movie
Film vocab for eal 3 students: Australia the movie
 
How to Setup Warehouse & Location in Odoo 17 Inventory
How to Setup Warehouse & Location in Odoo 17 InventoryHow to Setup Warehouse & Location in Odoo 17 Inventory
How to Setup Warehouse & Location in Odoo 17 Inventory
 
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
ISO/IEC 27001, ISO/IEC 42001, and GDPR: Best Practices for Implementation and...
 
The basics of sentences session 6pptx.pptx
The basics of sentences session 6pptx.pptxThe basics of sentences session 6pptx.pptx
The basics of sentences session 6pptx.pptx
 
Main Java[All of the Base Concepts}.docx
Main Java[All of the Base Concepts}.docxMain Java[All of the Base Concepts}.docx
Main Java[All of the Base Concepts}.docx
 
UGC NET Exam Paper 1- Unit 1:Teaching Aptitude
UGC NET Exam Paper 1- Unit 1:Teaching AptitudeUGC NET Exam Paper 1- Unit 1:Teaching Aptitude
UGC NET Exam Paper 1- Unit 1:Teaching Aptitude
 
How to Create a More Engaging and Human Online Learning Experience
How to Create a More Engaging and Human Online Learning Experience How to Create a More Engaging and Human Online Learning Experience
How to Create a More Engaging and Human Online Learning Experience
 
Solutons Maths Escape Room Spatial .pptx
Solutons Maths Escape Room Spatial .pptxSolutons Maths Escape Room Spatial .pptx
Solutons Maths Escape Room Spatial .pptx
 
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptxNEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
NEWSPAPERS - QUESTION 1 - REVISION POWERPOINT.pptx
 
The History of Stoke Newington Street Names
The History of Stoke Newington Street NamesThe History of Stoke Newington Street Names
The History of Stoke Newington Street Names
 

Electronics.ppt

  • 1.
  • 2. Introduction What is VLSI? VLSI (very large-scale integration) is the current level of computer microchip miniaturization and refers to microchips containing in the hundreds of thousands of transistor s. LSI (large-scale integration) meant microchips containing thousands of transistors. What is the Use of VLSI? VLSI APPLICATION. VLSI stands for Very Large Scale Integration. It's used in creating so many chips and circuits on a single mini chip of silicon.
  • 3. Introduction Requirements study specification implementation validation What do I have to design? How do I do it? Have I implemented What I intended to? About any design.. market
  • 4. VLSI SYSTEM DESIGN FLOW V. ANURADHA VLSI Design cycle: VLSI design cycle start with a formal specification of a VLSI chip, follows a series of steps, and eventually produces a packaged chip.
  • 5. Simplified VLSI Design Flows System Specification Functional (Architecture) Design Functional Verification Logic Design Logic Verification Circuit Design Circuit Verification Physical Design Physical Verification Front End Back End Synthesis Phase Layout Phase Circuit Representation Layout Representation Behavioral Representation Logic(Gate-Level) Representation
  • 6. VLSI SYSTEM DESIGN FLOW V. ANURADHA Four Levels of Design Representation Behavioral Representation Logic (Gate-Level) Representation Circuit (Transistor-Level) Representation Layout Representation Functional Blocks, FSM Logic Blocks, Gates Transistor Schematics Physical Devices
  • 7. VLSI Design flow VLSI SYSTEM DESIGN FLOW V. ANURADHA
  • 8. Design Methodology There are two basic types of digital design methodologies Top-Down design methodology Bottom-Up design methodology Top-Down Design Methodology  Define top-level block and identify the sub- blocks  divide sub-block until we come to leaf cells
  • 9. Design Methodology Bottom-Up Design Methodology identify building block that are available for us build a bigger cells using these block continue build a cell until we build top level the A combination of Top-Down and Bottom-Up design are used in today’s digital design top-level
  • 10. Top-Down Design Methodology VLSI SYSTEM DESIGN FLOW V. ANURADHA Top Level Block Sub Block 1 Sub Block 1 Sub Block 1 Leaf Cell Leaf Cell Leaf Cell Leaf Cell Leaf Cell Leaf Cell
  • 11. Bottom-Up Design Methodology Top Level Block Macro Cell 1 Macro Cell 3 Macro Cell 2 Leaf Cell Leaf Cell Leaf Cell Leaf Cell Leaf Cell Leaf Cell
  • 12. Simplified view of VLSI design Flow Top Down (algorithm Bottom Up (physical)
  • 14. System Specification  First step of design process is to lay down the specification of the system.  High level representation of the system.  Factors considered:  Performance,Functionality,Physical dimension,Design technique,Fabrication technology  It is a compromise between market requirements, technological and economical viability.
  • 15. System Specification The end results are specifications of  Size,Speed,Power and Functionality of the VLSI system  Basic architecture
  • 16. Functional Design  Main functional units, Interconnect requirements of the system are identified  The area, power and other parameters of each unit are estimated  The key idea is to specify behavior, in terms of Input,Output,Timing of each unit  The outcome of functional design is usually a timing diagram  This information leads to improvement of the overall design process and reduction of complexity of the subsequent phases
  • 17. Logic Design Design the logic, that is, Boolean expressions,word width, register allocation, etc. The outcome is called an RTL (Register Transfer Level) description. RTL is expressed in a HDL (Hardware Description Language), such as VHDL and Verilog.
  • 18. Circuit Design  The purpose of the circuit design is to develop a circuit representation based on the logic design.  The Boolean expression can be converted into a circuit representation by taking into consideration the speed and power requirements of the original design.  Design the circuit including gates, transistors, interconnections, etc. The outcome is called a netlist.  Circuit simulation is used to verify the correctness and timing of component
  • 19. Physical Design Given a circuit after logic synthesis, to convert it into a layout