EC8072 UNIT IV.pptx

UNIT IV
EMC DESIGN FOR CIRCUITS
AND PCBS
Prepared by
Mrs.R.Ponni , AP / ECE

SYLLABUS
UNIT IV
EMC DESIGN FOR CIRCUITS AND PCBS 9
Noise from Relays and Switches; Nonlinearities in Circuits; Cross
talk in transmission line and cross talk control; Component selection
and mounting; PCB trace impedance; Routing; Power distribution
decoupling; Zoning; Grounding; VIAs; Terminations.
UNIT IV EMIC DESIGN FOR CIRCUITS & PCBS 2
19-08-2023

19-08-2023 UNIT IV EMIC DESIGN FOR CIRCUITS & PCBS 3

PCB Trace:
• It is a running path of copper on a printed circuit board. Through
the traces, current can travel to different areas of the printed
circuit board where the components are placed so that the
desired action can be performed
• Traces on PCB
• Traces are usually of two main type i.e. small and large trace.
1.Small Trace: A small trace on a Printed Circuit Board connects
the Reset pad to any other part of the printed circuit board.
2.Large Trace: It connects the components to the 5V power pin.

Near magnetic field above a packaged
integrated circuit.

• What is Impedance?
• Impedance is the combination of the capacitance and
inductance of a circuit when operated at high frequency.
Though also measured in Ohms, it is somewhat different than
resistance which is a DC characteristic. Impedance is an AC
characteristic, meaning that it is related to frequency, resistance
is not.

About trace:
1.Every trace has series inductance.
2.It is distributed along the trace and is inversely related to the
cross-sectional area of the trace.
3.It is admittedly small, but it is non-zero.
4.Therefore, for fast enough rise times, the impedance it offers
can be significant.

• Every trace has capacitance between the trace and the return
path of the signal on the trace, wherever that return path might
be.
• It is distributed and is related to the width (or diameter) of the
trace and to the dielectric of the material(s) between the trace
and the signal return path.
• It is inversely related to the distance to the return path.
• It is admittedly small, but it is non-zero. Therefore, for fast
enough rise times, the impedance it offers can be significant.
• It is the current path through this capacitance that allows current
to flow as the signal propagates along the trace.

• If we assume that any trace resistance is small in
relation to this distributed inductance and capacitance ,
then we see that every trace looks like a distributed
LC circuit to the driver driving it.
• The (AC) impedance of the trace derives from this
distributed LC circuit

• Unless we have carefully designed the trace and its
environment, this AC impedance is “uncontrolled.”
• That is, the distributed inductance and capacitance can (and
probably does) vary in value from point to point along the trace.
• Therefore, the AC impedance varies from point to point along
the trace.

• There are a few cases where control over this impedance is
important.
• For us board designers this is usually when we want to make
the trace look like a transmission line (so we can terminate it in
its characteristic impedance to avoid reflections.)
• When we do this we have designed a “controlled impedance”
trace or a “controlled impedance” transmission line.

• What is Controlled Impedance?
• Unless you have carefully designed the trace and its environment,
impedance is typically “uncontrolled”, meaning that impedance will
vary in value from point to point along the trace.
• At high frequencies, PCB traces do not behave like simple
connections, controlled impedance helps us ensure that signals are
not degraded as they route around a PCB.
• Essentially, controlled impedance is the matching of substrate
material properties with trace dimensions and locations to ensure the
impedance of a trace’s signal is within a certain percentage of a
specific value.
• Controlled impedance boards provide repeatable high frequency
performance.

When to Use Controlled Impedance
• When a signal must have a particular impedance in order to
function properly, controlled impedance should be used.
• In high frequency applications matching the impedance of PCB
traces is important in maintaining data integrity and signal
clarity.
• If the impedance of the PCB trace connecting two components
does not match the components’ characteristic impedance,
there may be increased switching times within the device or the
circuit. There may also be random errors.

• What Determines Controlled Impedance?
• The characteristic impedance of a PCB trace is typically
determined by its inductive and capacitive reactance,
resistance, and conductance.
• These factors are a function of the physical dimensions of the
trace, the dielectric constant of the PCB substrate material, and
dielectric thickness.
• Typically PCB trace impedance can range from 25 to 125 ohms.

• The impedance value generated from the PCB structure will be
determined by the following factors:
• – Width and thickness of the copper signal trace (top and
bottom)
• – Thickness of the core or prepreg material on either side
of the copper trace
• – Dielectric constant of the core and prepreg material
• – Distance from other copper features

• Controlled Impedance
• “Controlled impedance” in this context means that the
impedance is constant at every point along the trace.
• The primary way we control the impedance of a wire or trace is
to control its geometry and its environment.
• There are three primary (and one secondary) aspects to the
overall geometry that must be controlled:
1.The width of the trace
2.The spacing between the signal trace and the signal return
path (This is one reason why we use planes, it makes
control over this spacing much easier.)
3.The relative dielectric coefficient of the material that
surrounds the trace, and
4.(Secondarily) the thickness of the trace.

• Coaxial cables are excellent examples of controlled impedance
transmission lines where these variables are tightly controlled.
The old “twin lead” cables are also examples of controlled
impedance transmission lines.
• “Controlled impedance” does not imply that these aspects
cannot change along the trace. It means that the
important relationship between them must not change. For
example, if we change the width of a trace, then at least one
other aspect must also change in order to maintain the correct
overall relationship between the four aspects (and therefore
maintain a constant impedance).

• Guard trace separates the two microstrip traces and can be
connected to ground on either or both ends, or left floating.
• The near- and far-end crosstalk voltages induced in the
receptor circuit are due to the superposition of the capacitive
and inductive coupling between the circuits.

POWER DISTRIBUTION &
DECOUPLING
AND
ZONING

NEED FOR DECOUPLING
(i)PCBs contain one or more integrated circuit chips, which require power to
operate.
(ii)These chips have supply pins to connect them to an external power source.
They also have ground pins, which connect them to the ground plane of the
PCB. Between the supply and ground pins, there is a decoupling capacitor,
which serves to smooth out oscillations in the voltage being supplied to the
chip. The opposite end of the decoupling capacitor connects to the ground
plane.
(iii)A decoupling capacitor can act as a charge storage device. When the
integrated circuit (IC) requires additional current, the decoupling capacitor
can provide it through a low inductance path. Because of this, it is best to
place decoupling capacitors close to the IC power pins.

GUIDELINES FOR BOARD‐LEVEL DECOUPLING
• Due to unwanted coupling of Power Sources with subsystems, High
Speed Switching transience Occur.
• Decoupling is the process of preventing undesired coupling between
subsystems via the power supply connections.
• A Capacitor is placed in Shunt to the Power Source (or the Source that
may couple) which will absorb the transient current.

• Boards with closely spaced planes
• • On boards with closely spaced (i.e. less than 0.25 mm) power and ground
planes, the location of decoupling capacitors is not nearly as important as
the inductance associated with their connection to the planes
• Decoupling capacitors should be connected directly to power/ground
planes using vias in or adjacent to the pads.
• It is unnecessary and ineffective to use capacitors with a nominal value
that is less than the board's interplane capacitance.
At low frequencies, higher values of capacitance are desirable.
At high frequencies, connection inductance is much more important than the
nominal value of the capacitor.
• Power supply leads from active devices and decoupling capacitors should
be connected directly to the power and ground planes. No attempt should
be made to connect chip leads directly to a decoupling capacitor.

• Boards with widely spaced planes
• On boards with widely spaced (i.e. greater than 0.5 mm) power and
ground planes, a local decoupling capacitor should be located near
each active device.
If the active device is mounted on the side of the board nearest the
ground plane, the decoupling capacitor should be located near the
power pin.
If the active device is mounted on the side of the board nearest the
power plane, the decoupling capacitor should be located near the
ground pin

Boards with widely spaced planes
• Decoupling capacitors should be connected directly to power/ground
planes using vias in or adjacent to the pads.
• Decoupling capacitors can share a power or ground via with the
active device if this can be accomplished without traces (or with a
traces length less than the power/ground plane spacing).
• • It is unnecessary and ineffective to use capacitors with a nominal
value that is less than the board's interplane capacitance.
• At low frequencies, higher values of ca‐ pacitance are desirable. At
high frequencies, connection inductance is much more important
than the nominal value of the capacitor.

Boards with no power plane
• On boards with no power plane, a local decoupling capacitor should
be located near each active device.
• The inductance of the decoupling capacitor connection between
power and ground should be minimized.
• Two local decoupling capacitors with a few centimeters of space
between them, can be used to provide more effective decoupling
than a single capacitor

ZONING
• First, some definitions:
 EMC = Electromagnetic Compatibility, refers to a device’s ability to
function satisfactorily in its intended electromagnetic environment without
introducing unwanted EM interference to this environment.
 Electromagnetic environment = The sum of all electromagnetic
phenomena which exist in a given volume.
 Electromagnetic environment zone = Volume, limited by a closed surface
(real or imaginary), with a specific electromagnetic environment. The
electromagnetic environment in one zone differ in some respect from
adjacent zones.

ZONING-DEFINITION
Zoning is a technique to reduce noise and EMI of a board
and so as to reduce the need for extra PCB layers.
Zoning is a process of defining the placing of components
in PCB in any trace.

ZONING
 Zoning is a design tool
used to achieve
balanced EMC solutions.
 Zones, zoning and zone
boundaries are described
and illustrated with
simple geometric figures
(see Figures 1 and 2).

ZONING
• Coupling paths and
coupling mechanisms are
easily identified, as all
coupling takes place
through the zone
boundary.

ZONING
• Disturbance can be defined as unintentional
energy leakage, from a source to a victim
creating unwanted reactions, interference.
Disturbance often links via parallel paths.
There are three main coupling types of paths:
field coupling (far field), cross talk (near field)
and conducted coupling. The disturbing signal
often change character and transforms from
one type of path to another with multitude of
combination possibilities in the chain.
• The boundary of a zone shall provide a
reduction of the coupling for one or several
electromagnetic phenomena and can be
implemented in several ways

ZONING
• Coupling reduction may be treated as a generic shield, i. e. a measure that reduces
coupling. The measures can be:
 Insulation (for example by a transformer).
 Separation by distance (field decreases with increasing distance).
 Depolarization (for example two coils which lie in parallel couple more than those which
lie perpendicular to each other).
 Proximity to ground conductors, ground nets, ground planes.
 More or less covering metal enclosure, a shield, (see the next article in the series).
 Filter (work only for wires and cables).

ZONING • One practical application of the zoning concept
on a printed circuit board (PCB) is shown in
Figure :
 Zone 3: Components with the highest
operating frequencies are located at the
furthest distance from the connectors.
 Zone 1: I/O circuits are placed next to the
connectors.
 Zone 2: Circuits working at moderate
operating frequencies are located between
Zone 1 and Zone 3.
 The main zone border to the outer zone
(Zone 0) is drawn in the middle of the filter
array. All connecting wires must be filtered
and, in applicable cases, protected against
over-voltages.
• Connecting wires can be divided into
additional zones depending of the mutual EM-
susceptibility and EM-emission characteristics
they have.
•

Via:
• A via is a copper plated hole that is used to connect two or more layers
within a PCB together.
• Via Fill is a special PCB manufacturing technique used to selectively
and completely close via holes with epoxy.
• There are many instances in which a PCB designer might want to have
a via filled.
Some key benefits are:
• More reliable surface mounts
• Increased assembly yields
• Improved reliability by decreasing the probability of trapped air or
liquids.

• The different layers of the PCB are connected through via of various
types depending upon the requirement.
• Some of the main types of via used in multi layer Printed Circuit
Boards (PCB) are
• Plated through via,
• buried via hole and
• blind via hole.
•

Equivalent circuit of a via

• Each via in a board introduces additional inductance of 1hH and
capacitance up to 0.5pF. Fig.
• 10 shows an equivalent circuit of a via; it consists of a series
inductor and a shunt capacitor and, hence, acts as a low-pass
filter. It can cause signal delays and affect the high-frequency
performance of a board. Hence, vias should be reduced to a
minimum.

• Plated through Via: Plated through via connects the top and
the bottom layer of the multi layer Printed Circuit Boards (PCB).
In order to spot a plated through hole, you can see if the light
passes through it or it is possible to see through it. Plated
through holes are the simplest kind of holes and they only need
drilling or laser light to be drawn. Drilling of plated through holes
is relatively cheap but they may take up more space as
compared with the other types of via or the micro via.

• Blind via hole (BVH): Blind via hole connects the outer layer of the
PCB with the inner layers and it is not possible to see through the
Blind via Hole (BVH) which is the reason why it derives its name.
Blind via Hole is mostly used where the size and space utilization of
the Printed Circuit Boards (PCB) is of importance. Blind via Hole are
difficult to deal in as they require special attention to the depth of the
hole to be made as anything imprecision in this regards can lead to
severe design and operation complications. Due to the difficulty in
handling them, the blind via Holes are not frequently used in the
Printed Circuit Boards (PCB) assembly.
•

• Buried Via Hole: The buried via Hole connects the inner layers
of the Printed Circuit Boards (PCB) while it does not pass
through the outer layer. The buried via holes are made use of
where space utilization is important and high density
applications are to be supported. The buried via holes are
commonly used in HDI technology. Buried via holes are
extremely difficult to work with as they require more time as
compared with the blind via hole and the plated through hole
technology while special care is required in working with them.

• Micro Via: Micro via are another type of via used in the Printed
Circuit Boards (PCB). They are via of very small size less than
few micrometers and are used in highly sophisticated
application. Micro-via are commonly used in flexible Printed
Circuit Boards (PCB) or rigid flex Printed Circuit Boards (PCB).

ROUTING
• Routing traces is one of the most important tasks of the PCB
design process.
...
These include:
1.Route traces as directly as possible and as short as possible.
2.Route similar signal types together. ...
3.When routing ball grid arrays (BGAs) or for other vias, choose
the least complex via option.
• For high-speed signals, there are special considerations such
as material selection and impedance when determining trace
routes and lengths.

ROUTING:
Traces are the “printed” wire electrical connections between electronic
components on a printed circuit board. Traces are added after you place
component footprints and set up nets. (strongly recommended)
Board tracing or routing is the process of placing traces.
When routing your PCB it is recommended to:
1.Maintain a safe distance between traces and pads.
2.Use the widest practical trace width.
3.Minimize trace length.
4.Use trace angles of 90 and 45 degrees.
Pad2Pad allows for drawing traces manually or automatically via the auto
router.

• Drawing Traces
• Drawing Traces is the process of adding circuit traces to your
board design in order to complete the desired electronic
connections.
• You can draw traces as straight lines, polylines, rectangles,
polygons, circles and arcs.
• Although traces generally go on a copper layer, you can use
traces on the silkscreen layer to show the shape of a
component.

• Traces can also be routed automatically using the
software’s auto-router.
• For complicated circuits, it’s generally better to route
traces manually,
• but try the auto-router on simpler designs and see what it
comes up with.
• You can always adjust individual traces later.

• Printed Circuit Board Design Guidelines
• As indicated earlier in these notes, many board designers employ a list of
guidelines to help place components and route traces. Now that we know a little
more about noise sources, antennas and coupling mechanisms on printed circuit
boards, we can take a closer look at some of these design guidelines and
understand why and when they are important. Below is a list of 16 EMC design
guidelines for printed circuit boards along with a short justification for each.
• 1. The lengths of traces carrying high-speed digital signals or clocks should be
minimized.
• High-speed digital signals and clocks are often the strongest noise sources. The
longer these traces are, the more opportunities there will be to couple energy
away from these traces. Remember also, that loop area is generally more
important than trace length. Make sure that there is a good high-frequency
current return path very near each trace.
• 2. The lengths of traces attached directly to connectors (I/O traces) should be
minimized.
• Traces attached directly to connectors are likely paths for energy to be coupled
on or off the board.

• 3. Signals with high-frequency content should not be routed beneath
components used for board I/O.
• Traces routed under a component can capacitively or inductively couple
energy to that component.
• 4. All connectors should be located on one edge or on one corner of a
board.
• Connectors represent the most efficient antenna parts in most designs.
Locating them on the same edge of the board makes it much easier to
control the common-mode voltage that may drive one connector relative to
another.
• 5. No high-speed circuitry should be located between I/O connectors.
• Even if two connectors are on the same edge of the board, high-speed
circuitry located between them can induce enough common-mode voltage
to drive one connector relative to the other resulting in significant radiated
emissions.

• 6. Critical signal or clock traces should be buried between power/ground
planes.
• Routing a trace on a layer between two solid planes does an excellent job
of containing the fields from these traces and prevents unwanted coupling.
• 7. Select active digital components that have maximum acceptable off-chip
transition times.
• If the transition times of a digital waveform are faster than they need to be,
the power in the upper harmonics can be much higher than necessary. If
the transitions times of the logic employed are faster than they need to be,
they can usually be slowed using series resistors or ferrites.
• 8. All off-board communication from a single device should be routed
through the same connector.
• Many components (especially large VLSI devices) generate a significant
amount of common-mode noise between different I/O pins. If one of these
devices is connected to more than one connector, this common-mode
noise will potentially drive a good antenna. (The device will also be more
susceptible to radiated noise brought in on this antenna. )

• 9. High-speed (or susceptible) traces should be routed at least 2X from the board
edge, where X is the distance between the trace and its return current path.
• The electric and magnetic field lines associated with traces very near the edge of
a board are less well contained. Crosstalk and coupling to and from antennas
tends to be greater from these traces.
• 10. Differential signal trace pairs should be routed together and maintain the
same distance from any solid planes.
• Differential signals are less susceptible to noise and less likely to generate
radiated emissions if they are balanced (i.e. they have the same length and
maintain the same impedance relative to other conductors).
• 11. All power (e.g. voltage) planes that are referenced to the same power return
(e.g. ground) plane, should be routed on the same layer.
• If, for example, a board employs three voltages 3.3 volts, 3.3 volts analog and 1.0
volt; then it is generally desirable to minimize the high-frequency coupling
between these planes. Putting the voltage planes on the same layer will ensure
that there is no overlap. It will also help to promote an efficient layout, since the
active devices are unlikely to require two different voltages at any one position on
the board.

• 12. The separation between any two power planes on a given layer should be at
least 3 mm.
• If two planes get too close to each other on the same layer, significant high-
frequency coupling may occur. Under adverse conditions, arcing or shorts may
also be a problem if the planes are too closely spaced.
• 13. On a board with power and ground planes, no traces should be used to
connect to power or ground. Connections should be made using a via adjacent to
the power or ground pad of the component.
• Traces on a connection to a plane located on a different layer take up space and
add inductance to the connection. If high-frequency impedance is an issue (as it
is with power bus decoupling connections), this inductance can significantly
degrade the performance of the connection.
• 14. If the design has more than one ground plane layer, then any connection to
ground at a given position should be made to all of the ground layers at that
position.
• The overall guiding principle here is that high-frequency currents will take the
most beneficial (lowest inductance) path if allowed to. Don't try to direct the flow
of these currents by only connecting to specific planes.

• 15. There should be no gaps or slots in the ground plane.
• It's usually best to have a solid ground (signal return) plane and a layer devoted to this
plane. Any additional power or signal current returns that must be DC isolated from the
ground plane should be routed on layers other than the layer devoted to the ground plane.
• 16. All power or ground conductors on the board that make contact with (or couple to) the
chassis, cables or other good "antenna parts" should be bonded together at high
frequencies.
• Unanticipated voltages between different conductors both nominally called "ground" are a
primary source of radiated emission and susceptibility problems.
• In addition to the 16 guidelines above, board designers often employ guidelines that are
specific to their industry. For example, "Clock generation circuits employing phase-locked
loops should have their own isolated power derived from the board's power through a
#1234 ferrite bead. " These guidelines based on experience can be invaluable to the
knowledgeable board designer. However, these same guidelines applied to other designs
with no concept of where they came from or why they work can result is wasted effort and
non-functional boards. It is very important to understand the basic physics behind each
and every guideline being applied.
• It is also important to identify the potential noise sources, antennas and coupling paths
with every single design you evaluate. The best design won't be the one that complies
with the most guidelines. The best design is the one that meets all of the specifications
with the lowest cost and highest reliability.

• Let us continue our discussion on the good PCB Layout techniques
which help the engineers to develop a noise free PCBs thus helping
in compliance.
•
• 1. Never try to place the power circuitry near to oscillators.
Especially, the passive components like the conductors must be kept
away from clock circuits. The frequency components of the crystal
clock also called the harmonics can get coupled easily and
propagate to parts of the circuit. Especially, unintentional noise on
the power supply is a kill.
• 2. The above point applies to the high frequency traces and fast
switching PWMs. Try to route them away from the power circuitry.

• 3. Follow the 20H rule.
• 20H rule helps to reduce the emission from the board. When
we say, 20H, we are talking about the extent to which ground
plane must extend beyond power plane. 'H' is the distance
between the two layers. So, this indicates that power plane
should never extend towards the edge of the board. The
minimum it can be from the edge is 20H away from the ground
plane.

• Follow the 3W rule.
• If two traces, one aggressor and one victim are to be run
parallel on a single layer, to avoid cross talk between them
ensure that trace-to-trace center points get separated by 3W.
Here, 'W' is the width of the trace on the PCB. While following
the 3W rule, designers must ensure that signals are not run
parallel for longer distances. For designer crippled with board
space these days, achieving the 3W is always a huge task. so,
most designers do not prefer parallelism.

• Cross-talk is capacitive coupling of signals from one circuit track
to another. This can occur when a high-frequency track is
running parallel to a susceptible track.
• Cross-talk flux and associated capacitive coupling can be
reduced by 70 per cent if the two tracks are separated by a
distance of 3W, where W is the width of the traces (measured
from trace centre). This will cause track flux to terminate on the
ground plane below rather than on adjacent tracks

• 5. Try to route the power and ground as radial as possible. This
is to ensure that there are no sharp edges and hence resulting
in reflections and radiation.
• 6. Always prefer to have planes for the power supply, even if
current doesn't demand a plane, prefer to have it. This helps
improve the inductance of the power supply rail and helps to
reduce the radiation from the trace.
7. Please, follow the recommended footprint to create a
footprint for the component. Ensure that enough tolerance is
provided as indicated in the dimensions.
8. Ensure that you design your PCB Layout keeping the DFM
(Design for Manufacturing) recommendations in mind.

TERMINATION

What Is PCB Trace Termination?
• In simple terms, PCB trace termination is the process of
matching the PCB trace impedance to those of the driver.
Usually, this is done by placing resistors in specific
configurations along the PCB trace. The value of the resistor is
chosen according to how the resistor is placed along the PCB
trace.

Why PCB Trace Termination Is Important?
• Electronics has evolved rapidly much to the delight of consumers. Gadgets are
competing for speed while the form factor is shrinking at each iteration. For PCB
designers, it means dealing with high-speed signals more often than ever.
• High-speed signals are prone to reflection when a mismatch of impedance occurs
between the driver and the PCB trace. You could imagine waves traveling
furiously to the shore and crashing on the rocks. The reflection subsequently
distorts the upcoming data and creates an issue with signal integrity.
• It’s never wise to assume that the path of a high-speed signal ends at the
receiver as there is a chance for impedance mismatch. Rather than taking
chances, it is better to terminate the PCB trace to ensure the impedance of the
driver matches the impedance of the PCB trace. When both impedance is
matched, reflection does not occur.

• Common PCB Trace Termination Techniques
• There are a few termination techniques that you can use to ensure
high-speed signals on your PCB suffer from no reflection or
distortion on the trace.
• 1. Series Termination
• The series termination is an often-used technique.
• It is performed by placing a terminating resistor in between the driver
and the receiver.
• The resistor is placed near to the driver, and its value is chosen so
that the combined impedance of the resistor and driver matches
those of the PCB trace.
• Advantage of series termination is that there is no DC value
present, which means there’s no unnecessary power waste on the
resistor.
• Drawback of this technique is that it doesn’t eliminate the first
reflection on the far end. Also, it can be hard to estimate the value of
the resistor so that subsequent reflection does not affect the integrity
of the signal.

• 2. Parallel Termination
• Parallel termination is the most commonly used termination
technique for high-speed signals.
• It involves placing a shunt resistor in parallel to the receiver.
• In this technique, you’ll need to place the termination resistor as
close to the receiver.
• The value of the resistor must match the impedance of the line for
the termination to be effective.
• This is a simple technique, where the resistor is connected to either
Vcc or GND.
• With parallel termination, all reflections at the far end are absorbed
by the matching resistor.
• Disadvantage of this technique is that a small amount of current
will flow through the resistor, increasing the power dissipation.

3. Thevenin Termination
• Thevenin termination has a very similar concept to parallel
termination, except it uses two resistors instead of one.
• In Thevenin termination, two resistors where the parallel
resistance matches the impedance of the trace.
• While both the resistors could function as a pull-up or pull-down
for the signal, Thevenin termination results in constant draining
of current on regardless of the state of the driver.

Single Ended Terminations
• When high speed signals arrive at an impedance discontinuity point, some of
the energy of the signal will reflect and travel back to the generator. Signal
reflections are a major cause of noise and radiation on PCBs, and should be
avoided.

• To avoid reflections, high speed signals should see a constant impedance
from the driver to the receiver.
• This requires not just to keep the impedance of the PCB trace constant,
which is achieved using microstrip or stripline configurations, but also to
make the PCB trace characteristic impedance (Z0 ) equal to the driver circuit
output impedance (ZOUT ) and the receiver circuit input impedance (ZIN ).
• This condition is generally not met by default because driver circuits
usually have low output impedances and receiver circuits usually have high
input impedance.

Fig. Typical waveform at the receiver for terminated and un-terminated traces

• In order to avoid reflections at the driver and receiver ends of a PCB
trace, their impedance should match the characteristic impedance of
the PCB trace.
• This technique is called “termination” and achieved using resistors
connected at driver / receiver ends of the PCB trace.

Single Ended Termination Techniques

• Series terminations require the resistor to be connected physically as
close as possible to the driver, and parallel terminations require the
resistors / capacitor to be connected as close as possible to the
receiver.

Differential Terminations
• Just like single ended signals, differential signals must “see” a
differential impedance constant along the transmission line, which
means that driver output impedance should be equal to the differential
pair impedance and to the receiver input impedance. The common
termination techniques used for differential pairs are presented in fig.

• Just like for single ended signals, series terminations require the
resistors to be connected physically as close as possible to the driver,
and parallel, PI and T terminations require the resistors / capacitor to
be connected as close as possible to the receiver.

EC8072 UNIT IV.pptx

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EC8072 UNIT IV.pptx