This document provides information on mapping course outcomes (COs), program outcomes (POs) and program specific outcomes (PSOs) for the subject Digital Electronics. It begins with listing the 12 POs that engineering graduates are expected to achieve. It then provides the 3 PEOs and 3 PSOs for the Electronics and Communication Engineering program. The document maps the 5 COs of the Digital Electronics course to the 12 POs and 3 PSOs, showing the level of contribution of each CO to achieving the outcomes. It also provides a course-PO matrix and course-PSO matrix to summarize this mapping. The document further provides details of the assessment plan, including the assessment tools to be

1. Presentation on CO,PO,PEO,PSO
Mapping
Subject Code : EC8392
Subject Name : DIGITAL ELECTRONICS
Year Sem : II /III
Course Incharge : Mrs.R.PONNI
DEPARTMENT OF
ELECTRONICS AND COMMUNICATION
ENGINEERING

2. • PROGRAMME OUTCOMES:
• Engineering Graduates will be able to:
PO:1.Engineering knowledge:
• Apply the knowledge of mathematics, science, engineering fundamentals, and an
engineering specialization to the solution of complex engineering problems.
PO:2.Problem analysis :
• Identify, formulate, review research literature, and analyze complex Engineering problems
reaching substantiated conclusions using first principles of mathematics, natural sciences,
and engineering sciences.
PO:3. Design/development of solutions:
• Design solutions for complex engineering problems and design system components or
processes that meet the specified needs with appropriate consideration for the public health
and safety, and the cultural, societal, and environmental considerations.
PO:4.Conduct investigations of complex problems:
• Use research-based knowledge and research methods including design of experiments,
analysis and interpretation of data, and synthesis of the information to provide valid
conclusions.
PO:5.Modern tool usage:
• Create, select, and apply appropriate techniques, resources, and modern engineering and IT
tools including prediction and modeling to complex engineering activities with an
understanding of the limitations.
PO:6.The engineer and society:
• Apply reasoning informed by the contextual knowledge to assess societal, health, safety,
legal and cultural issues and the consequent responsibilities relevant to the professional
engineering practice.

3. • PROGRAMME OUTCOMES:
• Engineering Graduates will be able to:
PO:7.Environment and sustainability:
• Understand the impact of the professional engineering solutions in societal and
environmental contexts, and demonstrate the knowledge of, and need for sustainable
development.
PO:8.Ethics:
• Apply ethical principles and commit to professional ethics and responsibilities and norms of
the engineering practice.
PO:9.Individual and team work:
• Function effectively as an individual, and as a member or leader in diverse teams, and in
multidisciplinary settings.
PO:10.Communication:
• Communicate effectively on complex engineering activities with the engineering community
and with society at large, such as, being able to comprehend and write effective reports and
design documentation, make effective presentations, and give
• and receive clear instructions.
PO:11.Project management and finance:
• Demonstrate knowledge and understanding of the engineering and management principles
and apply these to one‘s own work, as a member and leader in a team, to manage projects
and in multidisciplinary environments.
PO:12.Life-long learning:
• Recognize the need for, and have the preparation and ability to engage in independent and
life-long learning in the broadest context of technological change.

4. PROGRAMME EDUCATIONAL OBJECTIVES
• PEO1: To enable graduates to pursue research, or have
a successful career in academia or industries associated
with Electronics and Communication Engineering, or as
entrepreneurs.
• PEO2: To provide students with strong foundational
concepts and also advanced techniques and tools in
order to enable them to build solutions or systems of
varying complexity.
• PEO3: To prepare students to critically analyze existing
literature in an area of specialization and ethically
develop innovative and research oriented
methodologies to solve the problems identified.

5. PROGRAM SPECIFIC OBJECTIVES (PSOs)
• PSO:1. To analyze, design and develop solutions
by applying foundational concepts of
electronics and communication engineering.
• PSO:2. To apply design principles and best
practices for developing quality Products for
scientific and business applications.
• PSO:3. To adapt to emerging information and
communication technologies (ICT) to
innovate ideas and solutions to existing/novel
problems.

6. CO vs PO vs PSO General Mapping
S.NO Course Outcome (CO) POs PSOs
CO:1 Use digital electronics in the
present contemporary world
1,2,3,4 1
CO:2 Design various combinational
digital circuits using logic gates
1,2,3,4,5,6,11,12 2
CO:3 Do the analysis and design
procedures for synchronous and
asynchronous sequential circuits
1,2,3,4,5,6,11,12 2
CO:4 Use the semiconductor memories
and related technology
1,2,3,4,5,6,11,12 2,3
CO:5 Use electronic circuits involved in
the design of logic gates
1,2,3,4,5,6,11,12 2,3

7. C0-PO MAPPING
COs PROGRAM OUTCOMEs – (Pos)
PO-1 PO-2 PO-3 PO-4 PO-5 PO-6 PO-7 PO-8 PO-9 PO-10 PO-11 PO-12
C0:1
2 2 1 2 - - - - - - - -
C0:2
2 2 1 2 2 2 - - - - 1 1
C0:3
2 2 1 2 2 2 - - - - 1 1
C0:4
2 2 1 2 2 2 - - - - 2 2
C0:5
2 2 1 2 2 2 - - - - 2 2
Averag
e
2 2 1 2 1.6 1.6 - - - - 1.2 1.2

8. C0-PSO MAPPING
S.NO Course Outcomes
(COs)
Program Specific Outcomes (PSOs)
PSO-1 PSO-2 PSO-3
C0:1 Use digital electronics in the
present contemporary world 2 - -
C0:2 Design various combinational
digital circuits using logic gates 2 2 -
C0:3 Do the analysis and design
procedures for synchronous and
asynchronous sequential circuits
2 2 -
C0:4 Use the semiconductor memories
and related technology 2 2 2
C0:5 Use electronic circuits involved in
the design of logic gates 2 2 2
Average:
2 1.6 0.8
Contribution: 1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High) -: None

9. COURSE ARTICULATION MATRIX:
PROGRAM OUTCOMEs – (Pos) PSOs
PO-1 PO-2 PO-3 PO-4 PO-5 PO-6 PO-7 PO-8 PO-9 PO-10 PO-11 PO-12 PSO-1 PSO-2 PSO-3
CO:1
2 2 1 2 - - - - - - - - 2 - -
CO:2
2 2 1 2 2 2 - - - - 1 1 2 2 -
CO:3
2 2 1 2 2 2 - - - - 1 1 2 2 -
CO:4
2 2 1 2 2 2 - - - - 2 2 2 2 2
CO:5
2 2 1 2 2 2 - - - - 2 2 2 2 2
Avera
ge 2 2 1 2 1.6 1.6 - - - - 1.2 1.2 2 1.6 0.8

10. Course Name Digital Electronics
Course Code EC 8392
Session of Course 45 Periods
L T P C 3 0 0 3
Semester III
Batch 2019-2023
Faculty Name Mrs.R.Ponni
COURSE INCHARGES:

11. Level of Attainment using Grading Scale
Grading Scale Level of Attainment
Score < 50 %
1
50% to < 70%
2
>= 70%
3

12. CO Co Description Weightage CAT1 CAT2 MODEL Assign1. PCE AU
CO1 Use digital electronics in the
present contemporary world
20 √ √ √ √
CO2 Design various
combinational digital circuits
using logic gates
20 √ √ √ √
CO3 Do the analysis and design
procedures for synchronous
and asynchronous sequential
circuits
40 √ √ √ √
CO4 Use the semiconductor
memories and related
technology
10 √ √ √ √
CO5 Use electronic circuits
involved in the design of
logic gates
10 √ √
Target : ____% of students to score > _____% of marks – CO attainment.
Percentage of CO Attainment Level

13. Assessment - 1
Paper Quality Matrix ( APQM)
PART Level-1 Level-2 Level-3 Level-4 Level-5 Level-6
A 3,5,8,9,10 1,2,4,6,7 - - - -
B 11.a&b 13.a&b 12.a&b 14.a & b 15.a&b -
C 16.a & b
TOTAL 23 23 13 13 13 15
Distribution

14. Assessment Test -1 (Part – A)
Q.No
.
Question Marks CO BL PI
1 Subtract (1010), from (1000), using 2’s complement
method. Subtract by direct
method also and compare.
2 CO1 L-2 1.3.1
2 Interpret the function Y=A+BC in canonical POS. 2 CO1 L-2 1.4.1
3 Convert the hexadecimal number 64CD to binary, and
then convert it from binary to octal.1
2 CO1 L-1 3.1.4
4 State De-Morgans’s theorem and mention its use 2 CO1 L-2 1.2.1
5 Find the complement of F=wx +yz and then show that
FF’=0
2 CO1 L-1 2.2.3
6 Illustrate the full adder circuit. 2 CO2 L-2 3.1.6
7 Show the logic diagram of a full subtractor 2 CO2 L-2 3.1.6
8 What is meant by decoder circuit? 2 CO2 L-1 3.2.2
9 What is meant by magnitude circuit? 2 CO2 L-1 2.2.3
10 What is priority encoder? 2 CO2 L-1 3.2.2

15. Assessment Test -1 (Part –B & C)
Q.No. Question Marks CO BL PI
11.a. (i) Find the MSOP representation for F(A,B,C,D,E)= Σm(1,4,6,10, 20,22, 24,26)
+Σd(0,11,16,27) using K-Map. Draw the circuit of the minimal expression
using only NAND gates.
7 CO1 L-1 2.1.3
11.a. (ii) Implement Y= (AB)’+A+(B+C)’using NOR gates only. 6 CO1 L-1 2.1.3
11.b. (i) Simplify the Boolean expression using laws and rules of Boolean algebra Z =
[ AB’(C+BD) + (AB)’]C.
7 CO1 L-1 1.2.1
11.b. (ii) Define SOP and POS term. Convert the Boolean expression AB’C + B’CD +
AC’D to SOP form.
6 CO1 L-1 1.2.1
12.a. (i) Express the Boolean function F = XY + XZ in product of Maxterm 6 CO1 L-3 1.2.1
12.a. (ii) Solve and Reduce the following function using K-map technique. f (A, B, C,
D) = π (0, 3, 4, 7, 8, 10, 12, 14) + d (2, 6)
7 CO1 L-3 2.1.3
12.b. (i) State and prove De morgan’s theorem 3 CO1 L-3 1.2.1
12.b. (ii) Solve MinSOP and Max POS for F=b’c’d + bcd+acd’+ a’b’c+ a’bc’d. 10 CO1 L-3 2.1.3
13.a.(i) Summarize about don’t care conditions 6 CO1 L-2 2.1.3
13.a(ii) Relate the Boolean function D = (A’ + B) (B’ + C) as
(a) POS form (b) SOP form
7 CO1 L-2 2.1.3
13.b.(i) Implement the following Boolean function using 8 x 1 Multiplexer.
F(A,B,C,D)= Σm (1, 3, 4, 11, 12, 13, 14, 15)
7 CO2 L-2 2.4.1
13.b.(ii) Explain the concept of carry look ahead adder with neat logic diagram. 6 CO2 L-2 2.2.3
14.a. Examine the operation of BCD to Excess -3 code converter 13 CO2 L-4 2.2.3
14.b Examine and explain the operation of 3-bit magnitude comparator. 13 CO2 L-4 2.2.3
15.a. With neat circuit diagram, explain the working principle of 4-bit parallel
Adder/Subtractor.
13 CO2 L-5 2.4.2
15.b Design a BCD adder and explain its function with an example 13 CO2 L-5 2.4.2
16.a What are the advantages of using Quine McCluskey method? Estimate the
Minimal sum of products for the Boolean expression f(A, B,C, D) =Σm(1, 2, 3,
9, 12,13,14) + Σd(0,7,10, 15) using Quine McCluskey Tabular method.
15 CO1 L-6 2.4.1
16.b Design an even parity generator, that generates an even parity bit for every 15 CO2 L-6 2.2.3

16. Assessment - 2
Paper Quality Matrix ( APQM)
PART Level-1 Level-2 Level-3 Level-4 Level-5 Level-6
A 1,3,4,8,9 2,5,6,7,10 - - - -
B 11.a&b 13.a&b 15.a&b 12.a & b 14.a&b -
C - - - - - 16.a & b
TOTAL 23% 23% 13% 13% 13% 15%
Distributio
n

17. Assessment Test -2 (Part – A)
Q.No. Question Marks CO BL PI
1 How to construct a T FlipFlop from a D-FF? 2 CO3 L-1 2.1.1
2 Contrast the differences between Mealy and
Moore State machines.
2 CO3 L-2 2.2.4
3 How many flipflops will be complemented in a
10-bit ripple counter to reach the next count
after this count of ‘1001100111’?
2 CO3 L-1 2.1.3
4 Define shift register. 2 CO3 L-1 2.2.3
5 Illustrate the circuit diagram of 4-bit ring
counter using D-flip flop.
2 CO3 L-2 2.1.3
6 Distinguish synchronous and asynchronous
sequential circuits.
2 CO3 L-2 2.2.4
7 Compare the logics of synchronous counter and
ripple counter.
2 CO3 L-2 2.2.4
8 What is critical race? 2 CO3 L-1 1.3.1
9 List the types of hazards. 2 CO3 L-1 1.3.1
10 Compare fundamental mode circuit and pulse 2 CO3 L-2 2.2.4

18. Assessment Test -2 (Part –B & C)
Q.No. Question Marks CO BL PI
11.a. (i)
11.a. (ii)
11.b. (i)
11.b. (ii)
12.a. (i)
12.a. (ii)
12.b. (i)
12.b. (ii)
13.a.(i)
13.a(ii)
14.a
14.B
15.A
15.B
16.A

19. MODEL
Paper Quality Matrix ( APQM)
PART Level-1 Level-2 Level-3 Level-4 Level-5 Level-6
A 1,2 3,4 5,6 7,8 9,10
B 11.a &b 12. a &b 14. a &b 13. a &b 15. a &b
C 16. a &b
TOTAL 17 % 17 % 17 % 17 % 17 % 15 %
Distribu
tion

20. MODEL EXAM (Part – A)
Q.No. Question Marks CO BL PI
1
2
3
4
5
6
7
8
9
10

21. MODEL EXAM (Part –B & C)
Q.No. Question Marks CO BL PI
11.a. (i)
11.a. (ii)
11.b. (i)
11.b. (ii)
12.a. (i)
12.a. (ii)
12.b. (i)
12.b. (ii)
13.a.(i)
13.a(ii)
14.a
14.B
15.A
15.B
16.A