This document discusses semiconductor manufacturing and data analysis. It covers the key steps in manufacturing which are silicon, wafer fabrication, chip making, and final product. It also describes the main data sources used like WIP, equipment, and measurements. The goal of data analysis is yield improvement to reduce costs and increase revenue. Low yielding wafers are mapped and analyzed to identify issues.

1. Puwen Ning
Data Analysis for Semiconductor
Manufacturing

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Semiconductor Manufacturing In A Nutshell
1. Silicon
4. Chip
5. Product3. Wafer
2. Manufacturing

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Semiconductor Manufacturing Data Sources
WIP: Product Visibility
• Wafer fab, Probe, FM and Test WIP
• Foundry, Subcon and In-transit WIP
• Starts/Ships/Inventory/History
• Wafer Slot Tracking
• Cycle time/planning Information
• Process Flow
Equipment: Performance Optimization
• Equipment State Changes
• Alarms and Events
• Process Data Detail and Summary
• Chamber Wafer Tracking
• Maintenance Events
Measurement: Yield Acceleration
• In-process Metrology Readings
• Class Probe Results
• Unit Probe Results
• Final Test Results
• Coordinate Mapping
Data Presentation:
•Information Integration
Enterprise Data Warehouse
AIM Extract/Transform/Load Integration Layer
AIM Manufacturing Data Distribution Layer
Wafer fab  Probe  Final Assembly  Test

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SMIC Confidential
All copyrights and IP belong to SMIC. For reference only and may not be copied or distributed without written permission from SMIC.
SMIC shall not be responsible for any party’s reliance on these materials.
Data Analysis for Yield Improvement
• The ideal goal of the semiconductor manufacturing processes is to make each
individual integrated circuit perform to specification
• However, physical defects induced during processing and variation in processing
causes some individual integrated circuits to fail to perform to specification
• The ratio of individual integrated circuits that perform to specification, “good”, to the total
number of circuits is called “yield”
• In addition to monitoring and controlling processing, Yield Analysis Engineering is key
to identifying why integrated circuits do not perform to specification
Low Yield Wafer AnalysisLow Yield Wafer Map

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SMIC shall not be responsible for any party’s reliance on these materials.
Benefit
Yield Improvement translates to Cost Savings, and
Revenue Increasing

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