Daisy Ingram has over 30 years of experience in RF systems engineering, including 16 years working on millimeter-wave phased array and radar systems. She has expertise in RF payload system design, transceiver module design, and component design for both military and commercial projects. Ingram has led several internal research projects developing new technologies such as MMIC amplifiers, antenna arrays, and receiver systems. She holds an M.S. and B.S. in Electrical Engineering from UCLA.

1. Daisy L. Ingram
(310) 813-0815 (day); (562) 505-4521(cell)
email: daisy.ingram@ngc.com
Qualification
Summary: An award winning design engineer with multi-discipline knowledge including RF payload
system architectural trades, system and sub-system integration, unit and IMA deisign, MMIC
chip and filter design
. 8 years in commercial wireless systems hardware and commercial instrumentation
(<2.5 GHz) frequency synthesizer, spectrum analyzer, noise gain analyzer and high
power amplifier chip, module and system level design
. 16 years in millimeter-wave phased array and missile seeker radar systems,
transceiver modules, subsystems and component design - 60% military projects &
40% commercial projects
. Skilled in all facets of unit, module, sub-system and component design &
project management for communication systems and ISR systems
. Have experience in both military and commercial projects
. Have led Advanced Technology Internal Research and Development (IRAD)
projects; commercial power MMIC and transceiver module development; military
flight hardware deliverables and commercial instrument development projects from
design to production
Education: University of California at Los Angeles
M.S. Degree in Electrical Engineering, June 1986 (GPA: 3.5/4.0)
B.S. Degree in Electrical Engineering, June 1983 (GPA: 3.8/4.0) - Summa Cum Laude
Experience:
Northrop Grumman Aerospace System, One Space Park, Redondo Beach, CA
Senior Staff Engineer, (Oct. 2007 to present)
. Satellite Payload Architectural Trade Studies and Proposals
Performing gain budget analysis and frequency planning to maximize the SFDR of
Payload. Evaluate technology trades and assessing advanced technology maturity for high
performance payload insertion.
Develop non-linear behavior models and algorithms for payload system simulation
of compound spurs based on multiple non-linear components of the RF payload chain from
Antenna to ADC.
. Avionic ISR
IPT lead for Global Hawk Airborne Signals Intelligence payload
. Delivered 200 high SFDR(80dBc) double-Heterodyne Receiver Tuners in 7 years
within budget and on schedule
. Identify architectural weakness and redesign different components to improve unit
producibility and increase yield.
. Advanced System IRAD system architectural trade studies
. ISR reconfigurable architectural trade
. Synthesizer architectural trade
. Led EW 23 to 40GHz Wide-Band Planar Array IRAD to develop a planar
Antenna unit for Band 5 for Threat-Warning Radar of F35 with 1st
pass success
. Led 0.2 to 6GHz ISR Receiver IRAD development to successfully demonstrated better than
<-118dBm spurious for ultra-high dynamic range receiver tuner.
. Led IRAD development of 4-channel affordable chip over PWB receiver tuner unit
Boeing – Integrated Defense Systems, Active Phase Array Antenna Dept, El Segundo,
CA
Sr. System Engineer V, (Jan. 2004 – Oct. 2007)
. Linearized SSPA technology and architectural trade studies for multi-carrier satellite
communications; work involved circuit and subsystem level simulations.
. IRAD Project Lead – Phased array Interconnect Technologies –to develop low-cost high
reliability flip chip and fuzz button interconnect design at millimeter-wave frequency ranges.
. TSAT-subsystem project engineer for down link phased array antenna. Responsibilities
include subsystem architectural trade studies and simulations. SSPA module subsystem
technology and architectural trades, link and gain/power budget optimization.

2. . Multi-octave Wideband Transceiver IRAD- Responsible RF Module Designer
(Modules design completed and delivered in 3 months)
. Flexible Phased Array IRAD – responsible sub-system engineer for transmitter and receiver
modules for commercial phased array systems. Responsibilities include technology and
configuration architectural trade studies, transceiver modules specification definitions,
simulation on GaN Doherty SSPA for a multi-carrier environment at transistor level,
optimization of the link budget to minimize the array DC power consumption, PWB broad
design and HFSS simulation for high density low-cost fuzz button interconnect.
. High Speed Small Weapon Compact Radar Seeker IRAD – Developed advanced low-cost
compact radar seeker using Active Electronic Scan Antenna (AESA) technologies.
Responsible for transceiver module design, power/gain budget and system integration of all
electronic hardware design. Perform the initial phase array architectural trade studies,
subsystems and components specification definitions. Define Antenna Beam Controller,
power switching controller specifications and system configurations; design high power driver
module. Successfully demonstrated Engineering prototype .
. Setup an automated test station for ultra-low phase noise measurement (Ku-Ka band).
Develop SAX Basic & HP script program code for automation of test setup.
. Plan and evaluate state-of-the-art technologies, such as GaN, InPHBT, SiGe, flip-chip
packaging and set direction for future advanced technologies IRAD activities for critical
programs. Jobs include performing technology trade study for missile seeker and satellite
applications.
. IC packaging design for high speed Digital-to-Analog Converter (DAC) chip (SiGe)– HFSS
Simulation for 3 GHz DAC chips
MMCOMM Inc., Torrance CA
Sr. Scientist, (Jan. 2001 – Jan. 2004)
. Responsible Design Engineer for a Ka-Band LMDS outdoor HUB and CPE units –
completed the first engineering prototype
. Responsible for a generic synthesizer product for cost versus frequency plan trade-offs and
mixer spur analysis
. 5 GHz 802.11a, b & g GaAs HBT Wireless LAN power amplifier and VCO design
. Establish MMIC design capability for a start-up commercial wireless company;
responsibilities include low-cost ultra-compact MMIC power device and amplifier designs
(K, Ka-Band); mask layout and procurement; establish on-wafer measurement capability.
. Lead the development effort of a V-band transceiver for commercial wireless video
applications. Perform system architectural trade studies and define component
specifications.;
establish MMIC design & testing capability for start-up commercial wireless companies;
. Design Millimeter-wave modules and modules for commercial wireless applications
(Ku, Ka and V-Band); provide consulting services and training to Junior Design Engineers.
TRW, Electronics & Technology Division, RF Products Center , Redondo Beach, CA
Sr. Section Head/Sr. Dept. Staff Engineer for High Performance Transceiver Section,
(Feb. 1995 – Dec. 2000); Member of Technical Staff III (Dec. 91 – Sept. 92)
. Technical Lead and SPM For a Wide-band Missile Jamming Transceiver Module and
MMIC
Design (K, Ka and V-Band ) - led a team of 12 engineers; work includes system
architectural
trade studies and component spec. definition; device modeling development and V-band
power MMIC design ($ 7M contract)
. Principal Investigator for Low Cost Transmitter IRAD – Develop low cost approach for
MMICs and modules for mmW transceiver applications.
. Associate Principal Investigator for Active Electronic Scanning Antenna(AESA) IRAD
which
led to the final capture of Advanced EHF program.
.Responsibilities include ultra-compact, low power consumption MMIC
receiver chipset and module development for electronic scanned antenna
applications- X to Q-bands ($ 2.9M)
. Principal Investigator and Lead Designer for High Power MMIC IRAD
. Led a team of 3 engineers and one technician for the development of TRW’s

3. first 1W V-band InP HEMT power MMICs
. Have achieved a new record power ~ 1W V-band MMIC PA in a single chip
. Program Manager and Principal Design Engineer for a contract with Naval Research
Laboratory - 1998-1999
. Led a team of 3 engineers to develop 8 Ka-band 6W High Power Modules (2
bands: 30.5 -31.5 GHz & 34 - 35.7 GHz)
. Sub-program manager and Technical Lead for MAFET Thrust III to develop
high power W-band source using quasi-optical approach (1997-1999) ($2.9M)
. Responsibilities include high power W-band MMIC amplifier design using
InP HEMT technology; device modeling for InP power devices; module
electrical design; schedule, cost and manpower management
. The W-band Power MMIC design set a new work record for power and PAE
combination (427mW at 19% PAE). Developed a novel umbrella-like
matching network (patented ).
. Developed the world’s first 4W compact solid-state W-band high power module.
. Developed the world’s first stable W-band planar quasi-optical (PDQ) high
power spatial combiner module with positive gain.
. Developed a novel compact biasing scheme for high power module
. Principal Investigator and Principal Design Engineer for Smart Weapons IRAD - 4 years
. Led a team of ~20 engineers to successfully developed two low-cost,
high-performance highly-integrated multi-functional transceiver MMIC
chipsets and transceivers at Ka-band and W-band.
. Investigated low-cost packaging techniques to reduce module housing cost
(Super-plastic Moding Techniques)
. Work involves system architectural trade-off study, module transition
and interface design, device modeling, cost reduction analysis and
mentoring 5 junior engineers for MMIC design.
. This IRAD developed the following new technologies & record-setting chips:
. MMIC-MIC ribbon/gap compensation techniques for TRW
automated assembly line (this technique was successfully demonstrated in
the 10-W high power module. This technique has now became TRW
standard module design procedure)
. The world’s first 3.5W Ka-band high power MMIC in a
single MMIC chip and a 10 W high power module.
. The world’s first 350 mW W-band GaAs HEMT power MMIC chip
. The world’s first W-band image-reject down-converter chip
. TRW’s first Ka-band rat-race image-reject mixer
. TRW’s first Ka-band InP HEMT LNA
. A novel broadband distributed topology for high power switching
applications
Hughes Aircrafts, Microelectronics Div., Torrance Research Center, Torrance, CA
Member of Technical Staff, (Oct. 1992 – Feb. 1995)
. Led the active device model and passive model development effort for InP
HEMT power process, HBT and flip-chip CPW test cells. Also a team
member of an integrated team to develop the statistical design methodology
and software to facilitate statistical design
. Principal designer for the 23GHz MMIC chipsets (include compact LNA, PA
and BA, etc.) for point-to-point commercial communication system
Rockwell International Corp., Tactical System Div., Radar Technology Dept., Anaheim, CA
Member of Technical Staff IV, (Feb. 1991 – Nov. 1991)
. Responsible Design Engineer for the Master Frequency Generator for ERINT-1 Radar
Guidance Sensor (Now is PAC-3 program)
. Work with RF and Ka-band phase-locked loop modules for missile intercept
program (flight hardware deliverables)
. Interfaced with system engineers, digital and firmware engineers, production
assemblers, technicians, customers and program managers to define module
specifications and carried engineering prototypes from design to production.
. Delivered the first production flight hardware before I left the company
Eaton - Electronic Instrumentation Division, Los Angeles, CA - Commercial Company

4. Design Engineer III, (Feb. 1987 – Dec. 1990)
. Responsible Engineer for Eaton 2075B Noise-Gain Analyzer
. Responsible to lead a team of 3 engineers to develop a new generation of
noise-gain analyzer from engineering prototype development to production.
. Work includes development of both RF modules and system integration of
the entire instrument, as well as development of module and system test and
calibration procedures. This product has been in production since Dec. 1987.
. Responsible Engineer for Eaton 5225A Microwave Synthesizer (10 KHz - 2.56 GHz)
. Led an associate engineer to develop 2 ultra wide-band (> 10 MHz), fast
switching (< 300 nsec.), ultra low phase noise and low spurs (> 100 dBc)
phase-locked loop modules. This instrument exceeded the HP8663 (lowest
phase noise synthesizer ) in phase noise with > 100 dBc spurs
(compatible with HP8442) and achieved FSK switching speed < 300
nsec. simultaneously. 15 instruments were built to specifications in production
pilot run before I left the company.
. Responsible Engineer for Phase-Locked Loop FM/Phase Demodulator (Fc = 21.4 &
221.4 MHz) for Spectrum Analyzer
. Led an associate engineer to develop a wide-band demodulator; the module
was tested to meet all specifications for contract requirement
Proposal Experience: Written 20 proposals; won 16 proposals
Author and co-author of over 15 papers - available upon request
Publications -U.S. Patent 6344777B1 - Highly Efficient Compact Ultra-High Power Source
& Patents: - U.S. Patent 6259335 B1 - Combining Network To Implement A Power Amplifier
Having Monolithically Integrated Planar Interconnect and Transistors
-US. Patent 7489283 - Phased Array Antenna Apparatus and Methods Of
Manufacture
-Trade Secret –Perforated Dielectric Blocks for Frequency Tuning of
Filters (2008)
-Pending Patent – A Reconfigurable Multiple-Channel Transceiver Tuner Architect
that reduces SWaP of the RF payload
Skills: Familiar with the latest CAD tools such as Pulse, SystemView, ADS, Microwave-
Office(MWO), Sonnet EM simulator, HFSS 3-D EM simulator, MathLab,
MWSPICE, Cadence, LabView, Java and C , AUTOCAD and Door.
Honors: Graduated with Summa Cum Laude . member of Phi Beta Kappa
. The National Dean’s List (1983) . Physics Dept. Honor Status(1980)
. EE Dept. Departmental Scholar at UCLA (1982)
. EE Dept. Dean’s Honor List (79, 80 & 81) . TRW RFPC Manager Check Book Award
(1997 & 1998)
. TRW IRAD Silver Award (1996) . TRW Roll of Honor – Millimeter-wave
Power IRAD (1999)
. Pride@Boeing – recognizing exceptional performer (first-pass success) (2005 & 2006)
. Outstanding RDE Award-NGAS (2008, 2010)
. PRP Award (2014)–for Outstanding customer intimacy in meeting quick-turn customer
expectations within the M1 Adj Business Area.
References: Available upon request
Clearance: U.S. Citizenship with Secret Clearance, EBI Clearance, Reserved Level Clearance