This document contains a syllabus for a computer organization course at Matrusri Engineering College. It outlines the topics to be covered in Unit 1, including basic computer organization functions of the CPU, I/O units, and memory. It describes instruction formats, addressing modes, and program control, providing examples. The unit also covers status bit conditions, conditional branch instructions, and types of interrupts.

1. MATRUSRI ENGINEERING COLLEGE
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
SUBJECT NAME: COMPUTER ORGANIZATION (PC 232 CS)
FACULTY NAME: Mrs.B.J.Praveena
Assistant Professor
Dept. of CSE
MATRUSRI
ENGINEERING COLLEGE

2. SYLLABUS MATRUSRI
ENGINEERING COLLEGE
UNIT-1:
BASIC COMPUTER ORGANIZATION: FUNCTIONS OF CPU, I/O
UNITS, MEMORY: INSTRUCTION: INSTRUCTION FORMATS-
ONE ADDRESS, TWO ADDRESSES, ZERO ADDRESSES AND
THREE ADDRESSES AND COMPARISON; ADDRESSING MODES
WITH NUMERIC EXAMPLES: PROGRAM CONTROL- STATUS BIT
CONDITIONS, CONDITIONAL BRANCH INSTRUCTIONS,
PROGRAM INTERRUPTS: TYPES OF INTERRUPTS.

3. UNIT-1:
Basic Computer Organization
MATRUSRI
ENGINEERING COLLEGE

4. Functions of CPU MATRUSRI
ENGINEERING COLLEGE
 Central Processing Unit (CPU) consists of the following features
 CPU is considered as the brain of the computer.
 CPU performs all types of data processing operations.
 It stores data, intermediate results, and instructions (program).
 It controls the operation of all parts of the computer.
 CPU itself has following three components.
 Memory or Storage Unit
 Control Unit
 ALU(Arithmetic Logic Unit)

5. Contd …
MATRUSRI
ENGINEERING COLLEGE
Memory or Storage Unit
 It stores all the data and the instructions required for
processing.
 It stores intermediate results of processing.
 It stores the final results of processing before these results are
released to an output device.
 All inputs and outputs are transmitted through the main
memory.

6. Contd …
MATRUSRI
ENGINEERING COLLEGE
ALU (Arithmetic Logic Unit)
 This unit consists of two subsections
 Arithmetic Section
 Logic Section
Arithmetic Section
 Perform arithmetic operations like addition, subtraction,
multiplication, and division.
 All complex operations are done by making repetitive use of
the above operations.
Logic Section
 Perform logic operations such as comparing, selecting,
matching, and merging of data.

7. Contd …
MATRUSRI
ENGINEERING COLLEGE
Control Unit
 This unit controls the operations of all parts of the computer but
does not carry out any actual data processing operations.
Functions of this unit are
 It is responsible for controlling the transfer of data and
instructions among other units of a computer.
 It manages and coordinates all the units of the computer.
 It obtains the instructions from the memory, interprets
them, and directs the operation of the computer.
 It communicates with Input / Output devices for transfer of
data or results from storage.
 It does not process or store data.

8. Contd …
MATRUSRI
ENGINEERING COLLEGE

9. Functions of I/O Units
MATRUSRI
ENGINEERING COLLEGE
 I/O MODULE FUNCTIONS
 Control & Timing
 CPU Communication
 Device Communication
 Data Buffering
 Error Detection
I/O steps
 CPU checks I/O module device status
 I/O module returns status
 If ready, CPU requests data transfer
 I/O module gets data from device
 I/O module transfers data to CPU

10. Contd …
MATRUSRI
ENGINEERING COLLEGE

11. Contd …
MATRUSRI
ENGINEERING COLLEGE
Input Output Techniques :
 1) Programmed I/O
 2) Interrupt driven I/O
 3) Direct Memory Access (DMA)

12. Contd …
MATRUSRI
ENGINEERING COLLEGE
Programmed I/O
CPU has direct control over I/O for :
 Sensing status
 Read/write commands.
 Transferring data
 CPU waits for I/O module to complete operation.
 Wastes CPU time.

13. Contd …
MATRUSRI
ENGINEERING COLLEGE
Programmed I/O in detail
 CPU requests I/O operation
 I/O module performs operation
 I/O module sets status bits
 CPU checks status bits periodically
 I/O module does not inform CPU directly
 I/O module does not interrupt CPU
 CPU may wait or come back later

14. Contd …
MATRUSRI
ENGINEERING COLLEGE
Interrupt Driven I/O
 Overcomes CPU waiting
 No repeated CPU checking of device
 I/O module interrupts when ready
Interrupt Driven I/O in detail
 CPU issues read command
 I/O module gets data from peripheral while CPU does
other work
 I/O module interrupts CPU
 CPU requests data
 I/O module transfers data

15. Contd …
MATRUSRI
ENGINEERING COLLEGE
Direct Memory Access (DMA)
DMA Function
 Additional Module (hardware) on bus.
 DMA controller takes over from CPU for I/O
 CPU tells DMA controller:-
 Read/Write
 Device address
 Starting address of memory block for data
 Amount of data to be transferred
 CPU carries on with other work
 DMA controller deals with transfer
 DMA controller sends interrupt when finished

16. Functions of Memory
MATRUSRI
ENGINEERING COLLEGE
 A memory is just like a human brain which is used to store data
and instructions.
 Computer memory is the storage space in the computer, where
data is to be processed and instructions required for processing
are stored.
 The memory is divided into large number of small parts called
cells.
 Each location or cell has a unique address, which varies from
zero to memory size minus one.
 Memory is primarily of three types
 Cache Memory
 Primary Memory/Main Memory
 Secondary Memory

17. Contd … MATRUSRI
ENGINEERING COLLEGE
Cache Memory
 Cache memory is a very high speed semiconductor memory which
can speed up the CPU.
 It acts as a buffer between the CPU and the main memory.
 It is used to hold those parts of data and program which are most
frequently used by the CPU.
Advantages
 Cache memory is faster than main memory.
 It consumes less access time as compared to main memory.
 It stores the program that can be executed within a short period
of time.
 It stores data for temporary use.
Disadvantages
 Cache memory has limited capacity.
 It is very expensive.

18. Contd … MATRUSRI
ENGINEERING COLLEGE
Primary Memory (Main Memory)
 Primary memory holds only those data and instructions on
which the computer is currently working.
 It has a limited capacity and data is lost when power is switched
off.
 It is divided into two subcategories RAM and ROM.
Characteristics of Main Memory
 These are semiconductor memories.
 Usually volatile memory.
 Data is lost in case power is switched off.
 It is the working memory of the computer.
 Faster than secondary memories.
 A computer cannot run without the primary memory.

19. Contd …
MATRUSRI
ENGINEERING COLLEGE
Secondary Memory
 This type of memory is also known as external memory or non-
volatile.
 CPU directly does not access these memories, instead they are
accessed via input-output routines.
 The contents of secondary memories are first transferred to the
main memory, and then the CPU can access it. For example,
disk, CD-ROM, DVD, etc.
Characteristics of Secondary Memory
 These are magnetic and optical memories.
 It is known as the backup memory.
 It is a non-volatile memory.
 Data is permanently stored even if power is switched off.
 It is used for storage of data in a computer.
 Computer may run without the secondary memory.
 Slower than primary memories.

20. Instruction Formats
MATRUSRI
ENGINEERING COLLEGE
 A computer will usually have a variety of instruction code
formats.
 The function of the control unit is to interpret each instruction
code and provide the necessary control functions needed to
process the instruction.
 The format of an instruction is usually depicted in a rectangular
box symbolizing the bits of the instruction as they appear in
memory words or in a control register.

21. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The bits of the instruction are divided into groups called fields.
 The most common fields found in instruction formats are:
1. An operation code field that specifies the operation to be
performed.
2. An address field that designates a memory address or a
processor register.
3. A mode field that specifies the way the operand or the
effective address is determined.

22. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The operation code field of an instruction is a group of bits that
define various processor operations, such as add, subtract,
complement, and shift.
 Operations specified by computer instructions are executed on
some data stored in memory or processor registers.
 Operands residing in memory are specified by their memory
address.
 Operands residing in processor registers are specified with a
register address.

23. Contd …
MATRUSRI
ENGINEERING COLLEGE
 Computers have instructions of several different lengths
containing varying number of addresses.
 The number of address fields in the instruction format of a
computer depends on the internal organization of its registers.
 Most computers fall into one of three types of CPU
organizations:
1. Single accumulator organization.
2. General register organization.
3. Stack organization.

24. Contd …
MATRUSRI
ENGINEERING COLLEGE
 In accumulator-type organization, all operations are performed
with an implied accumulator register.
 The instruction format in this type of computer uses one
address field.
 ADD X
 The ADD instruction in this case results in the operation
 AC <-- AC + M [X].

25. Contd …
MATRUSRI
ENGINEERING COLLEGE
 In general register type of organization, the instruction for an
arithmetic addition may be written as
 ADD R1 , R2 , R3
 to denote the operation R 1 <--- R2 + R 3.
 ADD R1 , R2
 would denote the operation R 1 <--- R1 + R2.
 MOV R1 , R2
 denotes the transfer R 1 <-- R2 (or R2 <-- R 1)

26. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The stack-organized CPU have PUSH and POP instructions which
require an address field.
 PUSH X
 will push the word at address X to the top of the stack.
 Operation-type instructions do not need an address field in
stack-organized computers.
 The operation is performed on the two items that are on top of
the stack.
 ADD
 popping the two top numbers from the stack, adding the
numbers, and pushing the sum into the stack.

27. Contd …
MATRUSRI
ENGINEERING COLLEGE
 Evaluate the arithmetic statement
 X = (A + B) * (C + D)

28. Three-Address Instructions
MATRUSRI
ENGINEERING COLLEGE
 ADD R1 , A , B R1 <-- M[ A ] + M[ B ]
 ADD R2 , C , D R2 <-- M[ C ] + M[ D ]
 MUL X , R1 , R2 M[ X ] <-- R 1 * R 2
 The advantage o f the three-address format is that it results
in short programs when evaluating arithmetic expressions.
 The disadvantage is that the binary-coded instructions
require too many bits to specify three addresses.
 An example of a commercial computer that uses three-
address instructions is the Cyber 170.

29. Two-Address Instructions
MATRUSRI
ENGINEERING COLLEGE
 X = (A + B) * (C + D)

30. One-Address Instructions
MATRUSRI
ENGINEERING COLLEGE
 X = (A + B) * (C + D)

31. Zero-Address Instructions
MATRUSRI
ENGINEERING COLLEGE
 X = (A + B) * (C + D)
 TOS stands for Top Of Stack

32. Contd …
MATRUSRI
ENGINEERING COLLEGE

33. Addressing Modes
MATRUSRI
ENGINEERING COLLEGE
 The operation field of an instruction specifies the operation to
be performed.
 The way the operands are chosen during program execution is
dependent on the addressing mode of the instruction.
 The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the
operand is actually referenced.
 There may or may not be an address field in the instruction.
 There are two modes like implied and immediate modes
that need no address field at all.

34. Contd …
MATRUSRI
ENGINEERING COLLEGE
Implied Mode:
 In this mode the operands are specified implicitly in the
definition of the instruction.
 For example, the instruction "complement accumulator“ is an
implied-mode instruction.
 All register reference instructions that use an accumulator are
implied-mode instructions.
 Zero-address instructions in a stack-organized computer are
implied-mode instructions since the operands are implied to be
on top of the stack.

35. Contd …
MATRUSRI
ENGINEERING COLLEGE
Immediate Mode:
 In this mode the operand is specified in the instruction itself.
 An immediate-mode instruction has an operand field rather
than an address field.
 Immediate mode instructions are useful for initializing registers
to a constant value.

36. Contd …
MATRUSRI
ENGINEERING COLLEGE
Register Mode:
 In this mode the operands are in registers that reside within the
CPU.
 The particular register is selected from a register field in the
instruction.
 A k-bit field can specify any one of 2k registers.

37. Contd …
MATRUSRI
ENGINEERING COLLEGE
Register Indirect Mode:
 In this mode the instruction specifies a register in the CPU
whose contents give the address of the operand in memory.
Autoincrement or Autodecrement Mode:
 This is similar to the register indirect mode except that the
register is incremented or decremented after (or before) its
value is used to access memory.
 When the address stored in the register refers to a table of data
in memory, it is necessary to increment or decrement the
register after every access to the table.

38. Contd … MATRUSRI
ENGINEERING COLLEGE
 The effective address is the address of the operand in a computational
type instruction.
Direct Address Mode:
 In this mode the effective address is equal to the address part of the
instruction.
 The operand resides in memory and its address is given directly by the
address field of the instruction.
Indirect Address Mode:
 In this mode the address field of the instruction gives the address
where the effective address is stored in memory.
 Control fetches the instruction from memory and uses its address part
to access memory again to read the effective address.

39. Contd … MATRUSRI
ENGINEERING COLLEGE
 A few addressing modes add the address field of the instruction to
the content of a specific register in the CPU.
 effective address = address part of instruction + content of
CPU register
 The CPU register used in the computation may be the program
counter, an index register, or a base register.

40. Contd … MATRUSRI
ENGINEERING COLLEGE
Relative Address Mode:
 In this mode the content of the program counter is added to the
address part of the instruction in order to obtain the effective
address.
Indexed Addressing Mode:
 In this mode the content of an index register is added to the
address part of the instruction to obtain the effective address.
Base Register Addressing Mode:
 In this mode the content of a base register is added to the
address part of the instruction to obtain the effective address.

41. Numerical Example MATRUSRI
ENGINEERING COLLEGE

42. Contd …
MATRUSRI
ENGINEERING COLLEGE

43. Contd …
MATRUSRI
ENGINEERING COLLEGE

44. Program Control
MATRUSRI
ENGINEERING COLLEGE
 A program control type of instruction change the address value
in the program counter and cause the flow of control to be
altered.
 Program control instructions specify conditions for altering the
content of the program counter

45. Contd …
MATRUSRI
ENGINEERING COLLEGE
TYPICAL PROGRAM CONTROL INSTRUCTIONS

46. Contd … MATRUSRI
ENGINEERING COLLEGE
 The branch and jump instructions are used interchangeably.
 The branch is usually a one-address instruction. It is written in
assembly language as BR ADR, where ADR is a symbolic name
for an address.
 Branch and jump instructions may be conditional or
unconditional.
 An unconditional branch instruction causes a branch to the
specified address without any conditions.
 The conditional branch instruction specifies a condition such as
branch if positive or branch if zero.

47. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The skip instruction is a zero-address instruction.
 A conditional skip instruction will skip the next instruction if the
condition is met.
 The call and return instructions are used in conjunction with
subroutines.
 The compare and test instructions do not change the program
sequence directly.

48. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The compare instruction performs a subtraction between two
operands, but the result of the operation is not retained.
 Certain status bit conditions are set as a result of the
operation.
 The test instruction performs the logical AND of two operands
and updates certain status bits without retaining the result or
changing the operands.
 The status bits of interest are the carry bit, the sign bit, a zero
indication, and an overflow condition.

49. Status Bit Conditions
MATRUSRI
ENGINEERING COLLEGE
 Status bits are also called condition-code bits or flag bits.

50. Contd … MATRUSRI
ENGINEERING COLLEGE
 The four status bits are symbolized by C. S, Z, and V.
 The bits are set or cleared as a result of an operation performed
in the ALU.
 1. Bit C (carry) is set to 1 if the end carry C8 is 1. It is cleared
to 0 if the carry is 0.
 2. Bit S (sign) is set to 1 if the highest-order bit F, is 1. It is set
to 0 if the bit is 0.
 3. Bit Z (zero) is set to 1 if the output of the ALU contains all
O's. !t is cleared to 0 otherwise.
 4. Bit V (overflow) is set to 1 if the exclusive-OR of the last
two carries is equal to 1, and cleared to 0 otherwise.

51. Contd … MATRUSRI
ENGINEERING COLLEGE
 The status bits can be checked after an ALU operation to
determine certain relationships that exist between the values of
A and B .
 If bit V is set after the addition of two signed numbers, it
indicates an overflow condition.
 If Z is set after an exclusive-OR operation, it indicates
that A = B .

52. Overflow
MATRUSRI
ENGINEERING COLLEGE

53. Conditional Branch Instructions MATRUSRI
ENGINEERING COLLEGE

54. Contd … MATRUSRI
ENGINEERING COLLEGE
 The largest unsigned number that can be accommodated in 8
bits is 255.
 The range of signed numbers is between + 127 and - 128.
 The subtraction of two numbers is the same whether they are
unsigned or in signed-2's complement representation.
 Let A = 11110000 and B = 00010100. To perform A - B, the ALU
takes the 2's complement of B and adds it to A .
 The compare instruction updates the status bits as

55. Program Interrupt
MATRUSRI
ENGINEERING COLLEGE
 Program interrupt refers to the transfer of program control from
a currently running program to another service program as a
result of an external or internal generated request.
 Control returns to the original program after the service
program is executed.

56. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The interrupt procedure is quite similar to a subroutine call
except for three variations:
(1) The interrupt is initiated by an internal or external
signal rather than from the execution of an instruction
(except for software interrupt)
(2) The address of the interrupt service program is
determined by the hardware rather than from the
address field of an instruction
(3) An interrupt procedure stores all the information
necessary to define the state of the CPU rather than
storing only the program counter.

57. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The state of the CPU at the end of the execute cycle (when the
interrupt is recognized) is determined from:
1. The content of the program counter
2. The content of all processor registers
3. The content of certain status conditions

58. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The collection of all status bit conditions in the CPU is called a
program status word or PSW.
 The PSW is stored in a separate hardware register and contains the
status information that characterizes the state of the CPU.
 PSW includes the status bits from the last ALU operation and it
specifies the interrupts that are allowed to occur and whether the
CPU is operating in a supervisor or user mode.
 In supervisor or system mode, the CPU is executing a program that is
part of the operating system.
 In user mode, the CPU execute user programs.
 The mode that the CPU is operating at any given time is determined
from special status bits in the PSW.

59. Contd …
MATRUSRI
ENGINEERING COLLEGE
 Some computers store only the program counter when
responding to an interrupt.
 The service program must include instructions to store status
and register content.
 Only a few computers store both program counter and all status
and register content in response to an interrupt.
 In some cases, there exist two sets of processor registers within
the computer, one for each CPU mode.

60. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The hardware procedure for processing an interrupt is very
similar to the execution of a subroutine call instruction.
 The state of the CPU is pushed into a memory stack and the
beginning address of the service routine is transferred to the
program counter.
 The beginning address of the service routine is determined by
the hardware rather than the address field of an instruction.
 The service routine must then determine what caused the
interrupt and proceed to service it.

61. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The CPU does not respond to an interrupt until the end of an
instruction execution.
 Control checks for any interrupt signals before going to the next
fetch phase.
 If an interrupt is pending, control goes to a hardware interrupt
cycle.
 During this cycle, the contents of PC and PSW are pushed onto
the stack.
 The branch address for the particular interrupt is then
transferred to PC and a new PSW is loaded into the status
register.

62. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The last instruction in the service program is a return from
interrupt instruction.
 When this instruction is executed, the stack is popped to
retrieve the old PSW and the return address.
 The PSW is transferred to the status register and the return
address to the program counter.
 Thus, the CPU state is restored and the original program can
continue executing.

63. Types of Interrupts
MATRUSRI
ENGINEERING COLLEGE
 There are three major types of interrupts that cause a break in
the normal execution of a program.
1. External interrupts
2. Internal interrupts
3. Software interrupts

64. Contd … MATRUSRI
ENGINEERING COLLEGE
 External interrupts come from
 input-output (I/O) devices
 A timing device
 A circuit monitoring the power supply
 Any other external source
 Examples that cause external interrupts are
 I/O device requesting transfer of data
 I/O device finished transfer of data
 Elapsed time of an event
 Power failure

65. Contd … MATRUSRI
ENGINEERING COLLEGE
 Internal interrupts also called traps that arise from illegal or
erroneous use of an instruction or data.
 Examples of interrupts caused by Internal error conditions are
 register overflow
 attempt to divide by zero
 An invalid operation code
 stack overflow
 protection violation

66. Contd …
MATRUSRI
ENGINEERING COLLEGE
 The difference between internal and external interrupts is
 The internal interrupt is initiated by some exceptional
condition caused by the program itself rather than by an
external event.
 Internal interrupts are synchronous with the program
while external interrupts are asynchronous.
 If the program is rerun, the internal interrupts will occur
in the same place each time.
 External interrupts depend on external conditions that
are independent of the program being executed at the
time.
 External and internal interrupts are initiated from signals
that occur in the hardware of the CPU.

67. Contd …
MATRUSRI
ENGINEERING COLLEGE
 A software interrupt is initiated by executing an instruction.
 Software interrupt is a special call instruction that behaves like
an interrupt rather than a subroutine call.
 It can be used by the programmer to initiate an interrupt
procedure at any desired point in the program.
 The most common use of software interrupt is associated with a
supervisor call instruction.
 This instruction provides means for switching from a CPU
user mode to the supervisor mode.

68. Contd …
MATRUSRI
ENGINEERING COLLEGE
 Certain operations in the computer are assigned to the
supervisor mode only like a complex input or output transfer
procedure.
 A program written by a user must run in the user mode.
 When an input or output transfer is required, the supervisor
mode is requested by means of a supervisor call instruction.
 This instruction causes a software interrupt that stores
the old CPU state and brings in a new PSW that belongs
to the supervisor mode.
 The calling program must pass information to the operating
system in order to specify the particular task requested.