chuẩn truyền rs232

3. Communication protocol
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Rules for exchanging
those messages
Capabilities Describes
Signaling
Authentication
Error detection and correction
Syntax
Semantics
Synchronization

4. Interface
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Components
Devices
Systems
Programs
Computer vs user
…
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Pieces of Software
Pieces of Hardware
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Pieces of Software
Pieces of Hardware
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5. Example: RS-232
MCUs +
Voltage
Level
shifter
TTXX TTXX
RS-232
cable
PPCCss
RRXX RRXX
Interface: 3-wire: Rx & Tx wires + GND wire
5-wire: Rx, Tx, RTS, DTS + GND
Protocol:
- Voltage level: Logic ‘1’ as -3  -15V
Logic ‘0’ as +3  +15V
- Frame: Start bit
5  8 Data bit
None/Odd/Even Parity bit
1 or 2 Stop bit
- Baudrate: 9600, 11200, …

6. communications system
OSI model
Open Systems Interconnection model

7. communications system
OSI model
Open Systems Interconnection model
Layer 1: Physical Layer
Defines the electrical and physical specifications for devices
RRSS--223322
RRSS--448855
SSPPII
II22CC
Physical Layer

8. A serial I/O
communications
peripheral
Serial
Communications
Interface (SCI)
Full-duplex
Asynchronous
Clock generators
Half-duplex
Synchronous
peripheral systems
(CRT Terminals,
personal computers)
peripheral devices
Shift registers
Data buffers
(A/D or D/A integrated
circuits, serial EEPROMs,
other microcontrollers)
typically do not have
internal clocks for
baud rate generation
and require the
external clock signal
provided by a master
synchronous device
both send and receive at
the same time
devices take turns
transmitting and receiving

9. UART universal asynchronous receiver/transmitter
DUART A dual UART combines two UARTs into a single chip
USART universal synchronous/asynchronous receiver/transmitter

10. [1] http://www.freebsd.org/doc/en/articles/serial-uart/
[2] http://en.wikipedia.org/wiki/Universal_asynchronous_receiver/transmitter
[3] Microchip, PIC16F887 datasheet, part 12.0 p[153-178]
[4] http://en.wikipedia.org/wiki/Communications_protocol
[5] http://en.wikipedia.org/wiki/OSI_model