Gesture based vehicle movements control and alerting system docu
GESTURE BASED VEHICLE MOVEMENTS CONTROL AND
2. Figure Locations
4. Block Diagram
5. Block Diagram Description
7. Schematic Description
8. Hardware Components
9. Circuit Description
10. Software components
a. About Keil
b. Embedded ‘C’
11. Source Code
12. Conclusion (or) Synopsis
13. Future Aspects
Program status word
Data pointer 2 bytes
Interrupt priority control
Interrupt enable control
Timer/counter mode control
Timer/counter 2 control
Timer/counter mode2 control
Timer/counter 0high byte
Timer/counter 0 low byte
Timer/counter 1 high byte
Timer/counter 1 low byte
Timer/counter 2 high byte
Timer/counter 2 low byte
Serial data buffer
Components of Typical Linear Power
An Electrical Transformer
Bridge Rectifier Positive Cycle
Bridge Rectifier Negative Cycle
Three terminal voltage Regulator
Functional Diagram of Microcontroller
Pin Diagram of Microcontroller
External clock drive connections
TL0 and TH0
Connecting Microcontroller to PC
Types of SIM Structures
Smart Card Pin-out
Smart Card Reader
MAX 232 Pin-out
MAX 232 Operating circuit
MAX 232 Logic output
Select Target device
Select device for Target
Copy 8051 startup code
Source group 1
Opened new file
Add files to the source group
Adding files to the source group
Selecting the Ports to be visualized
An embedded system is a special-purpose system in which the computer is completely
encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose
computer, such as a personal computer, an embedded system performs one or a few predefined
tasks, usually with very specific requirements. Since the system is dedicated to specific tasks,
design engineers can optimize it, reducing the size and cost of the product. Embedded systems
are often mass-produced, benefiting from economies of scale.
Personal digital assistants (PDAs) or handheld computers are generally considered
embedded devices because of the nature of their hardware design, even though they are more
expandable in software terms. This line of definition continues to blur as devices expand. With
the introduction of the OQO Model 2 with the Windows XP operating system and ports such as a
USB port — both features usually belong to "general purpose computers", — the line of
nomenclature blurs even more.
Physically, embedded systems ranges from portable devices such as digital watches and
MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems
controlling nuclear power plants.
In terms of complexity embedded systems can range from very simple with a single
microcontroller chip, to very complex with multiple units, peripherals and networks mounted
inside a large chassis or enclosure.
Examples of Embedded Systems:
Avionics, such as inertial guidance systems, flight control hardware/software and other
integrated systems in aircraft and missiles
Cellular telephones and telephone switches
Engine controllers and antilock brake controllers for automobiles
Home automation products, such as thermostats, air conditioners, sprinklers, and security
Household appliances, including microwave ovens, washing machines, television sets,
DVD players and recorders
Personal digital assistant
Computer peripherals such as routers and printers.
Industrial controllers for remote machine operation.
BLOCK DIAGRAM DESCRIPTION
Power Supply Section:
This section is meant for supplying Power to all the sections mentioned above. It
basically consists of a Transformer to step down the 230V ac to 9V ac followed by diodes. Here
diodes are used to rectify the ac to dc. After rectification the obtained rippled dc is filtered using
a capacitor Filter. A positive voltage regulator is used to regulate the obtained dc voltage.
This section forms the control unit of the whole project. This section basically consists
of a Microcontroller with its associated circuitry like Crystal with capacitors, Reset circuitry,
Pull up resistors (if needed) and so on. The Microcontroller forms the heart of the project
because it controls the devices being interfaced and communicates with the devices according to
the program being written.
L293d is to construct with transistors and Motor. It is used to rotate the device.
Motor is an output device; its speed will be varied according to the speed set by the
switches. The speed can be varied by varying the voltage given to the PWM converter (using
keypad). The speed of DC motor is directly proportional to armature voltage and inversely
proportional to flux. By maintaining the flux constant, the speed can be varied by varying the
Accelerometers are acceleration sensors. An inertial mass suspended by springs is acted
upon by acceleration forces that cause the mass to be deflected from its initial position. This
deflection is converted to an electrical signal, which appears at the sensor output. The application
of MEMS technology to accelerometers is a relatively new development.
Here we can store or record our voice in the ic and we can play back that voice
LCD Display Section:
This section is basically meant to show up the status of the project. This project
makes use of Liquid Crystal Display to display / prompt for necessary information.
Hardware Components explanation:
8-bit Microcontroller with 8K Bytes
In-System Programmable Flash
• Compatible with MCS-51® Products
• 8K Bytes of In-System Programmable (ISP) Flash Memory
– Endurance: 1000 Write/Erase Cycles
• 4.0V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of
in-system programmable Flash memory. The device is manufactured using Atmel’s high-density
nonvolatile memory technology and is compatible with the industry- standard 80C51 instruction
set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or
by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with insystem programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution to many embedded
control applications. The AT89S52 provides the following standard features: 8K bytes of Flash,
256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters,
a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to
zero frequency and supports two software selectable power saving modes. The Idle Mode stops
the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue
functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling
all other chip functions until the next interrupt or hardware reset.
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight
TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to
external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives the
code bytes during Flash programming and outputs the code bytes during program verification.
External pullups are required during program verification.
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled
low will source current (IIL) because of the internal pullups. In addition, P1.0 and P1.1 can be
configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2
trigger input (P1.1/T2EX), respectively, as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled
low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address
byte during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX
@ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the
high-order address bits and some control signals during Flash programming and verification.
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled
low will source current (IIL) because of the pullups. Port 3 also serves the functions of various
special features of the AT89S52, as shown in the following table. Port 3 also receives some
control signals for Flash programming and verification.
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO
bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit
DISRTO, the RESET HIGH out feature is enabled.
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external
timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to
external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the
pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
Program Store Enable (PSEN) is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external data
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code
from external program memory locations starting at 0000H up to FFFFH. Note, however, that if
lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC
for internal program executions. This pin also receives the 12-volt programming enable voltage
(VPP) during Flash programming.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
Table 1. AT89S52 SFR Map and Reset Values
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Note that not all of the addresses are occupied, and unoccupied addresses may not be
implemented on the chip. Read accesses to these addresses will in general return random data,
and write accesses will have an indeterminate effect. User software should not write 1s to these
unlisted locations, since they may be used in future products to invoke new features. In that case,
the reset or inactive values of the new bits will always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in Table 2)
and T2MOD (shown in Table 3) for Timer 2. The register pair (RCAP2H, RCAP2L) are the
Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can
be set for each of the six interrupt sources in the IP register.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two
banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and
DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user
should always initialize the DPS bit to the appropriate value before accessing the respective Data
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF
is set to “1” during power up. It can be set and rest under software control and is not affected by
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes
each of external Program and Data Memory can be addressed.
If the EA pin is connected to GND, all program fetches are directed to external memory. On the
AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are
directed to internal memory and fetches to addresses 2000H through FFFFH are to external
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel
address space to the Special Function Registers. This means that the upper 128 bytes have the
same addresses as the SFR space but are physically separate from SFR space. When an
instruction accesses an internal location above
address 7FH, the address mode used in the instruction specifies whether the CPU accesses the
upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the
SFR space. For example, the following direct addressing instruction accesses the SFR at location
0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the
following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at
address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data
RAM are available as stack space.
(One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations where the CPU may be subjected to
software upsets. The WDT consists of a 13-bit counter and the Watchdog Timer Reset
(WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a
user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).
When the WDT is enabled, it will increment every machine cycle while the oscillator is running.
The WDT timeout period is dependent on the external
clock frequency. There is no way to disable the WDT except through reset (either hardware reset
or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at
the RST pin.
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register
(SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH
and 0E1H to WDTRST to avoid a WDT overflow. The 13-bit counter overflows when it reaches
8191 (1FFFH), and this will reset the device. When the WDT is enabled, it will increment every
machine cycle while the oscillator is running. This means the user must reset the WDT at least
every 8191 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST.
WDTRST is a write-only register. The WDT counter cannot
be read or written. When WDT overflows, it will generate an output RESET pulse at the RST
pin. The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the best use of the
WDT, it should be serviced in those sections of code that will periodically be executed within the
time required to prevent a WDT reset.
WDT During Power-down and Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in Powerdown mode, the user does not need to service the WDT. There are two methods of exiting
Power-down mode: by a hardware reset or via a level-activated external interrupt which is
enabled prior to entering Power-down mode. When Power-down is exited with hardware reset,
servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting
Power-down with an interrupt is significantly different. The
interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought
high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt
pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the
WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To
ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to
reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the
WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if
enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To
prevent the WDT from resetting the AT89S52 while in IDLE mode, the user
should always set up a timer that will periodically exit IDLE, service the WDT, and reenter
With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count
upon exit from IDLE.
The UART in the AT89S52 operates the same way as the UART in the AT89C51 and
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the
AT89C51 and AT89C52
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type
of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three
operating modes: capture, auto-reload (up or down counting), and baud rate generator. The
modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit
registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine
cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled during S5P2
of every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the cycle
following the one in which the transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition,
the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is
sampled at least
once before it changes, the level should be held for at least one full machine cycle.
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be
used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0
transition at external input T2EX also causes the current value in TH2 and TL2 to be captured
into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set. The EXF2 bit,
like TF2, can generate an interrupt. The capture mode is illustrated in Figure 5.
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR
T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count
up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.
Figure 6 shows Timer 2 automatically counting up when DCEN=0. In this mode, two options are
selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets
the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the
16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and
RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit.
Both the TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 6. In this mode,
the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up.
The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit
value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2,
respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2
and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2
overflows or underflows and can be used as a 17th bit of resolution. In this operating mode,
EXF2 does not flag an interrupt.
Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON (Table
2). Note that the baud rates for transmit and receive can be different if Timer 2 is used for the
receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK
puts Timer 2 into its baud rate generator mode, as shown in Figure 8. The baud rate generator
mode is similar to the auto-reload
mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value
in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and
3 are determined by Timer 2’s overflow rate according to the following equation.
The Timer can be configured for either timer or counter operation. In most applications, it is
configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it
is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12
the oscillator frequency). As a baud rate generator, however, it increments every state time (at
1/2 the oscillator frequency). The baud rate formula is given below.
where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned
Timer 2 as a baud rate generator is shown in Figure 8. This figure is valid only if RCLK or
TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an
interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not
cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud
rate generator, T2EX can be used as
an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud
rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions,
the Timer is
incremented every state time, and the results of a read or write may not be accurate. The RCAP2
registers may be read but should not be written to, because a write might overlap a reload and
cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the
Timer 2 or RCAP2 registers.
Programmable Clock Out
A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure 9. This pin,
besides being a regular I/O pin, has two alternate functions. It can be programmed to input the
external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4
MHz at a 16 MHz operating frequency. To configure the Timer/Counter 2 as a clock generator,
bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2)
starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the
reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following
In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar
to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate
generator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out
frequencies cannot be determined independently from one another since they both use RCAP2H
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown
in Figure 10.
Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit
in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position
IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they
may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits
TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the
service routine is vectored to. In fact, the service routine may have to determine whether it was
TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The
Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2
flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in Figure 11. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, XTAL2
should be left unconnected while XTAL1 is driven, as shown in Figure 12. There are no
requirements on the duty cycle of the external clock signal, since the input to the internal
clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high
and low time specifications must be observed.
In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special functions
registers remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the
device normally resumes program execution from where it left off, up to two machine cycles
before the internal reset algorithm takes control. On-chip hardware inhibits access to internal
RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an
unexpected write to a port pin when idle mode is terminated by a reset, the instruction following
the one that invokes idle mode should not write to a port pin or to external memory.
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down
is the last instruction executed. The on-chip RAM and Special Function Registers retain their
values until the Power-down mode is terminated. Exit from Power-down mode can be initiated
either by a hardware reset or by an enabled external interrupt. Reset redefines the SFRs but does
not change the on-chip RAM. The reset should not be activated before VCC is restored to its
normal operating level and must be held active long enough to allow the oscillator to restart and
Figure 11. Oscillator Connections
Program Memory Lock Bits
The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)
to obtain the additional features listed in the following table.
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random value and holds that
value until reset is activated. The latched value of EA must agree with the current logic level at
that pin in order for the device to function properly.
Programming the Flash – Parallel Mode
The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The
programming interface needs a high-voltage (12-volt) program enable signal and is compatible
with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array
is programmed byte-bybyte.
Programming Algorithm: Before programming the AT89S52, the address, data, and control
signals should be set up according to the Flash programming mode table and Figures 13 and 14.
To program the AT89S52, take the following
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write
self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5, changing the
and data for the entire array or until the end of the object file is reached.
Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle.
During a write cycle, an attempted read of the last byte written will result in the complement of
the written data on P0.7. Once the write cycle has been completed, true data is valid on all
outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has
Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output
signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is
pulled high again when programming is done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification. The status of the individual
lock bits can be verified directly by reading them back.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal
verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a
logic low. The values returned are as follows.
(000H) = 1EH indicates manufactured by Atmel
(100H) = 52H indicates 89S52
(200H) = 06H
Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the
proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns 500 ns.
In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase
instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a
serial read from any address location will return 00H at the data output.
Programming the Flash – Serial Mode
The Code memory array can be programmed using the serial ISP interface while RST is pulled to
VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is
set high, the Programming Enable instruction needs to be executed first before other operations
can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is
required. The Chip Erase operation turns the content of every memory location in the Code array
into FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be
connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should
be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK
frequency is 2 MHz.
Serial Programming Algorithm
To program and verify the AT89S52 in the serial programming mode, the following sequence is
1. Power-up sequence: Apply power between VCC and GND pins. Set RST pin to “H”.If a
crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to
XTAL1 pin and wait for at least 10 milliseconds.
2. Enable serial programming by sending the Programming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 16.
3. The Code array is programmed one byte at a time by supplying the address and data together
appropriate Write instruction. The write cycle is selftimed and typically takes less than 1 ms at
4. Any memory location can be verified by using the Read instruction which returns the content
selected address at serial output MISO/P1.6.
5. At the end of a programming session, RST can be set low to commence normal device
Power-off sequence (if needed):
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn VCC power off.
Data Polling: The Data Polling feature is also available in the serial mode. In this mode, during a
write cycle an attempted read of the last byte written will result in the complement of the MSB of
the serial output byte on MISO.
Serial Programming Instruction Set
The Instruction Set for Serial Programming follows a 4-byte protocol and is shown in Table 10.
Programming Interface – Parallel Mode
Every code byte in the Flash array can be programmed by using the appropriate combination of
control signals. The write operation cycle is self-timed and once initiated, will automatically time
itself to completion. All major programming vendors offer worldwide support for the Atmel
microcontroller series. Please contact your local programming vendor for the appropriate
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to
clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster
than 1/16 of the system clock at XTAL1. For Page Read/Write, the data always starts from byte
0 to 255. After the command byte and upper address byte are latched, each byte thereafter is
treated as data until all 256
bytes are shifted in/out. Then the next instruction will be ready to be decoded.
Micro-Electro-Mechanical Systems (MEMS) is the integration of mechanical elements, sensors,
actuators, and electronics on a common silicon substrate through microfabrication technology.
While the electronics are fabricated using integrated circuit (IC) process sequences (e.g., CMOS,
Bipolar, or BICMOS processes), the micromechanical components are fabricated using
compatible "micromachining" processes that selectively etch away parts of the silicon wafer or
add new structural layers to form the mechanical and electromechanical devices.
MEMS promises to revolutionize nearly every product category by bringing together siliconbased microelectronics with micromachining technology, making possible the realization of
complete systems-on-a-chip. MEMS is an enabling technology allowing the development of
smart products, augmenting the computational ability of microelectronics with the perception
and control capabilities of micro sensors and micro actuators and expanding the space of possible
designs and applications.
Microelectronic integrated circuits can be thought of as the "brains" of a system and MEMS
augments this decision-making capability with "eyes" and "arms", to allow Microsystems to
sense and control the environment. Sensors gather information from the environment through
measuring mechanical, thermal, biological, chemical, optical, and magnetic phenomena. The
electronics then process the information derived from the sensors and through some decision
making capability direct the actuators to respond by moving, positioning, regulating, pumping,
and filtering, thereby controlling the environment for some desired outcome or purpose. Because
MEMS devices are manufactured using batch fabrication techniques similar to those used for
integrated circuits, unprecedented levels of functionality, reliability, and sophistication can be
placed on a small silicon chip at a relatively low cost.
A mite less than 1 mm on a MEMS device.
Microelectromechanical systems (MEMS) (also written as micro-electro-mechanical, or
MicroElectroMechanical) is the technology of the very small, and merges at the nano-scale into
nanoelectromechanical systems (NEMS) and nanotechnology. MEMS are also referred to as
micromachines (in Japan), or Micro Systems Technology - MST (in Europe). MEMS are separate
and distinct from the hypothetical vision of molecular nanotechnology or molecular electronics.
MEMS are made up of components between 1 to 100 micrometres in size (i.e. 0.001 to 0.1 mm)
and MEMS devices generally range in size from 20 micrometres (20 millionths of a metre) to a
millimetre. They usually consist of a central unit that processes data, the microprocessor and
several components that interact with the outside such as microsensors. At these size scales, the
standard constructs of classical physics are not always useful. Due to MEMS' large surface area
to volume ratio, surface effects such as electrostatics and wetting dominate volume effects such
as inertia or thermal mass.
The potential of very small machines was appreciated long before the technology existed that
could make them—see, for example, Richard Feynman's famous 1959 lecture There's Plenty of
Room at the Bottom. MEMS became practical once they could be fabricated using modified
semiconductor device fabrication technologies, normally used to make electronics. These include
molding and plating, wet etching (KOH, TMAH) and dry etching (RIE and DRIE), electro
discharge machining (EDM), and other technologies capable of manufacturing very small
MEMS technology can be implemented using a number of different materials and manufacturing
techniques; the choice of which will depend on the device being created and the market sector in
which it has to operate.
Materials for MEMS Manufacturing
Silicon is the material used to create most integrated circuits used in consumer electronics in the
modern world. The economies of scale, ready availability of cheap high-quality materials and
ability to incorporate electronic functionality make silicon attractive for a wide variety of MEMS
applications. Silicon also has significant advantages engendered through its material properties.
In single crystal form, silicon is an almost perfect Hookean material, meaning that when it is
flexed there is virtually no hysteresis and hence almost no energy dissipation. As well as making
for highly repeatable motion, this also makes silicon very reliable as it suffers very little fatigue
and can have service lifetimes in the range of billions to trillions of cycles without breaking. The
basic techniques for producing all silicon based MEMS devices are deposition of material layers,
patterning of these layers by photolithography and then etching to produce the required shapes.
Even though the electronics industry provides an economy of scale for the silicon industry,
crystalline silicon is still a complex and relatively expensive material to produce. Polymers on
the other hand can be produced in huge volumes, with a great variety of material characteristics.
MEMS devices can be made from polymers by processes such as injection molding, embossing
or stereolithography and are especially well suited to microfluidic applications such as
disposable blood testing cartridges.
Metals can also be used to create MEMS elements. While metals do not have some of the
advantages displayed by silicon in terms of mechanical properties, when used within their
limitations, metals can exhibit very high degrees of reliability.
Metals can be deposited by electroplating, evaporation, and sputtering processes.
Commonly used metals include gold, nickel, aluminium, chromium, titanium, tungsten,
platinum, and silver.
MEMS Basic Processes
This chart is not complete:
One of the basic building blocks in MEMS processing is the ability to deposit thin films of
material with a thickness anywhere between a few nanometres to about 100 micrometres.
There is a type of physical deposition.
Physical Vapor Deposition (PVD)
There are 2 types of chemical deposition.
Chemical Vapor Deposition
LPCVD : Low Pressure CVD PECVD : Plasma Enhanced CVD
Patterning in MEMS is the transfer of a pattern into a material.
Lithography in MEMS context is typically the transfer of a pattern into a photosensitive material
by selective exposure to a radiation source such as light. A photosensitive material is a material
that experiences a change in its physical properties when exposed to a radiation source. If a
photosensitive material is selectively exposed to radiation (e.g. by masking some of the
radiation) the pattern of the radiation on the material is transferred to the material exposed, as the
properties of the exposed and unexposed regions differs.
This exposed region can then be removed or treated providing a mask for the underlying
substrate. Photolithography is typically used with metal or other thin film deposition, wet and dry
Electron Beam Lithography
Ion Beam Lithography
There are two basic categories of etching processes: wet and dry etching. In the former, the
material is dissolved when immersed in a chemical solution. In the latter, the material is
sputtered or dissolved using reactive ions or a vapor phase etchant. See Williams and Muller  or
Kovacs, Maluf and Peterson for a somewhat dated overview of MEMS etching technologies.
1. Wet etching
Main article: Wet etching
Wet chemical etching consists in a selective removal of material by dipping a substrate into a
solution that can dissolve it. Due to the chemical nature of this etching process, a good selectivity
can often be obtained, which means that the etching rate of the target material is considerably
higher than that of the mask material if selected carefully.
2. Isotropic etching
Etching progresses at the same speed in all directions. Long and narrow holes in a mask will
produce v-shaped grooves in the silicon. The surface of these grooves can be atomically smooth
if the etch is carried out correctly, with dimensions and angles being extremely accurate.
3. Anisotropic etching
Some single crystal materials, such as silicon, will have different etching rates depending on the
crystallographic orientation of the substrate. This is known as anisotropic etching and one of the
most common examples is the etching of silicon in KOH (potassium hydroxide), where Si <111>
planes etch approximately 100 times slower than other planes (crystallographic orientations).
Therefore, etching a rectangular hole in a (100)-Si wafer will result in a pyramid shaped etch pit
with 54.7° walls, instead of a hole with curved sidewalls as it would be the case for isotropic
4. Electrochemical etching
Electrochemical etching (ECE) for dopant-selective removal of silicon is a common method to
automate and to selectively control etching. An active p-n diode junction is required, and either
type of dopant can be the etch-resistant ("etch-stop") material. Boron is the most common etchstop dopant. In combination with wet anisotropic etching as described above, ECE has been used
successfully for controlling silicon diaphragm thickness in commercial piezoresistive silicon
pressure sensors. Selectively doped regions can be created either by implantation, diffusion, or
epitaxial deposition of silicon.
5. Xenon difluoride etching
Xenon difluoride (XeF2) is a dry vapor phase isotropic etch for silicon originally applied for
MEMS in 1995 at University of California, Los Angeles . Primarily used for releasing metal
and dielectric structures by undercutting silicon, XeF2 has the advantage of a stiction-free release
unlike wet etchants. Its etch selectivity to silicon is very high, allowing it to work with photo
resist, SiO2, silicon nitride, and various metals for masking. Its reaction to silicon is "plasma
less", is purely chemical and spontaneous and is often operated in pulsed mode. Models of the
etching action are available, and university laboratories and various commercial tools offer
solutions using this approach.
Hydrofluoric acid is commonly used as an aqueous etchant for silicon dioxide (SiO2, aka BOX
for SOI). HF are usually in 49% concentrated form, 5:1, 10:1 or 20:1 BOE (Buffered Oxide
Etchant) or BHF (Buffered HF). They were first used in medieval times for glass etching. It was
used in IC fabrication for patterning the gate oxide until the process step was replaced by RIE.
HF is considered one of the more dangerous acids in the clean room. It penetrates the skin upon
contact and it diffuses straight to the bone. Therefore the damage will not be felt until it is too
7. Reactive ion etching (RIE)
Main article: Reactive ion etching
In reactive ion etching (RIE), the substrate is placed inside a reactor in which several gases are
introduced. A plasma is struck in the gas mixture using an RF power source, breaking the gas
molecules into ions. The ions are accelerated towards, and react with, the surface of the material
being etched, forming another gaseous material. This is known as the chemical part of reactive
ion etching. There is also a physical part which is similar in nature to the sputtering deposition
process. If the ions have high enough energy, they can knock atoms out of the material to be
etched without a chemical reaction. It is a very complex task to develop dry etches processes that
balance chemical and physical etching, since there are many parameters to adjust. By changing
the balance it is possible to influence the anisotropy of the etching, since the chemical part is
isotropic and the physical part highly anisotropic the combination can form sidewalls that have
shapes from rounded to vertical. RIE can be deep and its name will be Deep RIE or DRIE Deep
reactive ion etching (DRIE)
Main article: Deep reactive ion etching
A special subclass of RIE which continues to grow rapidly in popularity is deep RIE (DRIE). In
this process, etch depths of hundreds of micrometres can be achieved with almost vertical
sidewalls. The primary technology is based on the so-called "Bosch process" , named after the
German company Robert Bosch which filed the original patent, where two different gas
compositions are alternated in the reactor. Currently there are two variations of the DRIE. The
first variation consists of three distinct steps (the Bosch Process as used in the UNAXIS tool)
while the second variation only consists of two steps (ASE used in the STS tool). In the 1st
Variation, the etch cycle is as follows: (i) SF 6 isotropic etch; (ii) C4F8 passivation; (iii) SF6
anisoptropic etch for floor cleaning. In the 2nd variation, steps (i) and (iii) are combined.
Both variations operate similarly. The C4F8 creates a polymer on the surface of the substrate, and
the second gas composition (SF6 and O2) etches the substrate. The polymer is immediately
sputtered away by the physical part of the etching, but only on the horizontal surfaces and not the
sidewalls. Since the polymer only dissolves very slowly in the chemical part of the etching, it
builds up on the sidewalls and protects them from etching. As a result, etching aspect ratios of 50
to 1 can be achieved. The process can easily be used to etch completely through a silicon
substrate, and etch rates are 3-6 times higher than wet etching.
8. Dry Etching
9. Vapor Etching
10. Plasma Etching
The three characteristic features of MEMS fabrication technologies are miniaturization,
multiplicity, and microelectronics. Miniaturization enables the production of compact, quickresponse devices. Multiplicity refers to the batch fabrication inherent in semiconductor
processing, which allows thousands or millions of components to be easily and concurrently
fabricated. Microelectronics provides the intelligence to MEMS and allows the monolithic
merger of sensors, actuators, and logic to build closed-loop feedback components and systems.
The successful miniaturization and multiplicity of traditional electronics systems would not have
been possible without IC fabrication technology. Therefore, IC fabrication technology, or
microfabrication, has so far been the primary enabling technology for the development of
MEMS. Microfabrication provides a powerful tool for batch processing and miniaturization of
mechanical systems into a dimensional domain not accessible by conventional (machining)
techniques. Furthermore, microfabrication provides an opportunity for integration of mechanical
systems with electronics to develop high-performance closed-loop-controlled MEMS.
Advances in IC technology in the last decade have brought about corresponding progress in
MEMS fabrication processes. Manufacturing processes allow for the monolithic integration of
microelectromechanical structures with driving, controlling, and signal-processing electronics.
This integration promises to improve the performance of micromechanical devices as well as
reduce the cost of manufacturing, packaging, and instrumenting these devices .
A. IC Fabrication
Any discussion of MEMS requires a basic understanding of IC fabrication technology, or
microfabrication, the primary enabling technology for the development of MEMS. The major
steps in IC fabrication technology are film growth, doping, lithography, etching, dicing, and
Film growth: Usually, a polished Si wafer is used as the substrate, on which a thin film is grown.
The film, which may be epitaxial Si, SiO2, silicon nitride (Si3N4), polycrystalline Si
(polysilicon), or metal, is used to build both active or passive components and interconnections
Doping: To modulate the properties of the device layer, a low and controllable level of an atomic
impurity may be introduced into the layer by thermal diffusion or ion implantation.
Lithography: A pattern on a mask is then transferred to the film by means of a photosensitive
(i.e., light sensitive) chemical known as a photoresist. The process of pattern generation and
transfer is called photolithography. A typical mask consists of a glass plate coated with a
patterned chromium (Cr) film.
Etching: Next is the selective removal of unwanted regions of a film or substrate for pattern
delineation. Wet chemical etching or dry etching may be used. Etch-mask materials are used at
various stages in the removal process to selectively prevent those portions of the material from
being etched. These materials include SiO2, Si3N4, and hard-baked photoresist.
Dicing: The finished wafer is sawed or machined into small squares, or dice, from which
electronic components can be made.
Packaging: The individual sections are then packaged, a process that involves physically
locating, connecting, and protecting a device or component. MEMS design is strongly coupled to
the packaging requirements, which in turn are dictated by the application environment.
B. Bulk Micromachining and Wafer Bonding
Bulk micromachining is an extension of IC technology for the fabrication of 3D structures. Bulk
micromachining of Si uses wet- and dry-etching techniques in conjunction with etch masks and
etch stops to sculpt micromechanical devices from the Si substrate. The two key capabilities that
make bulk micromachining a viable technology are:
1) Anisotropic etchants of Si, such as ethylene-diamine and pyrocatechol (EDP), potassium
hydroxide (KOH), and hydrazine (N2H4). These preferentially etch single crystal Si along given
2) Etch masks and etch-stop techniques that can be used with Si anisotropic etchants to
selectively prevent regions of Si from being etched. Good etch masks are provided by SiO2 and
Si3N4, and some metallic thin films such as Cr and Au (gold).
A drawback of wet anisotropic etching is that the microstructure geometry is defined by the
internal crystalline structure of the substrate. Consequently, fabricating multiple, interconnected
micromechanical structures of free-form geometry is often difficult or impossible. Two
additional processing techniques have extended the range of traditional bulk micromachining
technology: deep anisotropic dry etching and wafer bonding. Reactive gas plasmas can perform
deep anisotropic dry etching of Si wafers, up to a depth of a few hundred microns, while
maintaining smooth vertical sidewall profiles. The other technology, wafer bonding, permits a Si
substrate to be attached to another substrate, typically Si or glass. Used in combination,
anisotropic etching and wafer bonding techniques can construct 3D complex microstructures
such as microvalves and micropumps .
C. Surface Micromachining
Surface micromachining enables the fabrication of complex multicomponent integrated
micromechanical structures that would not be possible with traditional bulk micromachining.
This technique encases specific structural parts of a device in layers of a sacrificial material
during the fabrication process. The substrate wafer is used primarily as a mechanical support on
which multiple alternating layers of structural and sacrificial material are deposited and patterned
to realize micromechanical structures. The sacrificial material is then dissolved in a chemical
etchant that does not attack the structural parts. The most widely used surface micromachining
technique, polysilicon surface micromachining, uses SiO2 as the sacrificial material and
polysilicon as the structural material.
At the University of Wisconsin at Madison, polysilicon surface micromachining research started
in the early 1980s in an effort to create high-precision micro pressure sensors. The control of the
internal stresses of a thin film is important for the fabrication of microelectromechanical
structures. The microelectronic fabrication industry typically grows polysilicon, silicon nitride,
and silicon dioxide films using recipes that minimize time. Unfortunately, a deposition process
that is optimized to speed does not always create a low internal stress film. In fact, most of these
films have internal stresses that are highly compressive (tending to contract). A freestanding
plate of highly compressive polysilicon that is held at all its edges will buckle (i.e., collapse or
give way). This is highly undesirable. The solution is to modify the film deposition process to
control the internal stress by making it stress-free or slightly tensile.
One way to do this is to dope the film with boron, phosphorus, or arsenic. However, a doped
polysilicon film is conductive, and this property may interfere with the mechanical devices
incorporated electronics. Another problem with doped polysilicon is that it is roughened by
hydrofluoric acid (HF), which is commonly used to free sections of the final mechanical device
from the substrate. Rough polysilicon has different mechanical properties than smooth
polysilicon. Therefore, the amount of roughening must be taken into account when designing the
mechanical parts of the micro device.
A better way to control the stress in polysilicon is through post annealing, which involves the
deposition of pure, fine-grained, compressive (i.e., can be compressed) polysilicon. Annealing
the polysilicon after deposition at elevated temperatures can change the film to be stress-free or
tensile. The annealing temperature sets the film's final stress. After this, electronics can then be
incorporated into polysilicon films through selective doping, and hydrofluoric acid will not
change the mechanical properties of the material .
Deposition temperature and the film's silicon to nitride ratio can control the stress of a silicon
nitride (Si3N4) film. The films can be deposited in compression, stress-free, or in tension .
Deposition temperature and post annealing can control silicon dioxide (SiO2) film stress.
Because it is difficult to control the stress of SiO2 accurately, SiO2 is typically not used as a
mechanical material by itself, but as electronic isolation or as a sacrificial layer under
In the micromolding process, microstructures are fabricated using molds to define the deposition
of the structural layer. The structural material is deposited only in those areas constituting the
microdevice structure, in contrast to bulk and surface micromachining, which feature blanket
deposition of the structural material followed by etching to realize the final device geometry.
After the structural layer deposition, the mold is dissolved in a chemical etchant that does not
attack the structural material. One of the most prominent micromolding processes is the LIGA
process. LIGA is a German acronym standing for lithographie, galvanoformung, und abformung
(lithography, electroplating, and molding). This process can be used for the manufacture of highaspect-ratio 3D microstructures in a wide variety of materials, such as metals, polymers,
ceramics, and glasses. Photosensitive polyimides are also used for fabricating plating molds. The
photolithography process is similar to conventional photolithography, except that polyimide
works as a negative resist
microelectromechanical systems chip, sometimes called "lab on a chip"
In one viewpoint MEMS application is categorized by type of use.
In another view point mems applications are categorized by the field of application(Commercial
Inkjet printers, which use piezoelectrics or thermal bubble ejection to deposit ink on
Accelerometers in modern cars for a large number of purposes including airbag
deployment in collisions.
Accelerometers in consumer electronics devices such as game controllers (Nintendo
Wii), personal media players / cell phones (Apple iPhone, various Nokia mobile phone
models, various HTC PDA models) and a number of Digital Cameras (various Canon
Digital IXUS models). Also used in PCs to park the hard disk head when free-fall is
detected, to prevent damage and data loss.
MEMS gyroscopes used in modern cars and other applications to detect yaw; e.g. to
deploy a roll over bar or trigger dynamic stability control.
Silicon pressure sensors e.g. car tire pressure sensors, and disposable blood pressure
Displays e.g. the DMD chip in a projector based on DLP technology has on its surface
several hundred thousand micromirrors.
Optical switching technology which is used for switching technology and alignment for
Bio-MEMS applications in medical and health related technologies from Lab-On-Chip to
MicroTotalAnalysis (biosensor, chemosensor).
Interferometric modulator display (IMOD) applications in consumer electronics
(primarily displays for mobile devices). Used to create interferometric modulation reflective display technology as found in mirasol displays.
Companies with strong MEMS programs come in many sizes. The larger firms specialize in
manufacturing high volume inexpensive components or packaged solutions for end markets such
as automobiles, biomedical, and electronics. The successful small firms provide value in
innovative solutions and absorb the expense of custom fabrication with high sales margins. In
addition, both large and small companies work in R&D to explore MEMS technology.
. Mems accelerometer:
WHAT IS AN ACCELEROMETER?
An accelerometer is an instrument for measuring acceleration, detecting and measuring
vibrations, or for measuring acceleration due to gravity (inclination). Accelerometers can be used
to measure vibration on vehicles, machines, buildings, process control systems and safety
installations. They can also be used to measure seismic activity, inclination, machine vibration,
dynamic distance and speed with or without the influence of gravity.
HOW DOES AN ACCELEROMETER WORK?
Used for calculating acceleration and measuring vibrations, the accelerometer is capable of
detecting even the slightest movements, from the tilting of a building to smallest vibration
caused by a musical instrument. Inside the accelerometer sensor minute structures are present
Accelerometers need to be placed on the surface of the object in order to determine the
vibrations. It is not capable of work in isolation or apart from the object it is required to assess, it
must be firmly attached to the object in order to give precise readings.
KINDS OF ACCELEROMETER
The two kinds of basic accelerometers are:
1. ANALOG ACCELEROMETER
At times Inputs and output readings also matter especially when it comes to determining the kind
of accelerometer that needs to be placed on a certain object. If the output is digital then a digital
accelerometer must be placed and vice versa. The main feature of this accelerometer is that the
The most common type of this accelerometer is used in airbags of automobiles, to note the
sudden drop in the speed of the vehicle and to trigger the airbag release. Even laptops are now
being equipped with accelerometers in order to protect the hard drive against any physical
dangers, caused mainly due to accidental drops.
2. DIGITAL ACCELEROMETER
The digital accelerometer is more sophisticated than the analog. Here the amount of high voltage
time is proportional to the acceleration. One of its major advantages is that it is more stable and
produces a direct output signal. Accelerometers are now also used in aerospace and many
military applications, such as missile launch, weapon fire system, rocket deployment etc. Many a
times these accelerometers are used to protect fragile equipment during cargo transportation, and
report any strain that might cause a possible damage. Some companies have also managed to
develop a wireless 3-axis accelerometers which are not only low in cost but are also shock
durable. This 3-axis accelerometer has sensors that are used to protect mobiles and music
players. Also these sensors are used in some of the devices used for traffic navigation and
Depending upon the kind of work, the accelerometers vary in the way they are prepared and how
they work. Some accelerometers use piezoelectricity, these are man-made. In such
accelerometers the acceleration is calculated based upon the charges derived from the
microscopic crystalline structures when they are accelerated due to motion.
Another kind works with the capacitance and the changes initiated within it as a result of some
accelerative force. This technology is used from automotive industry to agriculture industry and
from NASA to military researches and operations.
This device is used to measure strain in an object, which is detected by a foil strain element. If
the object, to which the gauge is attached is some how deformed that creates electrical charges
and is known as the gauge factor.
ACCELEROMETER IS USED IN:
Due to high demand and wide spread use of accelerometers in the automotive industry and new
hi-tech technology, these sensors are now light weight and are available at low cost and reduced
Microphones also carry accelerometers. That is how they are able to detect the minute
The forces that can cause vibrations which are detected by the accelerometer can be static,
dynamic or gravitational. Certain accelerometers are rated G. G stands for Gravity. Such
accelerometers are used mostly in robotics. They are more sensitive to motion and can be
triggered at the slightest changes in gravitational pulls.
Accelerometers are acceleration sensors. An inertial mass suspended by springs is acted upon by
acceleration forces that cause the mass to be deflected from its initial position. This deflection is
converted to an electrical signal, which appears at the sensor output. The application of MEMS
technology to accelerometers is a relatively new development.
One such accelerometer design is discussed by DeVoe and Pisano (2001) . It is a surface
micromachined piezoelectric accelerometer employing a zinc oxide (ZnO) active piezoelectric
film. The design is a simple cantilever structure, in which the cantilever beam serves
simultaneously as proof mass and sensing element. One of the fabrication approaches developed
is a sacrificial oxide process based on polysilicon surface micromachining, with the addition of a
piezoelectric layer atop the polysilicon film. In the sacrificial oxide process, a passivation layer
of silicon dioxide and low-stress silicon nitride is deposited on a bare silicon wafer, followed by
0.5 micron of liquid phase chemical vapor deposited (LPCVD) phosphorous-doped polysilicon.
Then, a 2.0-micron layer of phosphosilicate glass (PSG) is deposited by LPCVD and patterned to
define regions where the accelerometer structure will be anchored to the substrate. The PSG film
acts as a sacrificial layer that is selectively etched at the end to free the mechanical structures. A
second layer of 2.0-micron-thick phosphorus-doped polysilicon is deposited via LPCVD on top
of the PSG, and patterned by plasma etching to define the mechanical accelerometer structure.
This layer also acts as the lower electrode for the sensing film. A thin layer of silicon nitride is
next deposited by LPCVD, and acts as a stress-compensation layer for balancing the highly
compressive residual stresses in the ZnO film. By varying the thickness of the Si3N4 layer, the
accelerometer structure may be tuned to control bending effects resulting from the stress gradient
through the device thickness. A ZnO layer is then deposited on the order of 0.5 micron, followed
by sputtering of a 0.2-micron layer of platinum (Pt) deposited to form the upper electrode. A
rapid thermal anneal is performed to reduce residual stresses in the sensing film. Afterwards, the
Pt, Si3N4, and ZnO layers are patterned in a single ion milling etch step, and the devices are then
released by passivating the ZnO film with photoresist, and immersing the wafer in buffered
hydrofluoric acid, which removes the sacrificial PSG layer .
APR 9600 RE-Recording Voice IC
Single-chip Voice Recording & Playback Device
60- Second Duration
1 Features :
• Single-chip, high-quality voice recording & playback solution
- No external ICs required
- Minimum external components
• Non-volatile Flash memory technology
No battery backup required
• User-Selectable messaging options
- Random access of multiple fixed-duration messages
- Sequential access of multiple variable-duration messages
• User-friendly, easy-to-use operation
- Programming & development systems not required
- Level-activated recording & edge-activated play back switches
• Low power consumption
- Operating current: 25 mA typical
- Standby current: 1 uA typical
- Automatic power-down
• Chip Enable pin for simple message expansion
2 General Description:
The APR9600 device offers true single-chip voice recording, non-volatile storage, and
playback capability for 40 to 60 seconds. The device supports both random and sequential access
of multiple messages. Sample rates are user- selectable, allowing designers to customize their
design for unique quality and storage time needs. Integrated output amplifier, microphone
amplifier, and AGC circuits greatly simplify system design. the device is ideal for use in portable
voice recorders, toys, and many other consumer and industrial applications.
APLUS integrated achieves these high levels of storage capability by using its proprietary
analog/multilevel storage technology implemented in an advanced Flash non-volatile memory
process, where each memory cell can store 256 voltage levels. This technology enables the
APR9600 device to reproduce voice signals in their natural form. It eliminates the need for
encoding and compression, which often introduce distortion.
Fig 12: The APR9600 DIP & SOP
3 Functional Description:
APR9600 block diagram is included in order to describe the device's internal architecture. At the
left hand side of the diagram are the analog inputs. A differential microphone amplifier,
including integrated AGC, is included on-chip for applications requiring use. The amplified
microphone signals fed into the device by connecting the ANA_OUT pin to the ANA_IN pin
through an external DC blocking capacitor. Recording can be fed directly into the ANA_IN pin
through a DC blocking capacitor, however, the connection between ANA_IN andANA OUT is
still required for playback. The next block encountered by the input signal is the internal antialiasing filter. The filter automatically adjusts its response According to the sampling frequency
selected so Shannon’s Sampling Theorem is satisfied. After anti-aliasing filtering is
accomplished the signal is ready to be clocked into the memory array. This storage is
accomplished through a combination of the Sample and Hold circuit and the Analog Write/Read
circuit. Either the Internal Oscillator or an external clock source clocks these circuits. When
playback is desired the previously stored recording is retrieved from memory, low pass filtered,
and amplified as shown on the right hand side of the diagram. The signal can be heard by
connecting a speaker to the SP+ and SP- pins. Chip-wide management is accomplished through
the device control block shown in the upper right hand corner. Message management is provided
through the message control block represented in the lower center of the block diagram. More
detail on actual device application can be found in the Sample Application section. More detail
on sampling control can be found in the Sample Rate and Voice Quality section. More detail on
Message management and device control can be found in the Message Management section.
Fig 13: APR9600 Block Diagram
3.1 Message Management:
3.1.1 Message Management General Description
Playback and record operations are managed by on-chip circuitry. There are several available
messaging modes depending upon desired operation. These message modes determine message
management style, message length, and external parts count. Therefore, the designer must select
the appropriate operating mode before beginning the design. Operating modes do not affect voice
quality; for information on factors affecting quality refer to the Sampling Rate & Voice Quality
section. The device supports five message management modes (defined by the MSEL1, MSEL2
and /M8_OPTION pins shown in Figures 1 and 2):
Random access mode with 2, 4, or 8 fixed-duration messages Tape mode, with multiple variableduration messages, provides two options:
- Auto rewind
Modes cannot be mixed. Switching of modes after the device has recorded an initial message is
not recommended. If modes are switched after an initial recording has been made some
unpredictable message fragments from the previous mode may remain present, and be audible on
playback, in the new mode. These fragments will disappear after a Record operation in the newly
selected mode. Table 1 defines the decoding necessary to choose the desired mode. An important
feature of the APR9600 Message management capabilities is the ability to audibly prompt the
user to change in the device's status through the use of "beeps" superimposed on the device's
output. This feature is enabled by asserting a logic high level on the BE pin.
3.1.2 Random Access Mode
Random access mode supports 2, 4, or 8 Message segments of fixed duration. As suggested
recording or playback can be made randomly in any of the elected messages. The length of each
message segment is the total recording length available (as defined by the selected sampling rate)
divided by the total number of segments enabled (as decoded in Table1). Random access mode
provides easy indexing to message segments.
3.1.2A Functional Description of Recording in Random Access Mode
On power up, the device is ready to record or playback in any of the enabled message segments.
To record,/CE must be set low to enable the device and /RE must be set low to enable recording.
You initiate recording by applying a low level on the message trigger pin that represents the
message segment you intend to use. The message trigger pins are labeled /M1_MESSAGE /M8_OPTION on pins 1-9 (excluding pin 7) for message segments 1-8 respectively. Note:
Message trigger pins of M1_MESSAGE,/M2_NEXT, /M7_END, and /M8_OPTION, have
expanded names to represent the different functionality that these pins assume in the other
modes. In random access mode these pins should be considered purely message trigger pins with
the same functionality as /M3, /M4, /M5, and /M6. For a more thorough explanation of the
functionality of device pins in different modes please refer to the pin description table that
appears later in this document. When actual recording begins the device responds with a single
beep (if the BE pin is high to enable the beep tone) at the speaker outputs to indicate that it has
started recording. Recording continues as long as the message pin stays low. The rising edge of
the same message trigger pin during record stops the recording operation (indicated with a single
beep). If the message trigger pin is held low beyond the end of the maximum allocated duration,
recording stops automatically (indicated with two beeps), regardless of the state of the message
trigger pin. The chip then enters low-power mode until the message trigger pin returns high.
After the message trigger pin returns to high, the chip enters standby mode. Any subsequent high
to low transition on the same message trigger pin will initiate recording from the beginning of
the same message segment. The entire previous message is then overwritten by the new message,
regardless of the duration of the new message. Transitions on any other message trigger pin or
the /RE pin during the record operation are ignored until after the device enters standby mode.
3.1.2B Functional Description of Playback Random Access Mode
On power up, the device is ready to record or playback, in any of the enabled message segments.
To playback,/CE must be set low to enable the device and /RE must be set high to disable
recording & enable playback. You initiate playback by applying a high to low edge on the
message trigger pin that represents the message segment you intend to playback. Playback will
continue until the end of the message is reached. If a high to low edge occurs on the same
message trigger pin during playback, playback of the current message stops immediately. If a
different message trigger pin pulses during playback, playback of the current message stops
immediately (indicated by one beep) and playback of the new message segment begins. A delay
equal to 8,400 cycles of he sample clock will be encountered before the device starts playing the
new message. If a message trigger pin is held low, the selected message is played back
repeatedly as long as the trigger pin stays low. A period of silence, of a duration equal to 8,400
cycles of the sampling clock, will be inserted during looping as an indicator to the user of the
transition between the end and the beginning of the message.
3.1.3 Tape Mode:
Tape mode manages messages sequentially much like traditional cassette tape recorders. Within
tape mode two options exist, auto rewind and normal. Auto rewind mode configures the device
to automatically rewind to the beginning of the message immediately following recording or
playback of the message. In tape mode, using either option, messages must be recorded or played
back sequentially, much like a traditional cassette tape recorder.
126.96.36.199A Function Description of Recording in Tape Mode using the Auto Rewind Option
On power up, the device is ready to record or playback, starting at the first address in the
memory array. To record, /CE must be set low to enable the device and /RE must be set low to
enable recording. A falling edge of the /M1_MESSAGE pin initiates voice recording (indicated
by one beep).A subsequent rising edge of the /M1_MESSAGE pin during recording stops the
recording (also indicated by one beep). If the M1_MESSAGE pin is held low beyond the end of
the available memory, recording will stop automatically (indicated by two beeps). The device
will then assert a logic low on the /M7_END pin until the /M1 Message pin is released.
The device returns to standby mode when the /M1_MESSAGE pin goes high gain. After
recording is finished the device will automatically rewind to the beginning of the most recently
recorded message and wait for the next user input. The auto rewind function is convenient
because it allows the user to immediately playback and review the message without the need to
rewind. However, caution must be practiced because a subsequent record operation will
overwrite the last recorded message unless the user remembers to pulse the /M2_Next pin in
order to increment the device past the current message.
A subsequent falling edge on the /M1_Message pin starts a new record operation, overwriting
the previously existing message. You can preserve the previously recorded message by using
the /M2_Next input to advance to the next available message segment. To perform this function,
the /M2_NEXT pin must be pulled low for at least 400 cycles of the sample clock. The auto
rewind mode allows the user to record over the just recorded message simply by initiating a
record sequence without first toggling the /M2_NEXT pin.
To record over any other message however requires a different sequence. You must pulse the
/CE pin low once to rewind the device to the beginning of the voice memory. The /M2_NEXT
pin must then be pulsed low for the specified number of times to move to the start of the message
you wish to overwrite. Upon arriving at the desired message a record sequence can be initiated to
overwrite the previously recorded material. After you overwrite the message it becomes the last
available message and all previously recorded messages following this message become
inaccessible. If during a record operation all of the available memory is used, the device will stop
recording automatically,(double beep) and set the /M7_END pin low for a duration equal to 1600
cycles of the sample clock. Playback can be initiated on this last message, but pulsing the
/M2_Next pin will put the device into an "overflow state". Once the device enters an overflow
state any subsequent pulsing of /M1_MESSAGE or /M2_NEXT will only result in a double beep
and setting of the /M7_END pin low for a duration equal to 400 cycles of the sample clock. To
proceed from this state the user must rewind the device to the beginning of the memory array.
This can be accomplished by toggling the /CE pin low or cycling power. All inputs, except
the /CE pin, are ignored during recording.
188.8.131.52B Function Description of Playback in Tape Mode using Auto Rewind Option
On power-up, the device is ready to record or playback, starting at the first address in the
memory array. Before you can begin playback, the /CE input must be set to low to enable the
device and /RE must be set to high to disable recording and enable playback. The first high to
low going pulse of the /M1_MESSAGE pin initiates playback from the beginning of the current
message; on power up the first message is the current message. When the /M1_MESSAGE pin
pulses low the second time, playback of the current Message stops immediately. When the
/M1_MESSAGE pin pulses low a third time, playback of the current message starts again from
its beginning. If you hold the /M1_MESSAGE pin low continuously the same message will play
continuously in a looping fashion. A 1,540ms period of silence is inserted during looping as an
indicator to the user of the transition between the beginning and end of the message. Note that in
auto rewind mode the device always rewinds to the beginning of the current message. To listen
to a subsequent message the device must be fast forwarded past the current message to the next
message. This function is accomplished by toggling the /M2_NEXT pin from high to low. The
pulse must be low for least 400 cycles of the sampling clock. After the device is incremented to
the desired message the user can initiate playback of the message with the playback sequence
described above. A special case exists when the /M2_NEXT pin goes low during playback.
Playback of the current message will stop, the device will beep, advance to the next message and
initiate playback of the next message. (Note that if /M2 Next goes low when not in playback
mode, the device will prepare to play the next message, but will not actually initiate playback). If
the /CE pin goes high during playback, playback of the current message will stop, the device will
beep, reset to the beginning of the first message, and wait for a subsequent playback command.
When you reach the end of the memory array, any subsequent pulsing of /M1_MESSAGE or
/M2_NEXT will only result in a double beep. To proceed from this state the user must rewind
the device to the beginning of the memory array. This can be accomplished by toggling the /CE
pin low or cycling power.
184.108.40.206A Functional Description of Recording In Tape Mode using the Normal Option
On power-up, the device is ready to record or playback, starting at the first address in the
memory array. Before you can begin recording, the /CE input must be set to low to enable the
device and /RE must be set to low to enable recording. On a falling edge of the /M1_MESSAGE
pin the device will beep once and initiate recording. A subsequent rising edge on the /M1
Message pin will stop recording and insert a single beep. If the M1_MESSAGE pin is held low
beyond the end of the available memory, recording Stops automatically, and two beeps are
inserted; regardless of the state of the /M1_MESSAGE pin. The device returns to the standby
mode when the /M1_MESSAGE pin is returned high. A subsequent falling edge on the
/M1_MESSAGE pin starts a new record operation in the memory array immediately following
the last recorded message, thus preserving the last recorded message. To record over all previous
messages you must pulse the /CE pin low once to reset the device to the beginning of the first
message. You can then initiate a record sequence, as described above, to record a new message.
The most recently recorded message will become the last recorded message and all previously
recorded messages following this message will become inaccessible. If you wish to preserve any
current messages it is recommend that the Auto Rewind option be used instead of the Normal
option. If the Normal option is necessary the following sequence can be used. To preserve
current messages you must fast forward past the messages you want to keep before you can
record a new message. To fast forward when using the Normal option you must switch to play
mode and listen to messages sequentially until you arrive at the beginning of the message you
wish to overwrite. At this stage you should switch back to record mode and overwrite the desired
The most recently recorded message will become the last recorded message and all previously
recorded messages following this message will become inaccessible. All inputs, except /CE, are
ignored during recording.
220.127.116.11B Functional Description of Playback in Tape Mode using the Normal Option
On power-up or after a low to high transition on /RE the device is ready to record or playback
starting at the first address in the memory array. Before you can begin playback of messages,
the /CE input must be set to low to enable the device and /RE must be set to high to enable
playback. The first high to low going pulse of the /M1_MESSAGE pin initiates playback from
the beginning of the current message. When the /M1_MESSAGE pin pulses from high to low a
second time, playback of the current message stops immediately. When the /M1_MESSAGE pin
pulses from high to low a third time, playback of the next message starts again from the
beginning. If you hold the /M1_MESSAGE pin low continuously, the current message and
subsequent messages play until the one of the following conditions is met: the end of the
memory array is reached, the last message is reached, the /M1_message pin is released. If the last
recorded message has already played, any further transitions on the /M1_MESSAGE pin will
initiate a double beep for warning and the /M7_END pin will go low. To exit this state you must
pulse the /CE pin high and then low once during standby to reset the pointer to the beginning of
the first message.
3.2 Microprocessor Controlled Message Management:
The APR9600 device incorporates several features design help simplify microprocessor
Controlled message management When controlling messages the microprocessor essentially
toggles pins as described in the message management sections described previously. The /BUSY,
/STROBE, and /M7_END pins are included to simplify handshaking between the microprocessor
and the APR9600. The /BUSY pin, when low, indicates to the host processor that the device is
busy and that No commands can be accepted. When this pin is high the device is ready to accept
and execute commands from the host. The /STROBE pin pulses low each time a memory
segment is used. Counting pulses on this pin enables the host processor to accurately determine
how much recording time has been used, and how much recording time remains. The APR9600
has a total of eighty memory segments. The /M7_END pin is used as an indicator that the device
has stopped its current record or playback operation.
During recording a low going pulse indicates that all memory has been used. During playback a
low pulse indicates that the last message has played. Microprocessor control can also be used to
link several APR9600 devices together in order to increase total available recording time. In this
application both the speaker and microphone signals can be connected in parallel. The
microprocessor will then control which device currently drives the speaker by enabling or
disabling each device using its respective /CE pins. A continuous message cannot be recorded in
multiple devices however because the transition from one device to the next will incur a delay
that is noticeable upon playback. For this reason it is recommended that message boundaries and
device boundaries always coincide.
3.3 Signal Storage:
The APR9600 samples incoming voice signals and stores the instantaneous voltage samples in
non-volatile FLASH memory cells. Each memory cell can support voltage ranges from 0 to 256
levels. These 256 discrete voltage levels are the equivalent of 8-bit (28=256) binary encoded
values. During playback the stored signals are retrieved from memory, smoothed to form a
continuous signal, and then amplified before being fed to an external speaker.
3.4 Sampling Rate & Voice Quality:
According to Shannon's sampling theorem, the highest possible frequency component introduced
to the input of a sampling system must be equal to or less than half the sampling frequency if
aliasing errors are to be eliminated. The APR9600 automatically filters its input, based on the
selected sampling frequency, to meet this requirement. Higher sampling rates increase the
bandwidth and hence the voice quality, but they also use more memory cells for the same length
of recording time. Lower sampling rates use fewer memory cells and effectively increase the
duration capabilities of the device, but they also reduce incoming signal bandwidth. The
APR9600 accommodates sampling rates as high as 8 kHz and as low a 4 kHz. You can control
the quality/duration trade off by controlling the sampling frequency.
An internal oscillator provides the APR9600 sampling clock. Changing the resistance
from the OscR pin to GND. Table2 summarizes resistance values and the corresponding
sampling frequencies, as can change oscillator frequency well as the resulting input bandwidth
3.5 Automatic Gain Control (AGC):
The APR9600 device has an integrated AGC. The AGC affects the microphone input but
does not affect the ANA_IN input. The AGC circuit insures that the input signal is properly
amplified. The AGC works by applying maximum gain to small input signals and minimum gain
to large input signals. This assures that inputs of varying amplitude are recorded at the optimum
signal level. The AGC amplifier is designed to have a fast attack time and a slow decay time.
This timing is controlled by the RC network connected to pin 19. A value of 220K and 4.7uF has
been found to work well for the English language. Be aware that different languages, speakers
from different countries, and music may all require modification of the recommended values for
the AGC RC network.
3.6 Sampling Application:
The following reference schematics are included as examples of how a recording system
might be designed. Each reference schematic shows the device incorporated in one of its three
main modes: Random Access, Tape mode – Normal option, and Tape mode – Auto Rewind
option. Note that in several of the applications either one or all of the /BUSY, /STROBE, or
/M7_END pins are connected to LEDs as indicators of device status. This is possible because all
of these pins and signals were designed to have timing compatible with both microprocessor
interface and manual LED indication. A bias must be applied to the electrets microphone in order
to power its built-in circuitry. The ground return of this bias network is connected to the /Busy.
This configuration saves power when record mode. Both pins 18 and 19, MicIn and
MicRef, must be AC coupled to the microphone network in order to block the DC biasing
voltage. Figure 3 shows the device configured in random access mode. The device is using eight
Message segments, the maximum available, in this mode. Note that message trigger pins that are
not used, for modes with less than eight segments, can be left unconnected with the exception of
pin /M8_OPTION which should be pulled to VCC through a 100k resistor.
Fig 15: Tape Mode, Auto Rewind option
Fig 16: Tape Mode, Normal option
Liquid crystal display
Liquid crystal displays (LCDs) have materials, which combine the properties of
both liquids and crystals. Rather than having a melting point, they have a temperature
range within which the molecules are almost as mobile as they would be in a liquid, but are
grouped together in an ordered form similar to a crystal.
An LCD consists of two glass panels, with the liquid crystal material sand witched in
between them. The inner surface of the glass plates are coated with transparent electrodes which
define the character, symbols or patterns to be displayed polymeric layers are present in between
the electrodes and the liquid crystal, which makes the liquid crystal molecules to maintain a
defined orientation angle.
One each polarisers are pasted outside the two glass panels. These polarisers would rotate
the light rays passing through them to a definite angle, in a particular direction.
When the LCD is in the off state, light rays are rotated by the two polarisers and the
liquid crystal, such that the light rays come out of the LCD without any orientation, and hence
the LCD appears transparent.
When sufficient voltage is applied to the electrodes, the liquid crystal molecules would be
aligned in a specific direction. The light rays passing through the LCD would be rotated by the
polarisers, which would result in activating/ highlighting the desired characters.
The LCD’s are lightweight with only a few millimeters thickness. Since the LCD’s
consume less power, they are compatible with low power electronic circuits, and can be powered
for long durations.
The LCD’s don’t generate light and so light is needed to read the display. By using
backlighting, reading is possible in the dark. The LCD’s have long life and a wide operating
Changing the display size or the layout size is relatively simple which makes the LCD’s
more customers friendly.
The LCDs used exclusively in watches, calculators and measuring instruments are the
simple seven-segment displays, having a limited amount of numeric data. The recent advances in
technology have resulted in better legibility, more information displaying capability and a wider
temperature range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even started replacing the
cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV
This section describes the operation modes of LCD’s then describe how to program and
interface an LCD to 8051 using Assembly and C.
In recent years the LCD is finding widespread use replacing LEDs(seven-segment LEDs
or other multisegment LEDs).This is due to the following reasons:
The declining prices of LCDs.
The ability to display numbers, characters and graphics. This is in
contract to LEDs, which are limited to numbers and a few characters.
Incorporation of a refreshing controller into the LCD, there by
relieving the CPU of the task of refreshing the LCD. In the contrast,
the LED must be refreshed by the CPU to keep displaying the data.
Ease of programming for characters and graphics.
LCD pin description
The LCD discussed in this section has 14 pins. The function of each pins is given in
TABLE 1:Pin description for LCD:
+5V power supply
Power supply to
RS=1 to select
R/W=0 for write
R/W=1 for read
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
The 8-bit data bus
TABLE 2: LCD Command Codes
Command to LCD Instruction
Clear display screen
Shift display right
Shift display left
Display off, cursor off
Display off, cursor on
Display on, cursor off
Display on, cursor on
Display on, cursor blinking
Shift cursor position to left
Shift cursor position to right
Shift the entire display to the left
Shift the entire display to the right
Force cursor to beginning of 1st line
Force cursor to beginning of 2nd line
2 lines and 5x7 matrix
The LCDs used exclusively in watches, calculators and measuring instruments
are the simple seven-segment displays, having a limited amount of numeric data. The recent
advances in technology have resulted in better legibility, more information displaying capability
and a wider temperature range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even started replacing the
cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV
Sending commands and data to LCDs with a time delay:
Fig 21: Interfacing of LCD to a micro controller
To send any command from table 2 to the LCD, make pin RS=0.
for data, make RS=1.Then send a high –to-low pulse to the E pin to enable the internal latch of
The power supplies are designed to convert high voltage AC mains
electricity to a suitable low voltage supply for electronics circuits and other devices. A power
supply can by broken down into a series of blocks, each of which performs a particular function.
A d.c power supply which maintains the output voltage constant irrespective of a.c mains
fluctuations or load variations is known as “Regulated D.C Power Supply”
For example a 5V regulated power supply system as shown below: