This document provides instructions for an assignment to design circuit diagrams using AND, OR and NOT gates to generate outputs P and Q from inputs X, Y, Z according to the given logic expressions, without simplifying the expressions, and to establish the relationship between P and Q using a truth table. The assignment is due on June 1st, 2015 by 5:00pm.

1. CSE 340
Assignment 1
a. Using AND, OR and NOT gates only, design circuit diagrams to generate P and Q from
inputs X, Y, Z where 𝑃 = (𝑋 + 𝑌̅)(𝑌 ⊕ 𝑍) and 𝑄 = 𝑌̅ 𝑍 + 𝑋𝑌𝑍̅. Do not simplify, or
otherwise modify, these expressions.
b. By mean of a truth table establish a relationship between P and Q.
Submissiondate 1.6.15 by 5.00pm.