Electrical Power Eng. Program
Level (4)
Power Electronics Applications
Dr. Ahmed Abbas Elserougi
1
Introduction
Electrical Sources Electrical Loads
DC AC
1-phase 3-phase
+
-
DC AC
3-phase
1-phase
M
M
Example: Three-phase
induction motor, heaters
,…etc
Example:
Home
appliances,
Heaters,…etc
Example: DC motor,
battery charging..etc
Power Electronics Converters
• PE converters are used for conversion and control of electric power
• Depending on the type of function performed, power electronic converters
are categorized into following types.
1) AC to DC = Rectifier: It converts AC to unipolar (DC) current (Ex: diode
rectifiers)
2) DC to DC = Chopper: It converts constant to variable DC (Buck, Boost,
Buck-Boost converters)
3) AC to AC = AC voltage controller: It converts line AC supply to AC of
desired voltage magnitude. (Back-to-Back thyristors)
4) DC to AC = Inverter: It converts DC to AC of desired frequency and voltage
magnitude.
5) Two-stage Conversion (AC-DC-AC)
4
Industrial/Power Electronics Converters
DC AC
Inverters
Rectifiers
AC voltage
Controllers
-On/Off control
-phase angle control
DC choppers
-Buck Vout=DVin
-Boost Vout=Vin/[1-D]
-Buck Boost |Vout|=D*Vin/[1-D]
D: controlled switch duty cycle 0<D<1
Motor Drives (Speed control of motors)
M
M
+
-
The Direct on line operation does not provide speed control option. To
have speed control option, Industrial electronics converters should be
used.
Here DC Motor is connected to
Constant DC source
Constant speed operation
with no speed control option!!!!
Three-phase motor is connected
to the grid at constant voltage
and frequency Constant speed
operation with no speed control
option!!!!
Motor Drives (Speed control of motors)
M
M
+
-
DC-DC converter (Chopper) is used
To control the armature voltage (Va)
of DC motor, and hence control the
Speed of the motor.
Different options
for speed control
of AC motors
Chopper
Rectifier
Inverter
+
Vdc
-
M
AC
voltage
controller
M
Inverter
+
-
+
Va
-
Semiconductor device is the main element
of these converters
Semiconductor devices
Semiconductor devices:
Devices are used as electrical switches in power electronics (ON or OFF)
Switches
ON-OFF
Uncontrolled
Controlled
ON-Controlled
OFF-uncontrolled
ON-OFF
Controlled
Diode
Applications:
1- AC-DC converters
(uncontrolled Rectifiers)
(low frequency power
diodes, 50Hz)
2- DC-DC converters (fast
recovery diodes, few kHz)
Thyristor
Applications:
1- AC-DC converters
(controlled Rectifiers)
2- AC-AC converters
(AC voltage controllers)
Low frequency, 50Hz
BJT , MOSFET , IGBT
Applications:
DC-AC converters (inverters)
DC-DC converters (choppers)
Diode as a switch (on-off uncontrolled switch)
• When VAK>0 The diode is turned-on
• After turn-on, when iAK drops to zero  the diode is turned-off
• Forced commutation process: it is possible to force the diode to turn-off while it carries
current by applying negative voltage across its terminals (vAk<0).
• There is low frequency power diodes for rectifier circuits, and fast recovery diodes (high
frequency) for switched mode power supplies applications.
k
A A
k
iAK
-
vAK
+
A
k
vAk>0
A
k
iAk drops to zero
or vAk<0
iAK
Uncontrolled Rectifiers
11
1-ph
AC
supply
3-ph
AC
supply
DC-link DC-link
+
vo=Vph-peak
-
+
vo =VLine-peak
-
Thyristor as a switch (on-controlled off-uncontrolled
switch)
• When VAK>0 and ig isinjected (firing) The thyristor is turned-on
• When VAK>0 and ig is not injected  The thyristor remains open
• After turn-on, when iAK drops to zero  the thyristor is turned-off
• Forced commutation process: it is possible to force the thyristor to turn-off while it carries
current by applying negative voltage across its terminals (vAk<0).
• The thyristors are low frequency devices, which are used in rectifier and AC voltage controller
circuits
k
A
A
k
iAK
-
vAK
+
A
k
vAk>0
and ig injected
A
k
iAk drops to zero
or vAk<0
iAK
g
-
vgK
+
ig
Control
current
BJT as a switch (on-off controlled electrical switch)
• The BJT can be used as an electric switch between the collector (C) and Emitter (E). The
ON and OFF conditions can be controlled via the base (B) current iB
• Cut-off case, at iB=0 the switch is OFF
• Saturation case, at iB= iB satthe switch is ON
• BJT is current-controlled switch (used in low voltage, low frequency applications)
C
E
B
C
E
C
E
iB
iB=0 iB= iB sat
Control
current
IGBT as a switch (on-off controlled electrical switch)
• The IGBT can be used as an electric switch between the collector (C) and Emitter (E). The ON
and OFF conditions can be controlled via the voltage between the Gate (G) and (E), VGE
• at VGE=0 the switch is OFF
• at VGE= 15 V the switch is ON
• IGBT is voltage-controlled switch (used in high voltage, medium frequency applications)
C C
E
C
E
VGE=0 VGE=15 V
E
G
+
VGE
----------
Control
voltage
MOSFET as a switch (on-off controlled electrical switch)
• The MOSFET can be used as an electric switch between the Drain (D) and Source (S). The ON
and OFF conditions can be controlled via the voltage between the Gate (G) and (S), VGS
• at VGS=0 the switch is OFF
• at VGS= 15 V the switch is ON
• MOSFET is voltage-controlled switch (used in low voltage, high frequency applications)
D D
S
D
S
VGS=0 VGS=15 V
S
G
+
VGS
----- -----
Control
voltage
Course Content
• MOSFETs/IGBTs Gate Drives (Isolation
requirements)
• Inverters with square-wave output
Single-phase
three-phase
• Deadtime
• Snubber circuits
• Conduction and switching losses of
IGBTs/MOSFETs.
• Thermal management and heatsink design
16
• 2L-inverter modulation techniques
Selective harmonic elimination (single-
phase and three-phase).
PWM Inverters (single-phase and three-
phase)
Space Vector Modulation for three-phase
two-level inverters.
• Multilevel inverters
Neutral Point Clamped
Flying Capacitors
Cascaded H-bridge
• Uninterruptable Power Supply (UPS)
Gate/Base Drive Circuits
(Isolation)
MOSFETs/IGBTs Gate Drives
• MOSFETs and IGBTs are on-off controlled switches , which are the
main types of inverters semiconductor devices.
• Gate drive circuit is needed to drive the MOSFET/IGBT.
• For example: a TLP 250 is opto-coupler based gate drive for MOSFETs
and IGBTs (opto-isolator MOSFET/IGBT gate drive).
25
TLP250-based Gate Drive Circuit
TLP250
+
-
50 Ω
220 Ω 0.1 µF
12 V
µC
Ground 1
Ground 2
IGBT
G
C
E
26
Gate Drive
Inverters with Square-wave
Output
Single-phase half-bridge two-level inverter
27
Single-phase Half-bridge Inverter with square
wave output
T1
T2
ON
OFF
ON
ON
OFF OFF
vo
+Vd/2
-Vd/2
t
t
t
0.5T T
0.5T T
T
• AC output voltage is obtained, where square-wave= fundamental+ Harmonics.
• By controlling the value of T, output frequency is controllable.
• Output voltage magnitude can be controlled, if the voltage Vd is controllable. If
not, the output voltage magnitude will be fixed.
T=1/f = periodic time
Vo rms= 0.5Vd
28
Single-phase Half-bridge Inverter with square
wave output (Cont.)
vo
io ????
AC load
• The generated load voltage is a square wave irrespective of the load type.
• What is the shape of corresponding load current???
Inverter output
29
Single-phase Half-bridge Inverter with square
wave output (Cont.)
The corresponding load current depends on the load type.
In case of resistive load (R):
• The load current shape will be like output voltage shape as shown.
• The load power po(t)=vo(t)*io(t) is shown below.
• When vo+ and io+  io passes through T1.
• When vo- and io-  io passes through T2.
• Diodes are not conducting in resistive loads.
• Based on power invariance condition:
VdId ave= Po ave average supply current Id ave=Vd/4R
vo
+Vd/2
-Vd/2
t
T
io
+Vd/2R
-Vd/2R
t
T
po
V2
d/4R
t
30
0.5T
Single-phase Half-bridge Inverter with square
wave output (Cont.)
In case of inductive load (RL with τ = L/R):
• The load current has exponential variations
with τ = L/R. At steady-state, the load
current lags the load voltage by certain
angle.
• Vo+ , io+  io passes through T1.
• Vo+ , io-  io passes through D1.
• Vo- , io-  io passes through T2.
• Vo- , io+  io passes through D2.
vo +Vd/2
-Vd/2
t
io
t
po
t
D2
T1
D1 T2 D1 T1
iD1
T/2 T
+Imax
-Imax
iT1
31
Single-phase Half-bridge Inverter with square
wave output (Cont.)
In case of inductive load (RL with τ = L/R):
Based on the step response of the 1st order RL
circuit, load current peak is given by;
Imax= (Vd/2R)*[(1-e-T/2τ)/(1+e-T/2τ)]
vo +Vd/2
-Vd/2
t
io
t
po
t
D2
T1
D1 T2 D1 T1
iD1
T/2 T
+Imax
-Imax
iT1
32
Fourier Analysis
vo +Vd/2
-Vd/2
t
T/2 T
Odd function
Fundamental
component
Harmonics
(not desired) 33
• The square-wave output of the single phase half-bridge inverter can be
extracted to summation of sinusoidal functions using Fourier series.
• vo(t)=∑ Vpn sin (nωot)
, , ,..
Where ωo is the fundamental angular velocity (rad/s),
Vpn=peak voltage of nth harmonics= ∫ ( )∗sin (nωot) dωot
i.e. , Vpn=
2Vd
nπ
• vo(t)=
2Vd
π
[sin (ωot) + sin (3ωot)+ sin (5ωot)+……]
t
Fourier Analysis (Cont.)
Fundamental (n=1)
3rd (n=3)
5th (n=5)
Fundamental+3rd + 5th +……..=~ square
1
1/3
1/5
Von(t)/Vp1
34
Fourier Analysis (Cont.)
• Based on Fourier series, the generated square-wave voltage can
be represented by series connected voltage sources of different
magnitudes and frequencies as shown.
• Using superposition, the load current of each frequency can be
calculated, where Zn=|Zn|∟φn (where n =1,3,5,….)
• io(t)=
2Vd
π|Z1|
sin(ωot- φ1)+
2Vd
3π|Z3|
sin(3ωot- φ3)+
2Vd
5π|Z5|
sin(5ωot- φ5)+…..
• Ipn=peak current of nth harmonic=
2Vd
nπ|Zn|
+
-
+
-
+
-
io??
Vp1 ,fo
Vp3 ,3fo
Vp5 ,5fo
Zn
35
Fourier Analysis (Cont.)
• Zn in case of R load is given by; |Zn|=R, φn =0
• Zn in case of RL load is given by; |Zn|= R2+(nωoL)2 , φn=tan-1(nωoL /R)
• Similarly for any other types of loads.
• The RMS of the output voltage, Vorms =
V2
p1+ V2
p3+ V2
p5+ V2
p7+….
• The RMS of the output current, Iorms =
I2
p1+ I2
p3+ I2
p5+ I2
p7+….
36
Fourier Analysis (Cont.)
• Total Harmonic Distortion (THD)
This factor shows the quality of the output voltage/current, i.e. it shows
how much the output is close to the fundamental component.
Voltage THD= THDv= V2
o rms−V2
o1 rms /Vo1 rms
Current THD= THDi= I2
o rms−I2
o1 rms /Io1 rms
Where Vo1 rms and Io1 rms are the fundamental rms output voltage and
current, i.e. Vo1 rms=Vp1/ 2 and Io1 rms=Ip1/ 2
• As the THD decreases, as the quality of output increases.
37
Fourier Analysis (Cont.)
• Harmonic factor (HFn)
This factor shows the ratio between the nth harmonic and the
fundamental component.
HFn=
Vpn
Vp1
• Lowest order harmonic (LOH)
It shows the nearest harmonic order with magnitude >3% of the
fundamental magnitude.
38
Fourier Analysis (Cont.)
• For half-bridge inverter with square-wave output
vo(t)=∑ sin( )
, , ,..
THDV= V2
o rms−V2
o1 rms /Vo1 rms=
V2
p3+ V2
p5+ V2
p7+….
V2
p1
=
( ) +( ) +( ) +( ) + ⋯ = ~0.48 (48%)
• A square wave actually has about 48% total harmonic distortion meaning
that the RMS of the harmonics is about 48% of the RMS of the
fundamental frequency.
HFn=
Vpn
Vp1
=
1
n and LOH=3
1 3 5 7 9 ….
n
(V
pn
/V
p1
)% 100%
33.3%
20% 14.3% 11.1%
39
Fourier Analysis (Cont.)
• Powers with the existence of harmonics:
1) Active Power=P=∑ , , ,.. (W)
where = 0.5 cos
2) Reactive Power=Q=∑ , , ,.. (VAR)
where = 0.5 sin
3) Apparent Power S=Vorms Iorms (VA)
4) Distortion reactive power=D= − − (VAR)
5) Total reactive Power=QT= + (VAR)
6) Power factor= P/S
7) Displacement Factor= cos
P
Q
D
QT
S
Represents the
interaction of
voltage and
current of same
frequency
Represents the
interaction of voltage
and current of
different frequencies
40
Disadvantages of Single-Phase Half-Bridge
Inverter
• The main drawback is the need for bulk DC capacitors to ensure operating
with low voltage ripple (the voltage ripple is a result of AC current
circulation through the capacitors).
• Alternatively, single-phase full-bridge inverter can be used.
41
+
-
Vd
+
-
Vd
+
-
+
-
R
R
+
-
+
-
C1
C2
C2
C1
Vd/2R
Vd/4R
Vd/4R
P
o
/V
d
=V
d
/4R
Vd/2R
P
o
/V
d
=V
d
/4R
Vd/4R
Vd/4R
0T/2 T/2 T
Disadvantages of Single-Phase Half-Bridge
Inverter (Cont.)
42
+
-
Vd
+
-
Vd
+
-
+
-
R
R
+
-
+
-
C1
C2
C2
C1
Vd/2R
Vd/4R
Vd/4R
V
d
/4R
Vd/2R
V
d
/4R
Vd/4R
Vd/4R
0T/2 T/2 T
C1 :Discharge
C2 : Charge
C1 :Charge
C2 : Discharge
0.5Vd
T/2 T
0
VC2
VC1
Voltage Ripple
As C increases,
Voltage ripple
decreases Bulk
Capacitances are
needed.
Inverters with Square-wave
Output
Single-phase Full-Bridge (H-bridge) Inverter
43
Single-phase Full-bridge Inverter with square
wave output
T1 ,T2
T3 ,T4
ON
OFF
ON
ON
OFF OFF
vo
+Vd
-Vd
t
t
t
0.5T T
0.5T T
T
• AC output voltage is obtained, where square-wave= fundamental+ Harmonics.
T=1/f = periodic time
Vo rms= Vd
44
oad
Single-phase Full-bridge Inverter with square
wave output (Cont.)
The corresponding load current (io)depends on the load type.
In case of resistive load (R):
• When vo+ and io+  io passes through T1 and T2 .
• When vo- and io-  io passes through T3 and T4.
• Diodes are not conducting in resistive loads.
• Pin=VdId ave= Po ave
i.e. average supply current Id ave=Vd/R
• Switch average current= 0.5(Vd/R)
• Diode average current=0
vo
+Vd
-Vd
t
T
io
+Vd/R
-Vd/R
t
T
po
V2
d/R
t
45
id
Vd/R
t
iT1
+Vd/R
t
0.5T
t
T
0.5T
VT1
+Vd
Single-phase Full-bridge Inverter with square
wave output (Cont.)
In case of inductive load (RL with τ = L/R):
• The load current has exponential variations
with τ = L/R. At steady-state, the load current
lags the load voltage by certain angle.
• Vo+ , io+  io passes through T1 and T2.
• Vo+ , io-  io passes through D1 and D2.
• Vo- , io-  io passes through T3 and T4.
• Vo- , io+  io passes through D3 and D4.
• Anti-parallel diodes are important to provide
paths for current (when needed)
vo +Vd
-Vd
t
io
t
po
t
D3
D4
T1
T2
D1
D2
T3
T4
D1
D2
T1
T2
iD1
T/2 T
+Imax
-Imax
iT1
46
Single-phase Half-bridge Inverter with square
wave output (Cont.)
In case of inductive load (RL with τ = L/R):
Based on the step response of the 1st order RL
circuit, load current peak is given by;
Imax= (Vd/R)*[(1-e-T/2τ)/(1+e-T/2τ)]
vo +Vd
-Vd
t
io
t
T/2 T
+Imax
-Imax
47
Fourier Analysis
vo +Vd
-Vd
t
T/2 T
Odd function
Fundamental
component
Harmonics
(not desired)
48
• vo(t)=∑ Vpn sin (nωot)
, , ,..
Vpn=peak voltage of nth harmonics= ∫ ∗sin (nωot) dωot
i.e. , Vpn=
4Vd
nπ
• vo(t)=
4Vd
π [sin (ωot) + sin (3ωot)+ sin (5ωot)+……]
Fourier Analysis (Cont.)
• Using superposition, the load current of each frequency can
be calculated, where Zn=|Zn|∟φn (where n =1,3,5,….)
• io(t)=
4Vd
π|Z1|
sin(ωot- φ1)+
4Vd
3π|Z3|
sin(3ωot- φ3)+
4Vd
5π|Z5|
sin(5ωot- φ5)+…..
• Ipn=peak current of nth harmonic=
4Vd
nπ|Zn|
+
-
+
-
+
-
io??
Vp1 ,fo
Vp3 ,3fo
Vp5 ,5fo
Zn
49
Example
• Single-phase full-bridge inverter with square-wave output, feeding a
series (RLC) AC load where R=1 ohm, XL= 6 ohm , XC= 7 ohm at
fundamental frequency (1000 Hz). If the DC voltage=230V and current
harmonics other than fundamental are neglected.
1) Sketch output voltage, fundamental output current, supply current,
switch current, switch voltage, diode current and diode voltage.
2) Indicate the devices that conduct during different intervals of one
cycle.
3) Find power delivered to the load due to fundamental component.
50
Solution
• At fundamental
Z1=1+j6-j7=1-j1 ohm= 1.41 ∟-45o ohm
Vp1=4*230/(π)=293 V Ip1=Vp1/|Z1|=208 A
io1=208 ∟45o A (leading)
• Po1= 0.5 I2
p1 R ~= 21.5 kW
51
vo +230 V
-230
t
io
t
D3
D4
T1
T2
D1
D2
T3
T4
iD1
1 ms
iT1
VT1
VD1
id
T1
T2
D1
D2
+230
-230
Inverters with Square-wave
Output
Three-phase inverter
(1800 conduction mode)
52
Three-Phase Inverter (1800 conduction-Y Load )
53
• T1 and T4 are controlled
to generate square-wave
voltage Vao.
• T3 and T6 are controlled
to generate square-wave
voltage Vbo which lags Vao
by 120 deg.
• T5 and T2 are controlled
to generate square-wave
voltage Vco which lags Vbo
by 120 deg.
• Vao , Vbo, Vco are three-
phase two-level voltages
• Line voltage Vab equals
Vao-Vbo. Similar for the
other line voltages.
Vd
+
Vd/2
-
o a b c
T1
T4
T5
T2
T3
T6
n
Vao
Vco
Vbo
ia
ib
ic
van
id
+
Vd/2
-
54
T1 T1 T1 T4 T4 T4
T3 T3 T3
T2 T2 T2
T6
T6 T6
T5 T5
T5
0 600 1200
1800 2400 3000 3600
vao
vbo
vco
vab
vbc
vca
+Vd/2
-Vd/2
+Vd/2
+Vd/2
-Vd/2
-Vd/2
+Vd
-Vd
+Vd
-Vd
+Vd
-Vd
0-600 600-1200
1200-1800
1800-2400
2400-3000 3000-3600
Vd
n
a c
b
Z Z
Z
Van=vcn=vd/3
Vbn= -2vd/3
Vd
n
a
c
b
Z
Z
Z
Van=2vd/3
Vbn= Vcn = -vd/3
Vd
n
a
c
Z Z
Z
Van=vbn=vd/3
Vcn= -2vd/3
b
n
b
Z
Z
Z
Vbn=2vd/3
Van= Vcn = -vd/3
a c
Vd
n
b c
a
Z Z
Z
Vbn=vcn=vd/3
Van= -2vd/3
n
c
a
b
Z
Z
Z
Vcn=2vd/3
Van= Vbn = -vd/3
Vd
Vd
55
T1 T1 T1 T4 T4 T4
T3 T3 T3
T2 T2 T2
T6
T6 T6
T5 T5
T5
0 600 1200
1800 2400 3000 3600
van
vbn
vcn
0-600 600-1200
1200-1800
1800-2400
2400-3000 3000-3600
Vd
n
a c
b
Z Z
Z
Van=vcn=vd/3
Vbn= -2vd/3
Vd
n
a
c
b
Z
Z
Z
Van=2vd/3
Vbn= Vcn = -vd/3
Vd
n
a
c
Z Z
Z
Van=vbn=vd/3
Vcn= -2vd/3
b
n
b
Z
Z
Z
Vbn=2vd/3
Van= Vcn = -vd/3
a c
Vd
n
b c
a
Z Z
Z
Vbn=vcn=vd/3
Van= -2vd/3
n
c
a
b
Z
Z
Z
Vcn=2vd/3
Van= Vbn = -vd/3
Vd/3
2Vd/3
-Vd/3
-2Vd/3
Vd/3
2Vd/3
-2Vd/3
-Vd/3
-2Vd/3
-Vd/3
Vd/3
2Vd/3
Six- Step Phase Voltages
Vd
Vd
Conducting devices
56
Conducting
device
Conducting
device
Vao +, Ia + T1 Vao +, Ia - D1
Vao -, Ia - T4 Vao -, Ia + D4
Vbo +, Ib + T3 Vbo +, Ib - D3
Vbo -, Ib - T6 Vbo -, Ib + D6
Vco +, Ic + T5 Vco +, Ic - D5
Vco -, IC - T2 Vco -, Ic + D2
Phase Currents and Input current (R-Load)
57
van
vbn
vcn
ia
ib
ic
Vd/3
2Vd/3
Vd/3R
2Vd/3R
iT3
iT5
Vd/3R
iT1
2Vd/3R
id
+2Vd/3R
+Vd
Vd/3R
2Vd/3R
2Vd/3R
Vd/3R
vT1
Pin=id ave*Vd=2V2
d /3R
Pout=3 i2
a rms*R= 2 V2
d /3R
id=iT1+iT3+iT5
Ia rms= ( ( + + ))= Vd/3R
0 600 1200
1800 2400 3000 3600
0 600 1200
1800 2400 3000 3600
Phase Currents and Switches current (RL-Load)
58
van
ia
Vd/3
2Vd/3
D1 D4
T1
T4
iT1
0 1800
3600
iD1
1800
vao
Vd/2
-Vd/2
Fourier Analysis (Y-connected load)
• Line voltage
=
4
cos
6
sin ( +
6
)
, , ,…
• For n=3, cos = 0 Triplen harmonics are absent from the line voltage.
• RMS value of nth component of line voltage= VLn RMS = cos
• RMS value of fundamentalcomponent of line voltage= VL1 RMS = cos
= 0.78
• RMS value of line voltage (from graph)= VL RMS = ∫ = =0.8165
59
Fourier Analysis (Y-connected load)
• Phase voltage
=
2
sin
, , , , …
• RMS value of fundamental phase voltage=
• RMS value of phase voltage (from the graph)=
( ( + + )) =
60
Inverters with Square-wave
Output
4- Three-phase inverter
(1200 conduction mode)
61
(1200 conduction-Y Resistive Load )
62
• In this mode, Each IGBT
conducts for 120 deg only.
• IGBTs are working
sequentially (one by one)
T1T2T3T4T5T6
Vd/2
Vd/2
o a b c
T1
T4
T5
T2
T3
T6
n
Vao
Vco
Vbo
ia
ib
ic
van
id
R R R
63
T1 T1 T4 T4
T3 T3
T2 T2
T6
T6
T5 T5
0 600 1200
1800 2400 3000 3600
vao ,van
vab
ia
+Vd/2
-Vd/2
+Vd/2
+Vd/2
-Vd/2
-Vd/2
+Vd
-Vd
0-600 600-1200
1200-1800
1800-2400
2400-3000 3000-3600
Van=vd/2
Vbn= -vd/2
Vd
n
a
c
R
R
+Vd/2
-Vd/2
vbo ,vbn
vco ,vcn
Vd
n
a
b
R
R
Vd
n
b
c
R
R
Vd
n
b
a
R
R
Vd
n
c
a
R
R
Vd
n
c
b
R
R
Vcn= 0
Van=vd/2
Vbn=0
Vcn= -vd/2
Van=-vd/2
Vbn= vd/2
Vcn= 0
Van=0
Vbn= vd/2
Vcn= -vd/2
Van= -vd/2
Vbn= 0
Vcn= vd/2
Van=0
Vbn= -vd/2
Vcn= vd/2
+Vd/2R
-Vd/2R
I2
a rms= (1/π)((2π/3)*(V2
d/4R2))= V2
d/6R2
PLoad= 3 I2
a rms R= V2
d/2R
iT1
+Vd/2R
Fourier Analysis
• Phase Voltage
=
2
, , ,…
cos
6
sin ( +
6
)
• Phase Voltage, Fundamental, Peak= cos =0.3898 Vd
• Phase Voltage, Fundamental, RMS=
0.3898
Vd
• Phase Voltage, RMS (graph)= ∫ =0.4082 Vd
64
Fourier Analysis
• Line Voltage
=
3
, , , , ,…
sin ( +
3
)
• Line Voltage, Fundamental , Peak=
• Line Voltage, Fundamental , RMS= =0.6752 Vd
• Line Voltage, RMS (graph)=
∫ + ∫ + ∫ =
65
Question
Three-phase inverter feeding a resistive load Vd=450 V Y-connected
load of 10 ohm determine for a) 180 deg mode and b) 120 deg mode
the following
(i) RMS value of load current
(ii) RMS value of switch current
(iii) Load power
66
180 deg 120 deg
RMS of load current 21 A 18.37 A
RMS of switch current 15 A 13 A
Average load power 13 kW 10.125 kW
Answers
Dead-time of leg
semiconductors
67
Dead-time of leg semiconductors
• Each switch has turn-on and turn-off times (i.e. it
takes certain time to complete the turn-on or turn-off
actions), so when Ta- is operated as a complement of
Ta+ (as shown below), short-circuit occurs across the
DC input Voltage.
68
Vd
a
Ta+
Ta-
leg
Control Signals
Ta+
Ta-
ON ON
ON
OFF
OFF OFF
Short-circuit on
DC input Voltage
at these instants
Dead-time of leg semiconductors (Cont.)
• To avoid short-circuit on the DC input voltage
during the transition instants, deadtime (td) is
used as shown below, where a deadtime of 1-2 µs
is very sufficient.
69
Vd
a
Ta+
Ta-
leg
Control Signals
Ta+
Ta-
ON ON
ON
OFF
OFF OFF
td td
Dead-time of leg semiconductors (Cont.)
• The implementation of deadtime circuit can be done using ON-
delay timers as follows.
• The rising edge of the timer output is delayed by td from the
rising edge of its input (i.e. delayed ON).
• The falling edge of the timer output happens at the same
instant of the falling edge of its input (simultaneous OFF).
70
Vd
a
Ta+
Ta-
leg
Control Signal
Upper switch
Control Signal
Lower switch
S
S’
ON delay
(td)
ON delay
(td)
Control Signal
Ta+
Control Signal
Ta-
S
S’
Control Signal
Ta+
Control Signal
Ta-
Dead-time of leg semiconductors (Cont.)
• IR 2111 Gate Driver IC can be used for Half-bridge leg with built-
in deadtime instead of implementing two TLP 250 gate-drive
circuits with deadtime (one for upper switch and one for lower
switch). The connections of IR 2111 IC is shown below.
71
Snubber Circuits
What is a Snubber Circuit?
• Snubbers are any of several simple energy absorbing circuits used to
eliminate voltage spikes caused by circuit inductance when a switch
opens.
• The object of the snubber is to eliminate the voltage transient and
ringing that occurs when the switch opens by providing an alternate
path for the current flowing through the circuit leakage inductance.
What is the problem?
• When this switch is turned-off,
The interaction between the energized
leakage inductance and parasitic capacitance
results in transient over-voltage across switch
(under-damped response of LC circuit) with
steady state voltage of Vd. If the peak value is
higher than the switch capability, the switch may
damage due to voltage stresses.
The solution is to add a circuit across the switch
to damp the over voltage and oscillations (i.e.
snubber circuit)
Snubber circuits
• The simplest type of snubber circuits is to add
proper external capacitor (Csnu) across the
switch. When the switch is turned-off, Csnu can
provide a path for stray inductance current and
absorb the inductance energy which results in
limiting the voltage across the switch, i.e. Csnu
will be charged.
• But when the switch is turned-on, the capacitor
will be shorted and discharge in the switch (over
current stresses on switch).
• Resistor can be added in series with Csnu to
resolve this issue and dissipate the energy stored
in the capacitor during turn-on condition.
RC snubber circuit
• From the name itself, it is uses resistor and
capacitor to form a snubber circuit. This is
commonly used snubbers for switching
MOSFETs. It is very effective on turn-off
surge voltage suppression.
RC snubber circuit
How RC Snubber Works
• RC snubber is commonly used in switching converters to limit the
voltage spike on the switching device into a safe level. Not just by
simply clamping the voltage spike alone, but also modifying the spike
frequency or ringing behavior to prevent further issue.
RC snubber design
~ =
is the leakage inductance
Coss is the parasitic capacitance of the switch
Ringing frequency of vsw without snubber circuit, i.e. fr=
With respect to R value:
With respect to Csnu value:
The larger C, the lower oscillations but the larger power loss
The trend is to keep the power loss few tens of mW (i.e., 20-50mW) to avoid hot spots.
Power losses in snubber is given by;
Ploss= Csnu V2
Csnu fsw
Where fsw is the switching frequency, VCsnu steady state voltage across snubber capacitor after turn-off.
Example: RC snubber circuit design
If Stray inductance=250 nano-Henry, ringing frequency without
snubber circuit=fr= 25 Mega-Hz, design Proper RC snubber circuit for
MOSFET, where Voltage on drain at turn-off is 20 V assuming 200kHz
switching frequency.
Solution:
• fr= → Coss=162 pF
• ~ = =39 Ω
• Ploss= Csnu V2
Csnu fsw 25mW= Csnu (20)2 (200000) Csnu=312.5 pF
312.5 pF
39 Ω
Other types of snubber circuits
• RCD snubber
• In addition to peak voltage limiting,
the circuit can reduce the total circuit
loss.
• For diode, a fast recovery diode type
is suitable.
Charge
discharge
Switching and Conduction
Losses of Controlled Switches
83
1- Switching Losses
84
+
-
Io
Vo
+
-
vT
iT
Control signal
of (T)
iT
vT
iT
vT
Ps
Zoom (1-cycle)
OFF ON OFF ON
ton toff
Vo
Io
0
Vo Vo
Vo
Io
ton toff
IoVo
t
t
t
t
t
t
Switching losses= average of (Ps)=
Area under curve /Ts =
(0.5IoVo ton+ 0.5IoVo toff) / Ts=
(0.5IoVo ton+ 0.5IoVo toff)fs=
Ps= 0.5IoVo fs(ton+ toff)
Ts
0 2Ts
• ton: is the turn-on
time of the switch.
• toff: is the turn-off
time of the switch.
• fs: switching
frequency= 1/Ts
2- Conduction losses
• It is losses due to conduction due to on-
state voltage (Von=1-2 V) and on-state
resistor (Ron ,mΩ) of the switch.
• PC= Von Iave + I2
RMS Ron
• Inverters have switching losses and
conduction losses =~ 3-5%, i.e. efficiency
=~95-97%
85
Ron
von
i(t)
Example
• Find the switching and conduction losses of single-phase half-bridge
inverter feeding resistive load of 10 Ω where Vd=200V, ton=toff=1 µs ,
on-state voltage of IGBT = 2V, On-state resistance of IGBT=5 mΩ and
switching frequency of 1kHz.
Solution:
• Ps per switch = 0.5IoVo fs(ton+ toff)=0.5(Vd/2R)(Vd) fs(ton+ toff)
• PC per switch = Von Iswitch average + I2
switch RMS Ron=
Von [0.5(Vd/2R)] + [0.5(Vd/2R)2]Ron
86
Example
Three-phase inverter feeding a resistive load Vd=450 V Y-connected
load of 10 ohm at 1 kHz if ton=toff=0.75 µs , on-state voltage of IGBT
=1.35 V, On-state resistance of IGBT=2 mΩ.
determine for a) 180 deg mode and b) 120 deg mode the following
(i) Conduction losses per switch
(ii) Switching losses per switch
(iii) Total inverter losses
87
Thermal Management and
Heatsink Design of
semiconductor devices
Thermal Management and Heat Sink Design
• In this part following points to be covered
1- Thermal and heat transfer mechanism equations (mainly, thermal
conduction)
2- How to design a heatsink
3- How to estimate the junction temperature of a device (Tj) for
different cooling cases.
Source of Heat in Power Electronic Devices
• The conduction and switching losses of the device (Ploss ) in Watt is the
source of heat which rises the temperature of the device above the
ambient temperature (Tabm), i.e. leads to temperature difference (ΔT),
i.e. PLOSS  ΔT. The relation as follows;
ΔT= Temperature difference between two points (1,2)
L= length is the distance between these points
A= cross sectional area
K= thermal conductivity of material
Thermal Resistance:
Analogy between electrical and thermal
system
Electrical
resistance thermal
resistance
=Rθ
Rθ=
Example1 (MOSFET without heatsink)
For PLOSS=6W , Ambient Temp= 25oC , and thermal data of the switch
(Data sheet) is as follows;
With heatsink
Without heatsink
Example1 (no heatsink)
Very high temp.!!!
Heatsink is important
Equivalent circuit for device with heatsink
• Let’s assume we have power MOSFET connected to a heatsink
through thermal conductor as shown below.
The heat produced inside the MOSFET goes through the materials
and then is dissipated by the heatsink. We can define here three
different thermal resistance between the junction of MOSFET and the
ambient temperature as follows;
Equivalent circuit for device with heatsink
PLOSS is the thermal source
(Rθjc)
(Rθcs)
(Rθsa)
The equivalent circuit is used to check the
temperature of MOSFET junction.
Rθjc
Rθcs
Rθsa
T1
T2= T1+PLOSS(Rθjc+Rθcs+Rθsa)
Obtained from thermal conductor specs
Obtained from device data sheet
Obtained from heatsink data (curves)
Heatsink curves (natural cooling)
• We look to the
highlighted axes, we
enter with PLOSS in
Watt, to get the
temperature rise
above ambient in oC.
• For example, E51,
Ploss=6W, Temp rise
above ambient =49oC
Natural cooling curves
Heatsink curves (Forced cooling)
• We look to the
highlighted axes, we
enter with Air
velocity, to get
thermal resistance
from surface to
ambient.
Forced cooling curves
Thermal graph of a heatsink
Thermal resistance of thermal conductor
• In order to have proper
connection between the MOSFET
and heatsink, a proper thermal
conductor is used to provide
good thermal contact between
them to ensure that all the area
of the MOSFET is properly
connected to the heatsink and
also ensure that the MOSFET is
electrically isolated from the
heatsink.
• Rθcs depends on the material we
will select. Here are the values of
thermal resistances for different
common materials used as
thermal conductor.
Example2 (MOSFET with heatsink +natural
cooling)
For same data in Example1, repeat calculations if heatsink with the
following specs is employed assuming natural cooling and silicon pads
are used.
Example2
Example2
Example2
Junction Temperature is reduced from 400oC to 100oC when heatsinks +natural cooling is employed
Example3 (MOSFET with heatsink +forced
cooling)
For same data in Example1, repeat calculations if heatsink with the
following specs is employed assuming forced cooling (400 ft./min) and
silicon pads are used.
Example3
30% safety factor
Example3
Junction Temperature is reduced from 100oC to 70oC when heatsinks forced cooling is employed instead of natural cooling
Selective Harmonic
Elimination (SHE)
(Bipolar and Unipolar)
109
Bipolar Selective Harmonic Elimination (SHE)
• Assume the bipolar output voltage (vaO) is generated from half-bridg
inverter as follows:
110
Vd
a
Ta+
Ta-
O
+
Vd
-
2
+
Vd
-
2
Ta+
Ta-
α1
α2
α1
α2
vaO +ve half cycle (Ave+) -ve half cycle (Ave-)
α2
α1
π/2
π
2π
+0.5 Vd
-0.5 Vd
Ta+ ON vao=+Vd/2
Ta- ON vao=-Vd/2
Bipolar Selective Harmonic Elimination (Cont.)
The Fourier analysis for the shown output
voltage is given by;
Vpn= ∫ sin −
∫ sin + ∫ sin
/
i.e.,
Vpn= [1 − 2 cos + 2 cos ]
111
Ta+
Ta-
α1
α2
α1
α2
vaO
α2
α1
π/2
π
2π
α1
α2
+0.5 Vd
-0.5 Vd
Bipolar Selective Harmonic Elimination (Cont.)
As Vpn= [1 − 2 cos + 2 cos ],
the angles and can be selected to control two voltage components of
the output voltage FFT spectrum while keeping the switching frequency low.
For example: To achieve certain fundamental voltage magnitude (=A) and
eliminate one component of the harmonic components ( let it 3rd harmonic).
Vp1= [1 − 2 cos + 2 cos ]=A,
i.e. [1 − 2 cos + 2 cos ]-A=0 ----(1)
To eliminate 3rd harmonic Vp3 should =0, i.e.
Vp3= 1 − 2 cos 3 + 2 cos 3 =0 -----(2)
By solving Eqs (1) and (2) , suitable values of and can be estimated.
112
Bipolar Selective Harmonic Elimination (Cont.)
Note: If it is desired to eliminate the 3rd and 5th harmonics, following
equations can be used to find the suitable angle.
Vp3= 1 − 2 cos 3 + 2 cos 3 =0 -----(1)
Vp5= 1 − 2 cos 5 + 2 cos 5 =0 -----(2)
By solving Eqs: (1) and (2) , =23.60 and =33.30.
The corresponding fundamental component magnitude for these
values of angles is as follows:
Vp1= 1 − 2 cos + 2 cos =0.5342 Vd “Uncontrolled in this case”
113
Bipolar Selective Harmonic Elimination (Cont.)
Newton Raphson Method
If f(x)=0, find x=? .. Assume initial guess of x=xo
1st iterationx1= xo-[f(xo)/f’(xo)]
2nd iterationx2= x1-[f(x1)/f’(x1)]
3rd iterationx3= x2-[f(x2)/f’(x2)]
Example: f(x)=x2-4x-7=0 , find x=? Assume xo=5
Solution: f’(x)=2x-4
x1=5-[(52-4(5)-7)/(2(5)-4)]=5.33
x2=5.33-[(5.332-4(5.33)-7)/(2(5.33)-4)]=5.3166 ….. etc
114
Bipolar Selective Harmonic Elimination (Cont.)
Newton Raphson Method
System of non-linear equations:
If f1(x,y)=0 and f2(x,y)=0, find x, y=? .. Assume initial guess of x=xo and
y=yo
 1st iteration
115
= − [J] ,
( , )
( , )
[J] =
Bipolar Selective Harmonic Elimination (Cont.)
Newton Raphson Method for solving SHE equations to eliminate 3rd
and 5th Harmonics:
Assume initial guess α1(0)=200 , α2(0)=300
 1st iteration:
116
f1(α1 , α2)= 1 − 2 cos 3 + 2 cos 3 =0 -----(1)
f2(α1 , α2)= 1 − 2 cos 5 + 2 cos 5 =0 -----(2)
α ( )
α ( )
=
α ( )
α ( )
− [J] α ( ),α ( )
(α ( ), α ( ))
(α ( ), α ( ))
[J] =
α
α
α
α
Bipolar Selective Harmonic Elimination (Cont.)
Note:
Bipolar Output voltage with higher number of angles (α1 to αN) can be
generated. As a result, N component of output voltage Fourier components
can be controlled. Bipolar Output voltage with four angles (α1 to α4) are
shown below.
117
0.5Vd
-0.5Vd
VaO
2π
π
0.5π
α1
α2
α3
α4
Vpn= [1 − 2 cos + 2 cos − 2 cos + 2 cos ]
Bipolar Selective Harmonic Elimination (Cont.)
The load current shapes in case of SHE for different load types are
shown below.
118
0.5Vd
vao
2π
π
0.5π
-0.5Vd
Resistive Load
0.5Vd/R
ia
0.5π
-0.5Vd/R
Bipolar Selective Harmonic Elimination (Cont.)
The load current shapes in case of SHE for different load types are
shown below.
119
0.5Vd
vao
2π
π
0.5π
-0.5Vd
Inductive Load
ia
φ1
Bipolar SHE for three-phase Inverter
• Each leg in the three-phase converter is controlled as illustrated before for
the single-phase HB inverter, but with shifted voltages (1200 phase shift
between phases).
• For Y-connected load, as the triplen harmonics are cancelled from the line
voltages, no need to eliminate the 3rd Harmonic from vao , vbo and vco which
means that the angles (α1 and α2) are selected to control the magnitude
and eliminate 5th harmonic (not the 3rd). Or to eliminate the 5th and 7th
harmonics without controlling the fundamental magnitude.
• More angle can be used (α1: αN) to control the fundamental voltage
magnitude and eliminate (N-1) harmonics (5th ,7th , 11th , 13th , 17th , …etc)
“No need to eliminate triplen harmonics (3rd ,9th ,15th ,…)”
120
Unipolar SHE
• Assume the Unipolar output voltage (vab) is generated for Full-bridge
inverter as follows:
121
Vd
b
T3
T2
a
T1
T4
T1, T2 ON vab= +Vd
T3, T4 ON vab= -Vd
T1, T3 ON  vab= 0
T2, T4 ON vab= 0
T1
T2
T3
T4
2π
π
0 π/2
α1
α2
α3
vab
Vpn= [cos − cos + cos ]
+vd
-vd
0
Unipolar SHE (Cont.)
• Vpn= [cos − cos + cos ]
the angles , and can be selected to control three voltage components
of the output voltage FFT spectrum.
For Example: if the desired fundamental voltage =A and it is desired to remove
3rd and 5th harmonics, following equations can be used to find angles values;
• Vp1= cos − cos + cos =A cos − cos + cos -A=0 --(1)
• Vp3= cos 3 − cos 3 + cos 3 =0 --(2)
• Vp5= [cos 5 − cos 5 + cos 5 ]=0 --(3)
Eqs (1), (2), (3) are solved using Newton Raphson Method to get values of angles
122
Unipolar SHE (Cont.)
Note: if it is desired to remove 3rd , 5th and 7th harmonics, following equations
can be used to find angles values;
• Vp3= cos 3 − cos 3 + cos 3 =0 --(1)
• Vp5= [cos 5 − cos 5 + cos 5 ]=0 --(2)
• Vp7= [cos 7 − cos 7 + cos 7 ]=0 --(3)
Eqs (1), (2), (3) are solved using Newton Raphson Method to get values of angles.
The corresponding fundamental voltage is given by;
Vp1= cos − cos + cos “Uncontrolled in this case”
123
PWM inverters
124
PWM inverters
Advantages:
1) Ability to control output voltage without additional components
2) Low order harmonics can be eliminated, higher order harmonics can
be filtered easily, i.e. filtration requirement is minimized.
Disadvantages:
high switching frequency and high switching losses
PWM Inverters
PWM Inverters: it output voltage has constant
magnitude pulses, while The width of pulses is
modulated to obtain voltage control and reduce
harmonic content.
Classifications:
a) Single-PWM (Quazi-square).
b) Multi-PWM with equal pulse widths.
c) Sinusoidal PWM (SPWM) with unequal pulse widths
(pulse width is proportional to sin-wave amplitude
at the desired instant).
• Single-phase: Unipolar SPWM and Bipolar SPWM.
• Three-phase: Bipolar SPWM (without and with third
harmonic injection).
d) Space Vector Modulation (SVM) for three-phase two-
level inverters.
126
Single-PWM
Vo: 0, +, - (FB)
Multi-PWM
Vo: 0, +, - (FB)
Unipolar SPWM
Vo: 0, +, - (FB)
Bipolar SPWM
Vo: +, - (FB or HB)
vo vo
vo vo
vab
iab
+ - 0+ 0-
+
-
Single-PWM (Quazi-square Output)
• the reference signal is
compared with the carrier
signal as shown to generate
quazi-square output voltage.
• By varying the magnitude of
reference signal (Ar) from zero
to the carrier signal magnitude
(Ac), the pulse width of the
pulse per half cycle changes
from zero to π, i.e. changes the
rms of output voltage from 0 to
Vd.
• Define: Amplitude modulation
index (ma)=Ar/Ac where 0<ma<1
• (d/(0.5π))=Ar/Acma=2d/π.
127
Vd
b
T3
T2
a
T1
T4
vab
Control
Signals
D1
T3
D1
D2
T1
T2
D3
T1
D4
T2
D3
D4
T3
T4
D2
T4
iab
Carrier
Ac
Ar
Reference
π 2π
π
2
+Vd
-Vd
T1
T2
T3
T4
iab
2d
2d
d
T1, T2 on, Vab=+Vd
T3, T4 on, Vab=-Vd
T1, T3 on, Vab= 0
T2, T4 on, Vab= 0
(RL load)
Conducting devices
Single-PWM (Cont.)
• vab rms = ( ∗ 2 ) = = =
128
vab rms
0 1
0.5
0.25 0.75
0
0.71Vd
0.87 Vd
0.5Vd
Vd
vab
+Vd
2d
2d
-Vd
π 2π
Single-PWM (Cont.): Fourier Analysis
• Vab(t)= Ʃn=1,3,5,… Vpn sin (nwot)
Where Vpn= ∫ sin
Vpn= sin sin
Vab(t)= (sin sin - sin 3 sin 3 +
sin 5 sin 5 - …)
Note: at square-wave output d= π/2. by substituting
with this value in the above Fourier series , it gives the
Fourier series of the square wave.
129
vab
+Vd
2d
2d
-Vd
π 2π
π/2
• Example: if 2d= 720
The fundamental peak
Vp1= (4Vd/ π) sin 360= 0.75 Vd
Single-PWM (Cont.): Fourier Analysis
• Vpn= sin sin  |Vpn|/( ) = sin
|Vpn| /( )
130
2
π
2π/3
2π/5
1
1/3
1/5
n=1
n=3
n=5
• At 2d=1200  no 3rd harmonics
• At 2d=720 and 1440  no 5th harmonics
• At low 2d All harmonics become
comparable to fundamental..
i.e. voltage control can be
done but with great deal of
harmonics content
FFT for output voltage at ma=0.25, Vd=200 V
131
100%
FFT for output voltage at ma=0.75, Vd=200 V
132
100%
vab
iab
+ - 0+ 0-
+
-
Carrier-Based Multi-PWM
Vd
b
T3
T2
a
T1
T4
D1
T3
D1
D2
T1
T2
D3
T1
D4
T2
D3
D4
T3
T4
D2
T4
Conducting devices
iab
Carrier (fc) Reference(fr)
2π
π
π/2
AC
Ar
vab δ
• Multi-PWM is an extension for Single-PWM, where several equidistant
pulses per half-cycle are used.
• Define: N is number of pulses per half cycle where N=fc/2fr .
• Define mf=frequency modulation index= fc/fr
• Vab rms=
δ
• As number of pulses increases in each half cycle, low order harmonics
reduces but higher order harmonics increases (to be removed by filters).
• As number of pulses N increases, switching losses increases.
+Vd
-Vd
N=3
T1, T2 on, Vab=+Vd
T3, T4 on, Vab=-Vd
T1, T3 on, Vab= 0
T2, T4 on,Vab= 0
FFT for output voltage at ma=0.25,mf=20, Vd=200 V
134
FFT for output voltage at ma=0.75,mf=20, Vd=200 V
135
100%
Symmetrical Multi-PWM
136
vab
θ1
θ1
θ2
γ
δ
Assume: N pulse per half cycle
θ1= (π-Nδ) / (N+1)
θ2= δ/2
γ= θ1+θ2
θ1
π
0
Timers are used to generate the output voltage
+Vd
Symmetrical Multi-PWM (Cont.): Fourier
137
vab
γ-(δ/2)
γ
δ
For 2 pulse per half cycle: vab(t)= Ʃn=1,3,5,… Vpn sin (nwot)
π
0
2π
γ+(δ/2)
δ
δ δ
=
2
2 ∗ sin =
8
sin sin
2
• Example: if δ= 360 γ= [(180-72)/3] +(36/2) =540
The corresponding fundamental peak
Vp1= (8Vd/ π) sin 540 sin 180= 0.637 Vd
+Vd
-Vd
Sinusoidal PWM (SPWM)
1- Unipolar:
Several pulses per half cycle are
used as multi-PWM. In multi-PWM,
pulses widths are equal. But in
unipolar SPWM, pulse width is a
sinusoidal function of the angular
position of the pulse in a cycle.
Case I: Peak of triangle carrier
coincident with zero of reference
signal.
• Number of pulses per half cycle=
(fc/2fr)=0.5mf
• mf= frequency modulation
index=fc/fr
• ma= Amplitude modulation
index=Ar/Ac
138
Carrier (fc)
Reference(fr)
2π
π
π/2
AC
Ar
vab
+Vd
-Vd
By comparing carrier and reference signal,
the intersection of them determines
switching instants of modulated pulses
Vd
b
T3
T2
a
T1
T4
T1, T2 on, Vab=+Vd
T3, T4 on, Vab=-Vd
T1, T3 on, Vab= 0
T2, T4 on, Vab= 0
Unipolar Sinusoidal PWM (Cont.)
Notes:
• Modulation index controls harmonic content of the output voltage. As ma
increases, total harmonic distortion decreases.
• Magnitude of fundamental component proportional to ma (linear relation).
Vp1=ma Vd ,for 0<ma<1
• By varying ma from 0 to 1, the fundamental peak changes from 0 to Vd.
• For ma<1, the largest harmonic amplitudes are associated with harmonics of
order mf +1.
• As mf increases, the order of dominant harmonic frequency can be raised,
which can be filtered easily. But switching losses increase.
• If ma>1 is used (Over modulation) lower order harmonics appear as pulse
width is no longer a sinusoidal function of angular position of the pulse.
139
Unipolar Sinusoidal PWM (Cont.)
Notes:
• For ma<1  harmonics order centered around mf , 2mf , 3mf are
significant.
140
FFT
n
1
mf
maVd
Low pass filter can be used to
remove high order harmonic
easily: fcut ~= 0.1fc
2mf
FFT for output voltage at ma=0.75,mf=20, Vd=200 V
141
100%
FFT for output voltage at ma=1.25,mf=20, Vd=200 V
142
Low order harmonics
appear (Over modulation)
bulk filter
is needed
100%
Unipolar Sinusoidal PWM (Cont.)
Case II: Zero of triangle
carrier coincident with zero
of reference signal.
Number of pulses per half
cycle= (fc/2fr)-1=0.5mf-1
143
Carrier (fc)
Reference(fr)
2π
π
π/2
AC
Ar
vab
+Vd
-Vd
Vd
b
T3
T2
a
T1
T4
Carrier (fc)
Reference(fr)
FFT for output voltage at ma=0.75,mf=20, Vd=200 V
144
100%
Vp1 vs. ma (Unipolar SPWM)
145
Vp1
ma
Vd
1 ma (saturation)
(depends on fc)
4Vd/π
Vd
b
T3
T2
a
T1
T4
Bipolar SPWM (Single-Phase)
• Bipolar carrier is used
with frequency (fc).
• Bipolar output voltage
is generated (+/- Vx),
where;
Vx= Vd (FB)
Vx= 0.5Vd (HB)
• ma=Ar/Ac
• Mf=fc/fr
146
Vd
b
T3
T2
a
T1
T4
T1, T2 on, Vab=+Vd
T3, T4 on, Vab=-Vd
Vd
a
T1
T2
b
+
0.5Vd
-
+
0.5Vd
-
T1 on, Vab=+0.5Vd
T2 on, Vab=-0.5Vd
+
-
Ref.
carrier
T1
T2
+
-
Ref.
carrier
T1, T2
T3,T4
Ac
-Ac
Ar
Carrier (fc) Reference(fr)
π 2π
vab
+Vx
-Vx
iab
RL load
Bipolar SPWM (Single-Phase)
Notes:
• At ma=1, Vp1=0.5Vd (HB) or = Vd (FB)
• Vp1 is proportional with ma (linear relation) for 0<ma <1
• Generally Vp1= 0.5ma Vd (HB) or= ma Vd (FB)
• mf=fc/fr , it is recommended to choose odd mf to ensure output
voltage wave symmetry.
• At ma>1 (over-modulation): the relation between Vp1 and ma is non
linear and magnitude of low order harmonics increases.
• Vab rms = 0.5Vd (HB) or= Vd (FB)
147
Vp1 vs. ma (Bipolar SPWM single-phase)
148
Vp1
ma
Vx
1 ma (saturation)
(depends on fc)
4Vx/π
Vx=0.5Vd (HB)
Vx=Vd (FB)
Bipolar Sinusoidal PWM (FFT)
Notes:
• For ma<1  harmonics order centered around mf , 2mf , 3mf are
significant.
149
FFT
n
1
mf
maVx
Low pass filter can be used to
remove high order harmonic
easily: fcut ~= 0.1fc
2mf
FFT for vab at ma=0.75,mf=20, Vd=200 V, FB
150
FFT for Vab at ma=1.25,mf=20, Vd=200 V, FB
151
Low order harmonics
appear (Over modulation)
100%
Unipolar SPWM (using Bipolar PWM at each leg)
152
Ta+ on, Vao=+0.5Vd
Ta- on, Vao=-0.5Vd
+
-
Ref.
carrier
Ta+
Ta-
Ac
-Ac
Ar
Carrier (fc) Ref.(fr)
π 2π
-Ref.
0.5Vd
b
Tb+
Tb-
a
Ta+
Ta-
0.5Vd
0
Tb+ on, Vbo=+0.5Vd
Tb- on, Vbo=-0.5Vd
+
-
-Ref.
carrier
Tb+
Tb-
fc=450, fr=50 (mf=9), Vd=200V, ma=1
153
vao
vbo
vab
-100
+100
+200
-200
FFT of Vab at fc=450, fr=50, Vd=200 V, ma=1
154
Note:
For ma<1,
harmonics order
centered around
2mf are significant.
Harmonics around
mf do not appear,
as they are in-
phase in vao and
vbo. As Vab=Vao-Vbo,
these harmonics
do not appear in
the FFT of Vab.
100%
900Hz
FFT of Vab at fc=450, fr=50, Vd=200 V, ma=1.25
155
100%
Low order harmonics
appear (Over modulation)
900Hz
Three-phase two-level
inverter with bipolar SPWM
156
Three-phase two-level inverter with bipolar
SPWM: 3x (1φ HB) bipolar with SPWM
157
Vd
+
Vd/2
-
o a b c
T1
T4
T5
T2
T3
T6
n
Vao
Vco
Vbo
ia
ib
ic
van
id
+
Vd/2
-
T1 on, Vao=+0.5Vd
T4 on, Vao=-0.5Vd
+
-
v*aO pu
Carrier pu
T1
T4
T3 on, Vbo=+0.5Vd
T6 on, Vbo=-0.5Vd
+
-
v*bO pu T3
T6
T5 on, Vco=+0.5Vd
T2 on, Vco=-0.5Vd
+
-
v*cO pu T5
T2
v*aO pu= v*aO / (0.5Vd)
v*bO pu= v*bO / (0.5Vd)
v*cO pu= v*cO / (0.5Vd)
Ref. voltages:
Three-phase two-level inverter with bipolar SPWM.
Vd=300V, ma=0.8, fc=350Hz, fr=50Hz, Z=15∠450 Ω
158
Three-phase two-level inverter with bipolar SPWM.
Vd=300V, ma=0.25, fc=350Hz, fr=50Hz, Z=15∠450 Ω
159
Three-phase two-level inverter with bipolar SPWM.
Vd=300V, ma=0, fc=350Hz, fr=50Hz, Z=15∠450 Ω
160
Three-phase two-level inverter with bipolar SPWM.
Vd=300V, ma=1.5, fc=350Hz, fr=50Hz, Z=15∠450 Ω
161
Three-phase two-level inverter with bipolar SPWM.
Vd=300V, ma=0.8, fc=3500Hz, fr=50Hz, Z=15∠450 Ω
162
Three-phase two-level inverter with bipolar
SPWM.
• As modulation index decreases, the total harmonic distortion of the
output current (THDi) increases.
• During over-modulation (ma>1), as ma increases, the total harmonic
distortion of the output current increases.
163
THDi
ma
1
Over-modulation
Three-phase two-level inverter with bipolar
SPWM.
Notes:
• At ma=1, Vp1 of van(t) =0.5Vd
• Vp1 of van(t) is proportional with ma (linear relation) for 0<ma<1
• Vp1 of van(t) = 0.5ma Vd
• Vp1 of vab(t) = 0.5 3ma Vd
• mf=fc/fr , it is recommended to choose odd mf to ensure output
voltage wave symmetry.
• At ma>1 (over-modulation): the relation between Vp1 of van(t) and ma
is non linear and magnitude of low order harmonics increases.
164
Three-phase two-level inverter with bipolar
SPWM.
165
VLL rms 1/Vd
ma
1 ma (saturation)
(depends on fc)
Saturation
(square-wave)
3/(2 2)
6/π
120o
180o
-Vd
Vd
Vp1 of Vab(t)=
(4Vd/π) cos(π/6)
Vrms 1 of Vab(t)=
(4Vd/ 2π) cos(π/6)=
(4Vd/ 2π) ( 3/2)
( 6/ π)Vd
Three-phase two-level inverter with bipolar
SPWM.
Notes:
• For ma<1  harmonics order centered around mf , 2mf , 3mf are
significant.
166
FFT of
phase
voltage n
1
mf
ma(0.5Vd)
Low pass filter can be used to
remove high order harmonic
easily: fcut ~= 0.1fc
2mf
Three-phase two-level inverter with bipolar SPWM.
fc=3500 Hz, fr=50Hz. FFT for the Phase voltage.
167
During
over-modulation
(ma>1), low order
harmonics appear.
ma=0.8 ma=1.5
100% 100%
Three-phase two-level inverter
with bipolar Third harmonic
Injection PWM (THIPWM)
168
Three-phase two-level inverter with bipolar
Third harmonic Injection PWM (THIPWM)
• In case of three-phase inverter with
SPWM as ma changes from 0 to 1,
the peak of fundamental
component of the phase voltage
changes from 0 to 0.5Vd.
• To enhance this range and increase
DC voltage utilization (by 15%),
third harmonic injection (THI) can
be used, i.e.
V*ao pu= ma(1.15sin wt + 0.19 sin3wt),
where ma is the modulation index
(01) in linear region.
169
at ma=1
i.e. (Ar/Ac)=1
Ref.
Three-phase two-level inverter with bipolar
Third harmonic Injection PWM (THIPWM)
• Generally, the p.u. reference voltages in
THIPWM are given by;
V*ao pu= ma(1.15sin wt + 0.19 sin3wt)
V*bo pu= ma(1.15sin(wt-1200) + 0.19 sin3wt)
V*co pu= ma(1.15sin(wt+1200) + 0.19 sin3wt)
The corresponding line voltages references are
as follows;
V*ab pu=V*ao pu-V*bo pu= 3ma (1.15sin (wt+30o))
“no third harmonic”. Similar for the other line
voltages,i.e. line voltages have no 3rd harmonic.
170
at ma=Ar/Ac=1
Three-phase two-level inverter with bipolar
Third harmonic Injection PWM (THIPWM)
• The corresponding phase voltages in Y-
connected load are as follows;
Van= 0.5Vdma (1.15)sin wt
Vbn= 0.5Vdma (1.15)sin(wt-1200)
Vcn= 0.5Vd ma (1.15)sin(wt+1200)
As ma at 1, the reference signals peak is unity
as shown in figure, i.e. a phase voltage with
peak of 0.5Vd (1.15) can be obtained with
THIPWM, i.e. 15% higher than SPWM without
3rd harmonic injection. We can conclude that
by applying THIPWM, DC voltage utilization
increases by 15%.
171
at ma=1
Three-phase two-level inverter with THIPWM.
Vd=300V, ma=1, fc=3500Hz, fr=50Hz, Z=15∠450 Ω
172
100%
Phase voltage
Vp1=1.15*ma*0.5Vd
=1.15*1*150
=172.5 V
3rd harmonic=0
PWM Multi-Phase Inverters
173
Bipolar PWM Multi-Phase Inverters
• By increasing number of inverter legs, Multi-phase output
can be generated (i.e. 1 leg per phase).
• Following figure shows the five-phase inverter which is
used to fed five-phase induction motor (multi-phase
machine). Here we have 5 reference signals (v*ao ,v*bo
,v*co ,v*do ,v*eo with 3600/5=720 phase shift) and 1 carrier.
174
Vd
o a b c d e
v*ao pu =ma sin wt
v*bo pu =ma sin (wt-720)
v*co pu =ma sin (wt-1440)
v*do pu =ma sin (wt+1440)
v*eo pu =ma sin (wt+720)
+
-
v*aO pu
Carrier pu Ta+
Ta-
+
-
v*cO pu
Tc+
Tc-
+
-
v*eO pu
Te+
Te-
+
-
v*bO pu Tb+
Tb-
+
-
v*dO pu Td+
Td-
Ta+ Tb+ Tc+ Td+ Te+
Ta- Tb- Tc- Td- Te-
Space Vector Modulation (SVM)
of Three-phase two-level Inverter
175
SVM of Three-phase two-level Inverter
• Any three phase set of variables that add up to zero in the stationary a-b-c
frame can be represented in a complex plane by a complex vector that
contains a real α and imaginary β component.
• Space vector definition of three-phase voltages:
vs = (2/3)[va ej0+ vb ej(2π/3)+ vc ej(4π/3)]
• Space vector represents three phase quantities as a single rotating vector
where the three phases are assumed as only one quantity.
• For the balanced three-phase voltages, the space vector is continuously
rotating with a speed of (2πf) rad/s, where f is the frequency. So If we
create a rotating space vector via changing switching states of the inverter,
three-phase output voltages will be generated successfully.
176
177
T1 T3 T5=1 0 1 T1 T3 T5=1 0 0
T1 T3 T5=1 1 0 T1 T3 T5=0 1 0
T1 T3 T5=0 1 1 T1 T3 T5=0 0 1
Vd
n
a c
b
Z Z
Z
Van=vcn=vd/3
Vbn= -2vd/3
Vd
n
a
c
b
Z
Z
Z
Van=2vd/3
Vbn= Vcn = -vd/3
Vd
n
a
c
Z Z
Z
Van=vbn=vd/3
Vcn= -2vd/3
b
n
b
Z
Z
Z
Vbn=2vd/3
Van= Vcn = -vd/3
a c
Vd
n
b c
a
Z Z
Z
Vbn=vcn=vd/3
Van= -2vd/3
n
c
a
b
Z
Z
Z
Vcn=2vd/3
Van= Vbn = -vd/3
Vd
Vd
Vd
+
Vd/2
-
o a b c
T1
T4
T5
T2
T3
T6
n
van
+
Vd/2
-
Phase voltages during
different switching states for
T1 T3 T5 in three-phase two-
level inverter
SVM of Three-phase two-level Inverter
178
T1 T3 T5 van vbn vcn Vs Vector #
0 0 0 0 0 0 0 V0
1 0 0 +(2/3)Vd
-(1/3)Vd -(1/3)Vd (2/3)Vd∠00
V1
0 1 0 -(1/3)Vd (2/3)Vd -(1/3)Vd (2/3)Vd∠1200
V3
1 1 0 (1/3)Vd (1/3)Vd -(2/3)Vd (2/3)Vd∠600
V2
0 0 1 -(1/3)Vd -(1/3)Vd (2/3)Vd (2/3)Vd∠-1200
V5
1 0 1 (1/3)Vd -(2/3)Vd (1/3)Vd (2/3)Vd∠-600
V6
0 1 1 -(2/3)Vd (1/3)Vd (1/3)Vd (2/3)Vd∠1800
V4
1 1 1 0 0 0 0 V7
Space vector during different existing switching states for T1 T3 T5
V1
(100)
V2
(110)
V3
(010)
V4
(011)
V5
(001)
V6
(101)
S1
S2
S3
S4
S5
S6
V0 (000)
V7 (111)
(2/3)Vd
SVM of Three-phase two-level Inverter
• The tip of the active state vectors, when joined together form a
hexagon. The hexagon consists of six distinct sectors (S1 to S6)
spinning over 360 degrees (one sinusoidal wave cycle corresponds to
one rotation of the hexagon) with each sector of 60 degrees.
• The vectors V1 to V6 are called active state vectors while V7 and V0 are
called zero state vectors. The magnitude of each of the six active
vectors is equal to (2/3)Vd. The zero state vectors are redundant
vectors but they are used to minimize the switching frequency.
179
SVM of Three-phase two-level Inverter
• The active state vectors (V1 to V6) are stationary while the
reference space vector Vref is rotating at speed of the fundamental
frequency (ω). It circles once for one cycle i.e. it takes time=T
(periodic time) to complete one cycle rotation.
• For generating desired voltage waveforms (v*
a,v*
b,v*
c), the space
vector Vref should be created to move through the sectors with the
change of wt via changing switching states of the inverter.
180
SVM of Three-phase two-level Inverter
• Each sampling time Ts, the instantaneous values of reference three-phase
voltages are used to extract the reference space vector magnitude and position.
The angle indicates which sector ,of the involved six sectors, contains the Vref.
• The Vref vector is kept in its position for Ts before receiving the new sample
values, i.e. The reference vector rotates with step angle of Δθ each Ts ,whereΔθ=
2π (Ts/T). As Δθ decreases, more smooth motion is achieved, i.e. better three-
phase output is generated.
• The reference space vector Vref can be achieved as a resultant of active state
vectors in the estimated sector (with the help projections as shown in figure).
• As shown in figure, Vref vector inS1 can be created
by enabling V1 vector of a time t1 and V2 vector
for a time t2 , and enabling suitable zero vector
for a time t0, where t0=Ts-t1-t2.
181
V1
V2
Vref
t1V1/Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#1:
To create this vector the switching states to be changed as
follows to minimize switching losses and harmonics.
T1 T3 T5: 000 100110111110100000
(start right)
It has to be noted that in each change, there is a single
change in one switch.
• 000 and 111 represent the zero vectors V0 and V7, so
000 state lasts for 0.25t0 and 111 lasts for 0.5t0
• 100 represents V1 vector, so each 100 state lasts for
0.5t1
• 110 represents V2 vector, , so each 110 state lasts for
0.5t2
182
V1(100)
V2(110)
Vref
t1V1/Ts
000 100 110 110
111 100 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t1/2 t1/2
t2/2
t2/2
Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#2:
To create this vector the switching states to
be changed as follows
T1 T3 T5: 000 010110111110010000
(start left)
• 000 and 111 represent the zero vectors V0
and V7, so 000 state lasts for 0.25t0 and 111
lasts for 0.5t0.
• 010 represents V3 vector, , so each 010
state lasts for 0.5t2
• 110 represents V2 vector, so each 110 state
lasts for 0.5t1
183
000 010 110 110
111 010 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t2/2 t2/2
t1/2
t1/2
Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#3:
To create this vector the switching states to be
changed as follows
T1 T3 T5: 000 010011111011010000
(start right)
• 000 and 111 represent the zero vectors V0 and
V7,so 000 state lasts for 0.25t0 and 111 lasts
for 0.5t0.
• 010 represents V3 vector, , so each 010 state
lasts for 0.5t1
• 011 represents V4 vector, so each 011 state
lasts for 0.5t2
184
000 010 011 011
111 010 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t1/2 t1/2
t2/2
t2/2
Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#4:
To create this vector the switching states to be
changed as follows
T1 T3 T5: 000 001011111011001000
(start left)
• 000 and 111 represent the zero vectors V0 and
V7,so 000 state lasts for 0.25t0 and 111 lasts
for 0.5t0.
• 001 represents V5 vector, , so each 001 state
lasts for 0.5t2
• 011 represents V4 vector, so each 011 state
lasts for 0.5t1
185
V4(011)
V5(001)
000 001 011 011
111 001 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t2/2 t2/2
t1/2
t1/2
Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#5:
To create this vector the switching states to be
changed as follows
T1 T3 T5: 000 001101111101001000
(start right)
• 000 and 111 represent the zero vectors V0 and
V7,so 000 state lasts for 0.25t0 and 111 lasts
for 0.5t0.
• 001 represents V5 vector, , so each 001 state
lasts for 0.5t1
• 101 represents V6 vector, so each 101 state
lasts for 0.5t2
186
V5(001) V6(101)
000 001 101 101
111 001 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t1/2 t1/2
t2/2
t2/2
Ts
SVM of Three-phase two-level Inverter
• If Vref in Sector#6:
To create this vector the switching states to be
changed as follows
T1 T3 T5: 000 100101111101100000
(start left)
• 000 and 111 represent the zero vectors V0 and
V7,so 000 state lasts for 0.25t0 and 111 lasts
for 0.5t0.
• 100 represents V1 vector, , so each 100 state
lasts for 0.5t2
• 101 represents V6 vector, so each 101 state
lasts for 0.5t1
187
V6(101)
V1(100)
t2V1/Ts
000 100 101 101
111 100 000
T1T3T5
T1
T3
T5
t0/4 t0/4
t0/2
t2/2 t2/2
t1/2
t1/2
Ts
SVM of Three-phase two-level Inverter
• The hexagon is divided into
triangles, where the sides of each
triangle are equal
• To ensure that Vref is inside the
sectors, the radius of the shown
tangential circle represents the
largest value of the reference
space vector which is
Vd/ 3=0.578Vd= 1.15(0.5Vd), i.e.
SVM provides higher DC voltage
utilization compared to SPWM
(15% higher).
188
V1
(100)
V2
(110)
V3
(010)
V4
(011)
V5
(001)
V6
(101)
S1
S2
S3
S4
S5
S6
V0 (000)
V7 (111)
(2/3)Vd
Vref
V2
ref=((2/3)Vd)2- ((1/3)Vd)2
=(1/3) V2
d
SVM of Three-phase two-level Inverter
• For 50 Hz and switching frequency of 10 kHz, the differential angle or
step angle (Δθ) is the step with which the space vector will rotate with
time each Ts
• T=1/50  3600 (full circle), Δθ=??
• Δθ/(1/10kHz)= 3600/(1/50) Δθ= 1.80
• Vref vector is continuously rotating but in steps.
• Each position of Vref lasts for Ts. In each position, (1)sector # is
estimated , (2) times t1, t2, t0 are calculated based on the projections
on the involved active vectors in the sector, (3) based on the sector
number, gate pulses are generated for T1, T3 , T5 as illustrated before.
189
V1
V2
Vref
Times calculations (t1 ,t2 ,t0)
Starting from voltage balance equation (assume sector1)
• VrefTs=V1t1+V2t2+V0t0
, Vref= Vref∠ , V1= (2/3)Vd∠00 , V2= (2/3)Vd∠600
• Real=Real Vref cos Ts=(2/3)Vd t1+(1/3)Vd t2
• Imaginary=Imaginary  Vref sin Ts=(1/ 3)Vd t2
Also t1+ t2 +t0=Ts
By solving 
t1= 3Ts (Vref/Vd) sin (600- ) and t2= 3Ts (Vref/Vd) sin for 00< <600
190
V1
V2
Vref
θ
Finally, t0=Ts- t1- t2
Times calculations (t1 ,t2 ,t0)
• For other sectors
• ’= -600(k-1), where k is the sector number
i.e. the times in any sector is given by;
t1= 3Ts (Vref/Vd) sin (600- ′) and t2= 3Ts (Vref/Vd) sin ′
t0=Ts-t1-t2
Where Vref magnitude can be controlled from 0 to Vd/ 3.
i.e. Vref= ma(Vd/ 3) where ma is the modulation index (01)
191
FFT for SVM of three-phase inverter
Notes:
• For Vref<0.578Vd  harmonics order centered around mf ,2mf , 3mf ,….
192
FFT of
phase
voltage n
1
mf
Vp1
Low pass filter can be used to
remove high order harmonic
easily
2mf
SVM of Three-phase two-level Inverter
• Advantages:
1- low switching losses
2- increase DC voltage utilization by 15%
3- low harmonic content.
193
Implementation SVM of Three-phase two-
level Inverter
194
Reference
vector
calc.
v*an
v*bn
v*cn
Vref
0
3600
Changes in
steps each Ts
Comparator
Sector #, k
1
600
+
-
-
’
+
Times calc.
Vref
Vd
Ts
’
t1
t2
t0
Gate Pulses
generator
T1
T3
T5
Sector #, k
Implementation SVM of Three-phase two-
level Inverter (Cont.)
195
t1
t2
t0
Gate Pulses
generator
???????
T1
T3
T5
Sector #, k
Ts
carrier
0.5t0
0.5t0+t2
Ts
0.5t0+t1
0.5t0+t1+t2
0
Z1
X1
Y1
Y2
Sector # T1 T3 T5
S1 X1 Y1 Z1
S2 Y2 X1 Z1
S3 Z1 X1 Y1
S4 Z1 Y2 X1
S5 Y1 Z1 X1
S6 X1 Z1 Y2
Simulation results of the implemented SVM
Vd=200V,Vref=115V , Ts=1/10kHz, Z=10∠450Ω
196
Phase voltages, V
Phase currents , A
The resultant
Vao, has a
fundamental
component of
115 V .
(15% voltage
enhancement)
Fundamental +3rd
Multilevel Inverters
The main purpose of multilevel circuits is to generate AC voltage pattern
that contains defined discrete steps to be more close to the sine-wave
shape.
Introduction
• To obtain high-quality AC voltage or
current with a two-level converter
requires high switching frequencies.
Such high frequencies cause
significant switching losses.
• Multilevel converters use an array of
modules to build the required AC
voltage level from a number of
individual DC power supplies as
shown.
• The DC voltage sources are typically
formed using capacitors and a charge-
balancing scheme is used to maintain
the capacitor voltages constant.
• Input voltage in all types is Vdc and
Per-phase peak voltage is 0.5Vdc. (½Vdc or −½Vdc) (½Vdc, −½Vdc or 0) (-0.25Vdc, -0.5Vdc ,
0, 0.25Vdc, 0.5Vdc)
Va0/Vdc Va0/Vdc Va0/Vdc
Va0
The features of multilevel converters
• Low THD distortion and lower dv/dt compared to conventional two-
level converters at the same effective switching frequency.
• Reduced footprint because of reduced filtering requirements.
• Blocking voltage of each module/switch is clamped to a cell capacitor
voltage level. This also reduces switching losses.
• Modularity and ability to scale converters to high voltage and power
levels.
Multilevel converter disadvantages
• Control becomes complex with increased number of levels.
• Multiple DC voltages are required, which are usually provided by
capacitors.
• Balancing the capacitor voltage is a challenge, because of the
requirement for very fast simultaneous feedback control of large
number of cells.
• Conduction losses increase with an increase in the number of
switches.
• Typically two times (or more) switches are required compared with
two-level converters.
Multilevel Modulation techniques
• High switching PWM :
Multicarrier SPWM
For N-level, (N-1) carriers are
employed as shown (Level
shifted modulation).
The carriers are compared with
the reference voltage, based
on the level of reference
voltage and its intersections
with carrier waves, suitable
output voltage state is
selected.
0.5Vdc
0.25Vdc
0
-0.25Vdc
-0.5Vdc
va0
Ref.
+1
-1
+0.5
-0.5 ma
Five-level (N=5)
Multilevel Modulation techniques
• High switching PWM : Multicarrier SPWM (Number of carriers= number of levels-1)
Example: Five-level
1/fc
1/fr
Output voltage
Modulated signal
Carrier1
Carrier2
Carrier3
Carrier4
Reference voltage (ma=1)
• Amplitude modulation index=ma= V*
a0/0.5Vdc
where 0<ma <1
• Fundamental output voltage peak = 0.5maVdc
• Frequency modulation index= mf =fc/fr
Ref.
Multilevel Modulation techniques
• Fundamental frequency modulation: Nearest level modulation (NLM)
Example: Seven-level
(output)
The Classical multilevel topologies
• Diode/Neutral Point Clamped Converter (NPC)
• Flying Capacitor Converter (FC)
• H-bridge Cascade Converter
Diode/Neutral Point Clamped Converter
• The DC bus voltage is split into three voltage levels
by two series-connected capacitors, C1 and C2. The
connection point between the two capacitors is
defined as the zero voltage point (label 0).
• The AC voltage Va0 has three states/levels: 0, ½VDC
and −½VDC.
1. for voltage level ½VDC, switches Sa1 and Sa2 are
turned on
2. for 0 voltage level, Sa2 and Sa3 are turned on
3. for a −½VDC level, Sa3 and Sa4 are turned on.
• The components that distinguish this circuit from a
conventional two-level converter are clamping
diodes Da5 and Da6. the diodes clamp specific
switch voltages to half the DC bus voltage in three-
level topology.
Single-phase, Three-level (N=3)
Diode/Neutral Point Clamped Converter
• Three-phase converter with 3
legs is shown, where each leg
is controlled independently,
where three phase
references with 1200 phase
shift are defined (reference
for each leg) . For SPWM, The
references are compared
with multi-carriers (two
carriers for N=3) to generate
the gate pulses of the
involved IGBTs.
Three-phase, Three-level (N=3)
Line voltage
Phase Voltage
Va0
Three-level
Three-phase simulation results (N=3)
Five-level NPC (N=5)
Generally for N-level NPC converter, (N-1) storage capacitors
are required, the voltage stress across each switching device is
clamped to Vdc/(N-1) , (N-1) consecutive switching devices in
each leg are turned on.
Multilevel NPC difficulties
• It requires high-speed clamping diodes that must be able to carry the
full load current.
• If the number of levels is more than three, the clamping diodes are
subjected to different voltage stress. Therefore a series connection of
diodes is required (complexity and cost).
• Maintaining the charge balance of the DC capacitors with more than
three levels needs careful attention.
Flying Capacitor Multilevel Converter
• Figure illustrates a three-level flying capacitor
converter. All capacitors have the same voltage
rating (Vdc/2).
• The converter leg provides a three-level output
voltage Va0 = {0, ½Vdc or −½Vdc}.
1. for voltage level ½Vdc, switches Sa1 and Sa2 are
ON.
2. for a 0 level, switches (Sa1 and Sa3)or (Sa2 and
Sa4) are ON. Capacitor Ca therefore introduces
negative voltage in series with either C1 or C2.
3. for a −½Vdc level, switches Sa3 and Sa4 are ON.
Single-phase, Three-level (N=3)
+
-
+
-
+
-
Three-phase, Three-level FC converter (N=3)
Five-level Flying capacitor Converter
• All capacitors have the same voltage
rating (Vdc/4), the series connection of
capacitors indicates that the voltage
sharing between these capacitors should
be equal.
• Voltage rating of the involved switches is
Vdc/4.
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
Flying capacitor converter disadvantages
• an excessive number of storage capacitors are required when the
number of AC levels is high;
• inverter control is complicated, while the switching frequency and
switching losses will be high.
• high-level systems become difficult to package and are expensive.
H-Bridge Cascaded Converter
• The cascaded multilevel converters use series connection of
single-phase H-bridge modules each with a separate DC source
(capacitors) as shown for a five-level topology.
• Each module is capable of producing an output voltage of +Vcell,
0 and −Vcell, by connecting the capacitors to the AC terminals by
different combinations of the four switches, Sa1, Sa2, Sa3 and Sa4.
• The resulting AC voltage swings from +2Vcell to −2Vcell with five-
levels.
The main advantages are:
• It requires fewer components than the diode-clamped and
capacitor-clamped circuits for the same number of levels.
• The charge balance of the separate DC capacitors can be
achieved.
The major disadvantage is:
• Each DC capacitor must be isolated+ no common DC bus.
Single-phase, five-level (N=5)
Three-phase, five-level (N=5)
Single-phase, 11-level (N=11), with NLM technique
Uninterruptible Power
Supply (UPS)
UPS Overview
• A UPS system can be a helpful device for ensuring accurate power
supply performance.
• An Uninterruptible Power Supply, or UPS, is an electronic device that
provides an alternative electric power supply to connected
equipment when the primary power source is not available.
• Unlike auxiliary power, a UPS can provide instant power to connected
equipment, which can protect sensitive electronic devices by allowing
them to shut down properly and preventing extensive physical
damage.
• However, a UPS can only supply energy for a limited amount of time.
UPS Overview
• A UPS for emergency systems and lighting may support the system for
90-120 minutes. For other applications like computer backup power, a
UPS may typically support the system for 15-20 minutes.
• If power is not restored during that time, the system will be shut
down.
• If a longer backup period is considered, a larger battery is required.
Types of UPS Systems
A typical UPS for computers has four basic protection roles: being able
to cope with power surges, voltage shortage, complete power failure
and wide variations in the electric current frequency.
There are three types of UPS systems, depending on how the electric
power is being stored and relayed to the electronic device connected to
them:
1- Offline UPS (also known as Stand-by UPS)
2- Line-Interactive (or Continuous UPS)
3- Online UPS (often called double conversion supply)
• The standby UPS system works with
the switch arrangement to select the
AC input as a primary power source,
and interchanging to the battery &
inverter as backup sources in case of
primary power gets disrupted.
• The inverter normally relies on
standby, only triggering when the
power fails and the transfer switch
routinely switches the load to the
backup units.
• This kind of UPS system offers a small
size, high degree of efficiency, & low
costs.
OFFLINE UPS
• Also referred to as VFD Voltage and Frequency Dependent or Standby UPS.
• It offers the most basic level of power protection.
• During normal conditions, the load is fed from the AC input. Meanwhile the battery is
charged from the AC input.
• In normal operation, with mains supply present, both output voltage and frequency
will track the input voltage and frequency respectively.
the UPS output ,during grid
availability, is supplied via a built-in
filter which provides the load with
protection from spikes and
transients by clamping peak voltage
to pre-defined levels.
OFFLINE UPS
• During abnormal conditions (when a problem is detected in the utility power), a
relay connects the load to the inverter output and the power is provided from
battery to the load through the DC/AC converter. Performing this action usually
takes a few milliseconds (4-8ms transfer time), during which time the power
inverter starts supplying electric energy from the battery to the load.
• As the inverter is switched off when the UPS is operating normally, the term
'Offline' is given to any UPS of this design. The inverter output on Offline UPS is
typically a square-wave.
OFFLINE UPS
• Offline UPS are the most basic models and designed for use in small,
non-critical applications that require protection against momentary
loss of power. They are used to protect workstations, terminals, or
equipment below 1 kVA.
• Typical internal battery with Offline UPS lasts for just a few minutes.
• It is not advised to use a VFD UPS to protect critical loads or sensitive
electrical equipment. It is generally used for PCs.
• It is the most common UPS used for small
business.
• The designing of line interactive UPS is alike
to a standby UPS, in addition the design
Line Interactive generally includes an
automatic voltage regulator (AVR) or a tap-
changing transformer.
• This enhances the regulation of voltage by
regulating transformer taps as the input
voltage differs.
• The features of this UPS are small size, low
cost, high efficiency can make the UPS in
the range of 0.5-5kVA power
Line Interactive UPS systems
• also referred to as VI - Voltage Independent - operate similarly to an Offline
UPS, with the addition of a built-in Automatic Voltage Stabilizer (AVS).
• The AVS ensures the output voltage remains within a pre-defined voltage
window regardless of any voltage variations on the mains input supply. This
enables Line Interactive UPS to provide protection against power sags,
surges, and brownouts.
A filter is used to protect
the AVS and load from
spikes and transients by
clamping their peak
voltages to more
acceptable levels.
Line Interactive UPS systems
• When the mains power supply fails or fluctuates outside of the pre-set
window, the load is transferred via a relay (introducing a 4-8ms transfer
time) to the inverter output.
• Most Line Interactive UPS provides a sine-wave output.
• Line Interactive UPS are typically used
in some applications, such as PCs,
telephone systems, non-critical
networking equipment and small
motor loads.
• Typically a line-interactive UPS is only
available up to 5kVA.
The online UPS is also called as
double conversion online UPS (most
commonly used UPS).
The primary power source is the
inverter instead of the AC main.
In this UPS design, loss of the input
AC does not cause triggering of
transfer switch, because the input AC
is charging the battery source which
delivers power to the output inverter
(i.e., no transfer time).
ONLINE UPS also referred to as VFI – Voltage
Frequency Independent or Double-Conversion
• An Online UPS , combines the
two basic technologies of the
previously described UPS
models, with rectifiers and
inverter systems working all of
the time.
• As is the case with a Line-
Interactive UPS, the power
transfer is made instantly as an
outage occurs, with the rectifier
simply being turned off while the
inverter draws power from the
battery.
ONLINE UPS also referred to as VFI – Voltage
Frequency Independent or Double-Conversion
• As utility power is again
established, the inverter
continues to supply power to the
connected devices, while the
rectifier resumes its activity,
recharging the battery.
• This design is sometimes fitted
with an additional transfer switch
for bypass during a malfunction
or overload.
What Power Problems Do The Different UPS
Topologies Protect Against?

4th_power_PE App enginering electricql.pdf

  • 1.
    Electrical Power Eng.Program Level (4) Power Electronics Applications Dr. Ahmed Abbas Elserougi 1
  • 2.
  • 3.
    Electrical Sources ElectricalLoads DC AC 1-phase 3-phase + - DC AC 3-phase 1-phase M M Example: Three-phase induction motor, heaters ,…etc Example: Home appliances, Heaters,…etc Example: DC motor, battery charging..etc
  • 4.
    Power Electronics Converters •PE converters are used for conversion and control of electric power • Depending on the type of function performed, power electronic converters are categorized into following types. 1) AC to DC = Rectifier: It converts AC to unipolar (DC) current (Ex: diode rectifiers) 2) DC to DC = Chopper: It converts constant to variable DC (Buck, Boost, Buck-Boost converters) 3) AC to AC = AC voltage controller: It converts line AC supply to AC of desired voltage magnitude. (Back-to-Back thyristors) 4) DC to AC = Inverter: It converts DC to AC of desired frequency and voltage magnitude. 5) Two-stage Conversion (AC-DC-AC) 4
  • 5.
    Industrial/Power Electronics Converters DCAC Inverters Rectifiers AC voltage Controllers -On/Off control -phase angle control DC choppers -Buck Vout=DVin -Boost Vout=Vin/[1-D] -Buck Boost |Vout|=D*Vin/[1-D] D: controlled switch duty cycle 0<D<1
  • 6.
    Motor Drives (Speedcontrol of motors) M M + - The Direct on line operation does not provide speed control option. To have speed control option, Industrial electronics converters should be used. Here DC Motor is connected to Constant DC source Constant speed operation with no speed control option!!!! Three-phase motor is connected to the grid at constant voltage and frequency Constant speed operation with no speed control option!!!!
  • 7.
    Motor Drives (Speedcontrol of motors) M M + - DC-DC converter (Chopper) is used To control the armature voltage (Va) of DC motor, and hence control the Speed of the motor. Different options for speed control of AC motors Chopper Rectifier Inverter + Vdc - M AC voltage controller M Inverter + - + Va - Semiconductor device is the main element of these converters
  • 8.
  • 9.
    Semiconductor devices: Devices areused as electrical switches in power electronics (ON or OFF) Switches ON-OFF Uncontrolled Controlled ON-Controlled OFF-uncontrolled ON-OFF Controlled Diode Applications: 1- AC-DC converters (uncontrolled Rectifiers) (low frequency power diodes, 50Hz) 2- DC-DC converters (fast recovery diodes, few kHz) Thyristor Applications: 1- AC-DC converters (controlled Rectifiers) 2- AC-AC converters (AC voltage controllers) Low frequency, 50Hz BJT , MOSFET , IGBT Applications: DC-AC converters (inverters) DC-DC converters (choppers)
  • 10.
    Diode as aswitch (on-off uncontrolled switch) • When VAK>0 The diode is turned-on • After turn-on, when iAK drops to zero  the diode is turned-off • Forced commutation process: it is possible to force the diode to turn-off while it carries current by applying negative voltage across its terminals (vAk<0). • There is low frequency power diodes for rectifier circuits, and fast recovery diodes (high frequency) for switched mode power supplies applications. k A A k iAK - vAK + A k vAk>0 A k iAk drops to zero or vAk<0 iAK
  • 11.
  • 12.
    Thyristor as aswitch (on-controlled off-uncontrolled switch) • When VAK>0 and ig isinjected (firing) The thyristor is turned-on • When VAK>0 and ig is not injected  The thyristor remains open • After turn-on, when iAK drops to zero  the thyristor is turned-off • Forced commutation process: it is possible to force the thyristor to turn-off while it carries current by applying negative voltage across its terminals (vAk<0). • The thyristors are low frequency devices, which are used in rectifier and AC voltage controller circuits k A A k iAK - vAK + A k vAk>0 and ig injected A k iAk drops to zero or vAk<0 iAK g - vgK + ig Control current
  • 13.
    BJT as aswitch (on-off controlled electrical switch) • The BJT can be used as an electric switch between the collector (C) and Emitter (E). The ON and OFF conditions can be controlled via the base (B) current iB • Cut-off case, at iB=0 the switch is OFF • Saturation case, at iB= iB satthe switch is ON • BJT is current-controlled switch (used in low voltage, low frequency applications) C E B C E C E iB iB=0 iB= iB sat Control current
  • 14.
    IGBT as aswitch (on-off controlled electrical switch) • The IGBT can be used as an electric switch between the collector (C) and Emitter (E). The ON and OFF conditions can be controlled via the voltage between the Gate (G) and (E), VGE • at VGE=0 the switch is OFF • at VGE= 15 V the switch is ON • IGBT is voltage-controlled switch (used in high voltage, medium frequency applications) C C E C E VGE=0 VGE=15 V E G + VGE ---------- Control voltage
  • 15.
    MOSFET as aswitch (on-off controlled electrical switch) • The MOSFET can be used as an electric switch between the Drain (D) and Source (S). The ON and OFF conditions can be controlled via the voltage between the Gate (G) and (S), VGS • at VGS=0 the switch is OFF • at VGS= 15 V the switch is ON • MOSFET is voltage-controlled switch (used in low voltage, high frequency applications) D D S D S VGS=0 VGS=15 V S G + VGS ----- ----- Control voltage
  • 16.
    Course Content • MOSFETs/IGBTsGate Drives (Isolation requirements) • Inverters with square-wave output Single-phase three-phase • Deadtime • Snubber circuits • Conduction and switching losses of IGBTs/MOSFETs. • Thermal management and heatsink design 16 • 2L-inverter modulation techniques Selective harmonic elimination (single- phase and three-phase). PWM Inverters (single-phase and three- phase) Space Vector Modulation for three-phase two-level inverters. • Multilevel inverters Neutral Point Clamped Flying Capacitors Cascaded H-bridge • Uninterruptable Power Supply (UPS)
  • 17.
  • 25.
    MOSFETs/IGBTs Gate Drives •MOSFETs and IGBTs are on-off controlled switches , which are the main types of inverters semiconductor devices. • Gate drive circuit is needed to drive the MOSFET/IGBT. • For example: a TLP 250 is opto-coupler based gate drive for MOSFETs and IGBTs (opto-isolator MOSFET/IGBT gate drive). 25
  • 26.
    TLP250-based Gate DriveCircuit TLP250 + - 50 Ω 220 Ω 0.1 µF 12 V µC Ground 1 Ground 2 IGBT G C E 26 Gate Drive
  • 27.
    Inverters with Square-wave Output Single-phasehalf-bridge two-level inverter 27
  • 28.
    Single-phase Half-bridge Inverterwith square wave output T1 T2 ON OFF ON ON OFF OFF vo +Vd/2 -Vd/2 t t t 0.5T T 0.5T T T • AC output voltage is obtained, where square-wave= fundamental+ Harmonics. • By controlling the value of T, output frequency is controllable. • Output voltage magnitude can be controlled, if the voltage Vd is controllable. If not, the output voltage magnitude will be fixed. T=1/f = periodic time Vo rms= 0.5Vd 28
  • 29.
    Single-phase Half-bridge Inverterwith square wave output (Cont.) vo io ???? AC load • The generated load voltage is a square wave irrespective of the load type. • What is the shape of corresponding load current??? Inverter output 29
  • 30.
    Single-phase Half-bridge Inverterwith square wave output (Cont.) The corresponding load current depends on the load type. In case of resistive load (R): • The load current shape will be like output voltage shape as shown. • The load power po(t)=vo(t)*io(t) is shown below. • When vo+ and io+  io passes through T1. • When vo- and io-  io passes through T2. • Diodes are not conducting in resistive loads. • Based on power invariance condition: VdId ave= Po ave average supply current Id ave=Vd/4R vo +Vd/2 -Vd/2 t T io +Vd/2R -Vd/2R t T po V2 d/4R t 30 0.5T
  • 31.
    Single-phase Half-bridge Inverterwith square wave output (Cont.) In case of inductive load (RL with τ = L/R): • The load current has exponential variations with τ = L/R. At steady-state, the load current lags the load voltage by certain angle. • Vo+ , io+  io passes through T1. • Vo+ , io-  io passes through D1. • Vo- , io-  io passes through T2. • Vo- , io+  io passes through D2. vo +Vd/2 -Vd/2 t io t po t D2 T1 D1 T2 D1 T1 iD1 T/2 T +Imax -Imax iT1 31
  • 32.
    Single-phase Half-bridge Inverterwith square wave output (Cont.) In case of inductive load (RL with τ = L/R): Based on the step response of the 1st order RL circuit, load current peak is given by; Imax= (Vd/2R)*[(1-e-T/2τ)/(1+e-T/2τ)] vo +Vd/2 -Vd/2 t io t po t D2 T1 D1 T2 D1 T1 iD1 T/2 T +Imax -Imax iT1 32
  • 33.
    Fourier Analysis vo +Vd/2 -Vd/2 t T/2T Odd function Fundamental component Harmonics (not desired) 33 • The square-wave output of the single phase half-bridge inverter can be extracted to summation of sinusoidal functions using Fourier series. • vo(t)=∑ Vpn sin (nωot) , , ,.. Where ωo is the fundamental angular velocity (rad/s), Vpn=peak voltage of nth harmonics= ∫ ( )∗sin (nωot) dωot i.e. , Vpn= 2Vd nπ • vo(t)= 2Vd π [sin (ωot) + sin (3ωot)+ sin (5ωot)+……]
  • 34.
    t Fourier Analysis (Cont.) Fundamental(n=1) 3rd (n=3) 5th (n=5) Fundamental+3rd + 5th +……..=~ square 1 1/3 1/5 Von(t)/Vp1 34
  • 35.
    Fourier Analysis (Cont.) •Based on Fourier series, the generated square-wave voltage can be represented by series connected voltage sources of different magnitudes and frequencies as shown. • Using superposition, the load current of each frequency can be calculated, where Zn=|Zn|∟φn (where n =1,3,5,….) • io(t)= 2Vd π|Z1| sin(ωot- φ1)+ 2Vd 3π|Z3| sin(3ωot- φ3)+ 2Vd 5π|Z5| sin(5ωot- φ5)+….. • Ipn=peak current of nth harmonic= 2Vd nπ|Zn| + - + - + - io?? Vp1 ,fo Vp3 ,3fo Vp5 ,5fo Zn 35
  • 36.
    Fourier Analysis (Cont.) •Zn in case of R load is given by; |Zn|=R, φn =0 • Zn in case of RL load is given by; |Zn|= R2+(nωoL)2 , φn=tan-1(nωoL /R) • Similarly for any other types of loads. • The RMS of the output voltage, Vorms = V2 p1+ V2 p3+ V2 p5+ V2 p7+…. • The RMS of the output current, Iorms = I2 p1+ I2 p3+ I2 p5+ I2 p7+…. 36
  • 37.
    Fourier Analysis (Cont.) •Total Harmonic Distortion (THD) This factor shows the quality of the output voltage/current, i.e. it shows how much the output is close to the fundamental component. Voltage THD= THDv= V2 o rms−V2 o1 rms /Vo1 rms Current THD= THDi= I2 o rms−I2 o1 rms /Io1 rms Where Vo1 rms and Io1 rms are the fundamental rms output voltage and current, i.e. Vo1 rms=Vp1/ 2 and Io1 rms=Ip1/ 2 • As the THD decreases, as the quality of output increases. 37
  • 38.
    Fourier Analysis (Cont.) •Harmonic factor (HFn) This factor shows the ratio between the nth harmonic and the fundamental component. HFn= Vpn Vp1 • Lowest order harmonic (LOH) It shows the nearest harmonic order with magnitude >3% of the fundamental magnitude. 38
  • 39.
    Fourier Analysis (Cont.) •For half-bridge inverter with square-wave output vo(t)=∑ sin( ) , , ,.. THDV= V2 o rms−V2 o1 rms /Vo1 rms= V2 p3+ V2 p5+ V2 p7+…. V2 p1 = ( ) +( ) +( ) +( ) + ⋯ = ~0.48 (48%) • A square wave actually has about 48% total harmonic distortion meaning that the RMS of the harmonics is about 48% of the RMS of the fundamental frequency. HFn= Vpn Vp1 = 1 n and LOH=3 1 3 5 7 9 …. n (V pn /V p1 )% 100% 33.3% 20% 14.3% 11.1% 39
  • 40.
    Fourier Analysis (Cont.) •Powers with the existence of harmonics: 1) Active Power=P=∑ , , ,.. (W) where = 0.5 cos 2) Reactive Power=Q=∑ , , ,.. (VAR) where = 0.5 sin 3) Apparent Power S=Vorms Iorms (VA) 4) Distortion reactive power=D= − − (VAR) 5) Total reactive Power=QT= + (VAR) 6) Power factor= P/S 7) Displacement Factor= cos P Q D QT S Represents the interaction of voltage and current of same frequency Represents the interaction of voltage and current of different frequencies 40
  • 41.
    Disadvantages of Single-PhaseHalf-Bridge Inverter • The main drawback is the need for bulk DC capacitors to ensure operating with low voltage ripple (the voltage ripple is a result of AC current circulation through the capacitors). • Alternatively, single-phase full-bridge inverter can be used. 41 + - Vd + - Vd + - + - R R + - + - C1 C2 C2 C1 Vd/2R Vd/4R Vd/4R P o /V d =V d /4R Vd/2R P o /V d =V d /4R Vd/4R Vd/4R 0T/2 T/2 T
  • 42.
    Disadvantages of Single-PhaseHalf-Bridge Inverter (Cont.) 42 + - Vd + - Vd + - + - R R + - + - C1 C2 C2 C1 Vd/2R Vd/4R Vd/4R V d /4R Vd/2R V d /4R Vd/4R Vd/4R 0T/2 T/2 T C1 :Discharge C2 : Charge C1 :Charge C2 : Discharge 0.5Vd T/2 T 0 VC2 VC1 Voltage Ripple As C increases, Voltage ripple decreases Bulk Capacitances are needed.
  • 43.
    Inverters with Square-wave Output Single-phaseFull-Bridge (H-bridge) Inverter 43
  • 44.
    Single-phase Full-bridge Inverterwith square wave output T1 ,T2 T3 ,T4 ON OFF ON ON OFF OFF vo +Vd -Vd t t t 0.5T T 0.5T T T • AC output voltage is obtained, where square-wave= fundamental+ Harmonics. T=1/f = periodic time Vo rms= Vd 44 oad
  • 45.
    Single-phase Full-bridge Inverterwith square wave output (Cont.) The corresponding load current (io)depends on the load type. In case of resistive load (R): • When vo+ and io+  io passes through T1 and T2 . • When vo- and io-  io passes through T3 and T4. • Diodes are not conducting in resistive loads. • Pin=VdId ave= Po ave i.e. average supply current Id ave=Vd/R • Switch average current= 0.5(Vd/R) • Diode average current=0 vo +Vd -Vd t T io +Vd/R -Vd/R t T po V2 d/R t 45 id Vd/R t iT1 +Vd/R t 0.5T t T 0.5T VT1 +Vd
  • 46.
    Single-phase Full-bridge Inverterwith square wave output (Cont.) In case of inductive load (RL with τ = L/R): • The load current has exponential variations with τ = L/R. At steady-state, the load current lags the load voltage by certain angle. • Vo+ , io+  io passes through T1 and T2. • Vo+ , io-  io passes through D1 and D2. • Vo- , io-  io passes through T3 and T4. • Vo- , io+  io passes through D3 and D4. • Anti-parallel diodes are important to provide paths for current (when needed) vo +Vd -Vd t io t po t D3 D4 T1 T2 D1 D2 T3 T4 D1 D2 T1 T2 iD1 T/2 T +Imax -Imax iT1 46
  • 47.
    Single-phase Half-bridge Inverterwith square wave output (Cont.) In case of inductive load (RL with τ = L/R): Based on the step response of the 1st order RL circuit, load current peak is given by; Imax= (Vd/R)*[(1-e-T/2τ)/(1+e-T/2τ)] vo +Vd -Vd t io t T/2 T +Imax -Imax 47
  • 48.
    Fourier Analysis vo +Vd -Vd t T/2T Odd function Fundamental component Harmonics (not desired) 48 • vo(t)=∑ Vpn sin (nωot) , , ,.. Vpn=peak voltage of nth harmonics= ∫ ∗sin (nωot) dωot i.e. , Vpn= 4Vd nπ • vo(t)= 4Vd π [sin (ωot) + sin (3ωot)+ sin (5ωot)+……]
  • 49.
    Fourier Analysis (Cont.) •Using superposition, the load current of each frequency can be calculated, where Zn=|Zn|∟φn (where n =1,3,5,….) • io(t)= 4Vd π|Z1| sin(ωot- φ1)+ 4Vd 3π|Z3| sin(3ωot- φ3)+ 4Vd 5π|Z5| sin(5ωot- φ5)+….. • Ipn=peak current of nth harmonic= 4Vd nπ|Zn| + - + - + - io?? Vp1 ,fo Vp3 ,3fo Vp5 ,5fo Zn 49
  • 50.
    Example • Single-phase full-bridgeinverter with square-wave output, feeding a series (RLC) AC load where R=1 ohm, XL= 6 ohm , XC= 7 ohm at fundamental frequency (1000 Hz). If the DC voltage=230V and current harmonics other than fundamental are neglected. 1) Sketch output voltage, fundamental output current, supply current, switch current, switch voltage, diode current and diode voltage. 2) Indicate the devices that conduct during different intervals of one cycle. 3) Find power delivered to the load due to fundamental component. 50
  • 51.
    Solution • At fundamental Z1=1+j6-j7=1-j1ohm= 1.41 ∟-45o ohm Vp1=4*230/(π)=293 V Ip1=Vp1/|Z1|=208 A io1=208 ∟45o A (leading) • Po1= 0.5 I2 p1 R ~= 21.5 kW 51 vo +230 V -230 t io t D3 D4 T1 T2 D1 D2 T3 T4 iD1 1 ms iT1 VT1 VD1 id T1 T2 D1 D2 +230 -230
  • 52.
    Inverters with Square-wave Output Three-phaseinverter (1800 conduction mode) 52
  • 53.
    Three-Phase Inverter (1800conduction-Y Load ) 53 • T1 and T4 are controlled to generate square-wave voltage Vao. • T3 and T6 are controlled to generate square-wave voltage Vbo which lags Vao by 120 deg. • T5 and T2 are controlled to generate square-wave voltage Vco which lags Vbo by 120 deg. • Vao , Vbo, Vco are three- phase two-level voltages • Line voltage Vab equals Vao-Vbo. Similar for the other line voltages. Vd + Vd/2 - o a b c T1 T4 T5 T2 T3 T6 n Vao Vco Vbo ia ib ic van id + Vd/2 -
  • 54.
    54 T1 T1 T1T4 T4 T4 T3 T3 T3 T2 T2 T2 T6 T6 T6 T5 T5 T5 0 600 1200 1800 2400 3000 3600 vao vbo vco vab vbc vca +Vd/2 -Vd/2 +Vd/2 +Vd/2 -Vd/2 -Vd/2 +Vd -Vd +Vd -Vd +Vd -Vd 0-600 600-1200 1200-1800 1800-2400 2400-3000 3000-3600 Vd n a c b Z Z Z Van=vcn=vd/3 Vbn= -2vd/3 Vd n a c b Z Z Z Van=2vd/3 Vbn= Vcn = -vd/3 Vd n a c Z Z Z Van=vbn=vd/3 Vcn= -2vd/3 b n b Z Z Z Vbn=2vd/3 Van= Vcn = -vd/3 a c Vd n b c a Z Z Z Vbn=vcn=vd/3 Van= -2vd/3 n c a b Z Z Z Vcn=2vd/3 Van= Vbn = -vd/3 Vd Vd
  • 55.
    55 T1 T1 T1T4 T4 T4 T3 T3 T3 T2 T2 T2 T6 T6 T6 T5 T5 T5 0 600 1200 1800 2400 3000 3600 van vbn vcn 0-600 600-1200 1200-1800 1800-2400 2400-3000 3000-3600 Vd n a c b Z Z Z Van=vcn=vd/3 Vbn= -2vd/3 Vd n a c b Z Z Z Van=2vd/3 Vbn= Vcn = -vd/3 Vd n a c Z Z Z Van=vbn=vd/3 Vcn= -2vd/3 b n b Z Z Z Vbn=2vd/3 Van= Vcn = -vd/3 a c Vd n b c a Z Z Z Vbn=vcn=vd/3 Van= -2vd/3 n c a b Z Z Z Vcn=2vd/3 Van= Vbn = -vd/3 Vd/3 2Vd/3 -Vd/3 -2Vd/3 Vd/3 2Vd/3 -2Vd/3 -Vd/3 -2Vd/3 -Vd/3 Vd/3 2Vd/3 Six- Step Phase Voltages Vd Vd
  • 56.
    Conducting devices 56 Conducting device Conducting device Vao +,Ia + T1 Vao +, Ia - D1 Vao -, Ia - T4 Vao -, Ia + D4 Vbo +, Ib + T3 Vbo +, Ib - D3 Vbo -, Ib - T6 Vbo -, Ib + D6 Vco +, Ic + T5 Vco +, Ic - D5 Vco -, IC - T2 Vco -, Ic + D2
  • 57.
    Phase Currents andInput current (R-Load) 57 van vbn vcn ia ib ic Vd/3 2Vd/3 Vd/3R 2Vd/3R iT3 iT5 Vd/3R iT1 2Vd/3R id +2Vd/3R +Vd Vd/3R 2Vd/3R 2Vd/3R Vd/3R vT1 Pin=id ave*Vd=2V2 d /3R Pout=3 i2 a rms*R= 2 V2 d /3R id=iT1+iT3+iT5 Ia rms= ( ( + + ))= Vd/3R 0 600 1200 1800 2400 3000 3600 0 600 1200 1800 2400 3000 3600
  • 58.
    Phase Currents andSwitches current (RL-Load) 58 van ia Vd/3 2Vd/3 D1 D4 T1 T4 iT1 0 1800 3600 iD1 1800 vao Vd/2 -Vd/2
  • 59.
    Fourier Analysis (Y-connectedload) • Line voltage = 4 cos 6 sin ( + 6 ) , , ,… • For n=3, cos = 0 Triplen harmonics are absent from the line voltage. • RMS value of nth component of line voltage= VLn RMS = cos • RMS value of fundamentalcomponent of line voltage= VL1 RMS = cos = 0.78 • RMS value of line voltage (from graph)= VL RMS = ∫ = =0.8165 59
  • 60.
    Fourier Analysis (Y-connectedload) • Phase voltage = 2 sin , , , , … • RMS value of fundamental phase voltage= • RMS value of phase voltage (from the graph)= ( ( + + )) = 60
  • 61.
    Inverters with Square-wave Output 4-Three-phase inverter (1200 conduction mode) 61
  • 62.
    (1200 conduction-Y ResistiveLoad ) 62 • In this mode, Each IGBT conducts for 120 deg only. • IGBTs are working sequentially (one by one) T1T2T3T4T5T6 Vd/2 Vd/2 o a b c T1 T4 T5 T2 T3 T6 n Vao Vco Vbo ia ib ic van id R R R
  • 63.
    63 T1 T1 T4T4 T3 T3 T2 T2 T6 T6 T5 T5 0 600 1200 1800 2400 3000 3600 vao ,van vab ia +Vd/2 -Vd/2 +Vd/2 +Vd/2 -Vd/2 -Vd/2 +Vd -Vd 0-600 600-1200 1200-1800 1800-2400 2400-3000 3000-3600 Van=vd/2 Vbn= -vd/2 Vd n a c R R +Vd/2 -Vd/2 vbo ,vbn vco ,vcn Vd n a b R R Vd n b c R R Vd n b a R R Vd n c a R R Vd n c b R R Vcn= 0 Van=vd/2 Vbn=0 Vcn= -vd/2 Van=-vd/2 Vbn= vd/2 Vcn= 0 Van=0 Vbn= vd/2 Vcn= -vd/2 Van= -vd/2 Vbn= 0 Vcn= vd/2 Van=0 Vbn= -vd/2 Vcn= vd/2 +Vd/2R -Vd/2R I2 a rms= (1/π)((2π/3)*(V2 d/4R2))= V2 d/6R2 PLoad= 3 I2 a rms R= V2 d/2R iT1 +Vd/2R
  • 64.
    Fourier Analysis • PhaseVoltage = 2 , , ,… cos 6 sin ( + 6 ) • Phase Voltage, Fundamental, Peak= cos =0.3898 Vd • Phase Voltage, Fundamental, RMS= 0.3898 Vd • Phase Voltage, RMS (graph)= ∫ =0.4082 Vd 64
  • 65.
    Fourier Analysis • LineVoltage = 3 , , , , ,… sin ( + 3 ) • Line Voltage, Fundamental , Peak= • Line Voltage, Fundamental , RMS= =0.6752 Vd • Line Voltage, RMS (graph)= ∫ + ∫ + ∫ = 65
  • 66.
    Question Three-phase inverter feedinga resistive load Vd=450 V Y-connected load of 10 ohm determine for a) 180 deg mode and b) 120 deg mode the following (i) RMS value of load current (ii) RMS value of switch current (iii) Load power 66 180 deg 120 deg RMS of load current 21 A 18.37 A RMS of switch current 15 A 13 A Average load power 13 kW 10.125 kW Answers
  • 67.
  • 68.
    Dead-time of legsemiconductors • Each switch has turn-on and turn-off times (i.e. it takes certain time to complete the turn-on or turn-off actions), so when Ta- is operated as a complement of Ta+ (as shown below), short-circuit occurs across the DC input Voltage. 68 Vd a Ta+ Ta- leg Control Signals Ta+ Ta- ON ON ON OFF OFF OFF Short-circuit on DC input Voltage at these instants
  • 69.
    Dead-time of legsemiconductors (Cont.) • To avoid short-circuit on the DC input voltage during the transition instants, deadtime (td) is used as shown below, where a deadtime of 1-2 µs is very sufficient. 69 Vd a Ta+ Ta- leg Control Signals Ta+ Ta- ON ON ON OFF OFF OFF td td
  • 70.
    Dead-time of legsemiconductors (Cont.) • The implementation of deadtime circuit can be done using ON- delay timers as follows. • The rising edge of the timer output is delayed by td from the rising edge of its input (i.e. delayed ON). • The falling edge of the timer output happens at the same instant of the falling edge of its input (simultaneous OFF). 70 Vd a Ta+ Ta- leg Control Signal Upper switch Control Signal Lower switch S S’ ON delay (td) ON delay (td) Control Signal Ta+ Control Signal Ta- S S’ Control Signal Ta+ Control Signal Ta-
  • 71.
    Dead-time of legsemiconductors (Cont.) • IR 2111 Gate Driver IC can be used for Half-bridge leg with built- in deadtime instead of implementing two TLP 250 gate-drive circuits with deadtime (one for upper switch and one for lower switch). The connections of IR 2111 IC is shown below. 71
  • 72.
  • 73.
    What is aSnubber Circuit? • Snubbers are any of several simple energy absorbing circuits used to eliminate voltage spikes caused by circuit inductance when a switch opens. • The object of the snubber is to eliminate the voltage transient and ringing that occurs when the switch opens by providing an alternate path for the current flowing through the circuit leakage inductance.
  • 74.
    What is theproblem? • When this switch is turned-off, The interaction between the energized leakage inductance and parasitic capacitance results in transient over-voltage across switch (under-damped response of LC circuit) with steady state voltage of Vd. If the peak value is higher than the switch capability, the switch may damage due to voltage stresses. The solution is to add a circuit across the switch to damp the over voltage and oscillations (i.e. snubber circuit)
  • 75.
    Snubber circuits • Thesimplest type of snubber circuits is to add proper external capacitor (Csnu) across the switch. When the switch is turned-off, Csnu can provide a path for stray inductance current and absorb the inductance energy which results in limiting the voltage across the switch, i.e. Csnu will be charged. • But when the switch is turned-on, the capacitor will be shorted and discharge in the switch (over current stresses on switch). • Resistor can be added in series with Csnu to resolve this issue and dissipate the energy stored in the capacitor during turn-on condition.
  • 76.
    RC snubber circuit •From the name itself, it is uses resistor and capacitor to form a snubber circuit. This is commonly used snubbers for switching MOSFETs. It is very effective on turn-off surge voltage suppression.
  • 77.
  • 78.
    How RC SnubberWorks • RC snubber is commonly used in switching converters to limit the voltage spike on the switching device into a safe level. Not just by simply clamping the voltage spike alone, but also modifying the spike frequency or ringing behavior to prevent further issue.
  • 79.
    RC snubber design ~= is the leakage inductance Coss is the parasitic capacitance of the switch Ringing frequency of vsw without snubber circuit, i.e. fr= With respect to R value: With respect to Csnu value: The larger C, the lower oscillations but the larger power loss The trend is to keep the power loss few tens of mW (i.e., 20-50mW) to avoid hot spots. Power losses in snubber is given by; Ploss= Csnu V2 Csnu fsw Where fsw is the switching frequency, VCsnu steady state voltage across snubber capacitor after turn-off.
  • 80.
    Example: RC snubbercircuit design If Stray inductance=250 nano-Henry, ringing frequency without snubber circuit=fr= 25 Mega-Hz, design Proper RC snubber circuit for MOSFET, where Voltage on drain at turn-off is 20 V assuming 200kHz switching frequency. Solution: • fr= → Coss=162 pF • ~ = =39 Ω • Ploss= Csnu V2 Csnu fsw 25mW= Csnu (20)2 (200000) Csnu=312.5 pF 312.5 pF 39 Ω
  • 82.
    Other types ofsnubber circuits • RCD snubber • In addition to peak voltage limiting, the circuit can reduce the total circuit loss. • For diode, a fast recovery diode type is suitable. Charge discharge
  • 83.
    Switching and Conduction Lossesof Controlled Switches 83
  • 84.
    1- Switching Losses 84 + - Io Vo + - vT iT Controlsignal of (T) iT vT iT vT Ps Zoom (1-cycle) OFF ON OFF ON ton toff Vo Io 0 Vo Vo Vo Io ton toff IoVo t t t t t t Switching losses= average of (Ps)= Area under curve /Ts = (0.5IoVo ton+ 0.5IoVo toff) / Ts= (0.5IoVo ton+ 0.5IoVo toff)fs= Ps= 0.5IoVo fs(ton+ toff) Ts 0 2Ts • ton: is the turn-on time of the switch. • toff: is the turn-off time of the switch. • fs: switching frequency= 1/Ts
  • 85.
    2- Conduction losses •It is losses due to conduction due to on- state voltage (Von=1-2 V) and on-state resistor (Ron ,mΩ) of the switch. • PC= Von Iave + I2 RMS Ron • Inverters have switching losses and conduction losses =~ 3-5%, i.e. efficiency =~95-97% 85 Ron von i(t)
  • 86.
    Example • Find theswitching and conduction losses of single-phase half-bridge inverter feeding resistive load of 10 Ω where Vd=200V, ton=toff=1 µs , on-state voltage of IGBT = 2V, On-state resistance of IGBT=5 mΩ and switching frequency of 1kHz. Solution: • Ps per switch = 0.5IoVo fs(ton+ toff)=0.5(Vd/2R)(Vd) fs(ton+ toff) • PC per switch = Von Iswitch average + I2 switch RMS Ron= Von [0.5(Vd/2R)] + [0.5(Vd/2R)2]Ron 86
  • 87.
    Example Three-phase inverter feedinga resistive load Vd=450 V Y-connected load of 10 ohm at 1 kHz if ton=toff=0.75 µs , on-state voltage of IGBT =1.35 V, On-state resistance of IGBT=2 mΩ. determine for a) 180 deg mode and b) 120 deg mode the following (i) Conduction losses per switch (ii) Switching losses per switch (iii) Total inverter losses 87
  • 88.
    Thermal Management and HeatsinkDesign of semiconductor devices
  • 89.
    Thermal Management andHeat Sink Design • In this part following points to be covered 1- Thermal and heat transfer mechanism equations (mainly, thermal conduction) 2- How to design a heatsink 3- How to estimate the junction temperature of a device (Tj) for different cooling cases.
  • 90.
    Source of Heatin Power Electronic Devices • The conduction and switching losses of the device (Ploss ) in Watt is the source of heat which rises the temperature of the device above the ambient temperature (Tabm), i.e. leads to temperature difference (ΔT), i.e. PLOSS  ΔT. The relation as follows; ΔT= Temperature difference between two points (1,2) L= length is the distance between these points A= cross sectional area K= thermal conductivity of material Thermal Resistance:
  • 91.
    Analogy between electricaland thermal system Electrical resistance thermal resistance =Rθ Rθ=
  • 92.
    Example1 (MOSFET withoutheatsink) For PLOSS=6W , Ambient Temp= 25oC , and thermal data of the switch (Data sheet) is as follows; With heatsink Without heatsink
  • 93.
    Example1 (no heatsink) Veryhigh temp.!!! Heatsink is important
  • 94.
    Equivalent circuit fordevice with heatsink • Let’s assume we have power MOSFET connected to a heatsink through thermal conductor as shown below. The heat produced inside the MOSFET goes through the materials and then is dissipated by the heatsink. We can define here three different thermal resistance between the junction of MOSFET and the ambient temperature as follows;
  • 95.
    Equivalent circuit fordevice with heatsink PLOSS is the thermal source (Rθjc) (Rθcs) (Rθsa) The equivalent circuit is used to check the temperature of MOSFET junction.
  • 96.
    Rθjc Rθcs Rθsa T1 T2= T1+PLOSS(Rθjc+Rθcs+Rθsa) Obtained fromthermal conductor specs Obtained from device data sheet Obtained from heatsink data (curves)
  • 98.
    Heatsink curves (naturalcooling) • We look to the highlighted axes, we enter with PLOSS in Watt, to get the temperature rise above ambient in oC. • For example, E51, Ploss=6W, Temp rise above ambient =49oC Natural cooling curves
  • 99.
    Heatsink curves (Forcedcooling) • We look to the highlighted axes, we enter with Air velocity, to get thermal resistance from surface to ambient. Forced cooling curves
  • 100.
    Thermal graph ofa heatsink
  • 101.
    Thermal resistance ofthermal conductor • In order to have proper connection between the MOSFET and heatsink, a proper thermal conductor is used to provide good thermal contact between them to ensure that all the area of the MOSFET is properly connected to the heatsink and also ensure that the MOSFET is electrically isolated from the heatsink. • Rθcs depends on the material we will select. Here are the values of thermal resistances for different common materials used as thermal conductor.
  • 102.
    Example2 (MOSFET withheatsink +natural cooling) For same data in Example1, repeat calculations if heatsink with the following specs is employed assuming natural cooling and silicon pads are used.
  • 103.
  • 104.
  • 105.
    Example2 Junction Temperature isreduced from 400oC to 100oC when heatsinks +natural cooling is employed
  • 106.
    Example3 (MOSFET withheatsink +forced cooling) For same data in Example1, repeat calculations if heatsink with the following specs is employed assuming forced cooling (400 ft./min) and silicon pads are used.
  • 107.
  • 108.
    Example3 Junction Temperature isreduced from 100oC to 70oC when heatsinks forced cooling is employed instead of natural cooling
  • 109.
  • 110.
    Bipolar Selective HarmonicElimination (SHE) • Assume the bipolar output voltage (vaO) is generated from half-bridg inverter as follows: 110 Vd a Ta+ Ta- O + Vd - 2 + Vd - 2 Ta+ Ta- α1 α2 α1 α2 vaO +ve half cycle (Ave+) -ve half cycle (Ave-) α2 α1 π/2 π 2π +0.5 Vd -0.5 Vd Ta+ ON vao=+Vd/2 Ta- ON vao=-Vd/2
  • 111.
    Bipolar Selective HarmonicElimination (Cont.) The Fourier analysis for the shown output voltage is given by; Vpn= ∫ sin − ∫ sin + ∫ sin / i.e., Vpn= [1 − 2 cos + 2 cos ] 111 Ta+ Ta- α1 α2 α1 α2 vaO α2 α1 π/2 π 2π α1 α2 +0.5 Vd -0.5 Vd
  • 112.
    Bipolar Selective HarmonicElimination (Cont.) As Vpn= [1 − 2 cos + 2 cos ], the angles and can be selected to control two voltage components of the output voltage FFT spectrum while keeping the switching frequency low. For example: To achieve certain fundamental voltage magnitude (=A) and eliminate one component of the harmonic components ( let it 3rd harmonic). Vp1= [1 − 2 cos + 2 cos ]=A, i.e. [1 − 2 cos + 2 cos ]-A=0 ----(1) To eliminate 3rd harmonic Vp3 should =0, i.e. Vp3= 1 − 2 cos 3 + 2 cos 3 =0 -----(2) By solving Eqs (1) and (2) , suitable values of and can be estimated. 112
  • 113.
    Bipolar Selective HarmonicElimination (Cont.) Note: If it is desired to eliminate the 3rd and 5th harmonics, following equations can be used to find the suitable angle. Vp3= 1 − 2 cos 3 + 2 cos 3 =0 -----(1) Vp5= 1 − 2 cos 5 + 2 cos 5 =0 -----(2) By solving Eqs: (1) and (2) , =23.60 and =33.30. The corresponding fundamental component magnitude for these values of angles is as follows: Vp1= 1 − 2 cos + 2 cos =0.5342 Vd “Uncontrolled in this case” 113
  • 114.
    Bipolar Selective HarmonicElimination (Cont.) Newton Raphson Method If f(x)=0, find x=? .. Assume initial guess of x=xo 1st iterationx1= xo-[f(xo)/f’(xo)] 2nd iterationx2= x1-[f(x1)/f’(x1)] 3rd iterationx3= x2-[f(x2)/f’(x2)] Example: f(x)=x2-4x-7=0 , find x=? Assume xo=5 Solution: f’(x)=2x-4 x1=5-[(52-4(5)-7)/(2(5)-4)]=5.33 x2=5.33-[(5.332-4(5.33)-7)/(2(5.33)-4)]=5.3166 ….. etc 114
  • 115.
    Bipolar Selective HarmonicElimination (Cont.) Newton Raphson Method System of non-linear equations: If f1(x,y)=0 and f2(x,y)=0, find x, y=? .. Assume initial guess of x=xo and y=yo  1st iteration 115 = − [J] , ( , ) ( , ) [J] =
  • 116.
    Bipolar Selective HarmonicElimination (Cont.) Newton Raphson Method for solving SHE equations to eliminate 3rd and 5th Harmonics: Assume initial guess α1(0)=200 , α2(0)=300  1st iteration: 116 f1(α1 , α2)= 1 − 2 cos 3 + 2 cos 3 =0 -----(1) f2(α1 , α2)= 1 − 2 cos 5 + 2 cos 5 =0 -----(2) α ( ) α ( ) = α ( ) α ( ) − [J] α ( ),α ( ) (α ( ), α ( )) (α ( ), α ( )) [J] = α α α α
  • 117.
    Bipolar Selective HarmonicElimination (Cont.) Note: Bipolar Output voltage with higher number of angles (α1 to αN) can be generated. As a result, N component of output voltage Fourier components can be controlled. Bipolar Output voltage with four angles (α1 to α4) are shown below. 117 0.5Vd -0.5Vd VaO 2π π 0.5π α1 α2 α3 α4 Vpn= [1 − 2 cos + 2 cos − 2 cos + 2 cos ]
  • 118.
    Bipolar Selective HarmonicElimination (Cont.) The load current shapes in case of SHE for different load types are shown below. 118 0.5Vd vao 2π π 0.5π -0.5Vd Resistive Load 0.5Vd/R ia 0.5π -0.5Vd/R
  • 119.
    Bipolar Selective HarmonicElimination (Cont.) The load current shapes in case of SHE for different load types are shown below. 119 0.5Vd vao 2π π 0.5π -0.5Vd Inductive Load ia φ1
  • 120.
    Bipolar SHE forthree-phase Inverter • Each leg in the three-phase converter is controlled as illustrated before for the single-phase HB inverter, but with shifted voltages (1200 phase shift between phases). • For Y-connected load, as the triplen harmonics are cancelled from the line voltages, no need to eliminate the 3rd Harmonic from vao , vbo and vco which means that the angles (α1 and α2) are selected to control the magnitude and eliminate 5th harmonic (not the 3rd). Or to eliminate the 5th and 7th harmonics without controlling the fundamental magnitude. • More angle can be used (α1: αN) to control the fundamental voltage magnitude and eliminate (N-1) harmonics (5th ,7th , 11th , 13th , 17th , …etc) “No need to eliminate triplen harmonics (3rd ,9th ,15th ,…)” 120
  • 121.
    Unipolar SHE • Assumethe Unipolar output voltage (vab) is generated for Full-bridge inverter as follows: 121 Vd b T3 T2 a T1 T4 T1, T2 ON vab= +Vd T3, T4 ON vab= -Vd T1, T3 ON  vab= 0 T2, T4 ON vab= 0 T1 T2 T3 T4 2π π 0 π/2 α1 α2 α3 vab Vpn= [cos − cos + cos ] +vd -vd 0
  • 122.
    Unipolar SHE (Cont.) •Vpn= [cos − cos + cos ] the angles , and can be selected to control three voltage components of the output voltage FFT spectrum. For Example: if the desired fundamental voltage =A and it is desired to remove 3rd and 5th harmonics, following equations can be used to find angles values; • Vp1= cos − cos + cos =A cos − cos + cos -A=0 --(1) • Vp3= cos 3 − cos 3 + cos 3 =0 --(2) • Vp5= [cos 5 − cos 5 + cos 5 ]=0 --(3) Eqs (1), (2), (3) are solved using Newton Raphson Method to get values of angles 122
  • 123.
    Unipolar SHE (Cont.) Note:if it is desired to remove 3rd , 5th and 7th harmonics, following equations can be used to find angles values; • Vp3= cos 3 − cos 3 + cos 3 =0 --(1) • Vp5= [cos 5 − cos 5 + cos 5 ]=0 --(2) • Vp7= [cos 7 − cos 7 + cos 7 ]=0 --(3) Eqs (1), (2), (3) are solved using Newton Raphson Method to get values of angles. The corresponding fundamental voltage is given by; Vp1= cos − cos + cos “Uncontrolled in this case” 123
  • 124.
  • 125.
    PWM inverters Advantages: 1) Abilityto control output voltage without additional components 2) Low order harmonics can be eliminated, higher order harmonics can be filtered easily, i.e. filtration requirement is minimized. Disadvantages: high switching frequency and high switching losses
  • 126.
    PWM Inverters PWM Inverters:it output voltage has constant magnitude pulses, while The width of pulses is modulated to obtain voltage control and reduce harmonic content. Classifications: a) Single-PWM (Quazi-square). b) Multi-PWM with equal pulse widths. c) Sinusoidal PWM (SPWM) with unequal pulse widths (pulse width is proportional to sin-wave amplitude at the desired instant). • Single-phase: Unipolar SPWM and Bipolar SPWM. • Three-phase: Bipolar SPWM (without and with third harmonic injection). d) Space Vector Modulation (SVM) for three-phase two- level inverters. 126 Single-PWM Vo: 0, +, - (FB) Multi-PWM Vo: 0, +, - (FB) Unipolar SPWM Vo: 0, +, - (FB) Bipolar SPWM Vo: +, - (FB or HB) vo vo vo vo
  • 127.
    vab iab + - 0+0- + - Single-PWM (Quazi-square Output) • the reference signal is compared with the carrier signal as shown to generate quazi-square output voltage. • By varying the magnitude of reference signal (Ar) from zero to the carrier signal magnitude (Ac), the pulse width of the pulse per half cycle changes from zero to π, i.e. changes the rms of output voltage from 0 to Vd. • Define: Amplitude modulation index (ma)=Ar/Ac where 0<ma<1 • (d/(0.5π))=Ar/Acma=2d/π. 127 Vd b T3 T2 a T1 T4 vab Control Signals D1 T3 D1 D2 T1 T2 D3 T1 D4 T2 D3 D4 T3 T4 D2 T4 iab Carrier Ac Ar Reference π 2π π 2 +Vd -Vd T1 T2 T3 T4 iab 2d 2d d T1, T2 on, Vab=+Vd T3, T4 on, Vab=-Vd T1, T3 on, Vab= 0 T2, T4 on, Vab= 0 (RL load) Conducting devices
  • 128.
    Single-PWM (Cont.) • vabrms = ( ∗ 2 ) = = = 128 vab rms 0 1 0.5 0.25 0.75 0 0.71Vd 0.87 Vd 0.5Vd Vd vab +Vd 2d 2d -Vd π 2π
  • 129.
    Single-PWM (Cont.): FourierAnalysis • Vab(t)= Ʃn=1,3,5,… Vpn sin (nwot) Where Vpn= ∫ sin Vpn= sin sin Vab(t)= (sin sin - sin 3 sin 3 + sin 5 sin 5 - …) Note: at square-wave output d= π/2. by substituting with this value in the above Fourier series , it gives the Fourier series of the square wave. 129 vab +Vd 2d 2d -Vd π 2π π/2 • Example: if 2d= 720 The fundamental peak Vp1= (4Vd/ π) sin 360= 0.75 Vd
  • 130.
    Single-PWM (Cont.): FourierAnalysis • Vpn= sin sin  |Vpn|/( ) = sin |Vpn| /( ) 130 2 π 2π/3 2π/5 1 1/3 1/5 n=1 n=3 n=5 • At 2d=1200  no 3rd harmonics • At 2d=720 and 1440  no 5th harmonics • At low 2d All harmonics become comparable to fundamental.. i.e. voltage control can be done but with great deal of harmonics content
  • 131.
    FFT for outputvoltage at ma=0.25, Vd=200 V 131 100%
  • 132.
    FFT for outputvoltage at ma=0.75, Vd=200 V 132 100%
  • 133.
    vab iab + - 0+0- + - Carrier-Based Multi-PWM Vd b T3 T2 a T1 T4 D1 T3 D1 D2 T1 T2 D3 T1 D4 T2 D3 D4 T3 T4 D2 T4 Conducting devices iab Carrier (fc) Reference(fr) 2π π π/2 AC Ar vab δ • Multi-PWM is an extension for Single-PWM, where several equidistant pulses per half-cycle are used. • Define: N is number of pulses per half cycle where N=fc/2fr . • Define mf=frequency modulation index= fc/fr • Vab rms= δ • As number of pulses increases in each half cycle, low order harmonics reduces but higher order harmonics increases (to be removed by filters). • As number of pulses N increases, switching losses increases. +Vd -Vd N=3 T1, T2 on, Vab=+Vd T3, T4 on, Vab=-Vd T1, T3 on, Vab= 0 T2, T4 on,Vab= 0
  • 134.
    FFT for outputvoltage at ma=0.25,mf=20, Vd=200 V 134
  • 135.
    FFT for outputvoltage at ma=0.75,mf=20, Vd=200 V 135 100%
  • 136.
    Symmetrical Multi-PWM 136 vab θ1 θ1 θ2 γ δ Assume: Npulse per half cycle θ1= (π-Nδ) / (N+1) θ2= δ/2 γ= θ1+θ2 θ1 π 0 Timers are used to generate the output voltage +Vd
  • 137.
    Symmetrical Multi-PWM (Cont.):Fourier 137 vab γ-(δ/2) γ δ For 2 pulse per half cycle: vab(t)= Ʃn=1,3,5,… Vpn sin (nwot) π 0 2π γ+(δ/2) δ δ δ = 2 2 ∗ sin = 8 sin sin 2 • Example: if δ= 360 γ= [(180-72)/3] +(36/2) =540 The corresponding fundamental peak Vp1= (8Vd/ π) sin 540 sin 180= 0.637 Vd +Vd -Vd
  • 138.
    Sinusoidal PWM (SPWM) 1-Unipolar: Several pulses per half cycle are used as multi-PWM. In multi-PWM, pulses widths are equal. But in unipolar SPWM, pulse width is a sinusoidal function of the angular position of the pulse in a cycle. Case I: Peak of triangle carrier coincident with zero of reference signal. • Number of pulses per half cycle= (fc/2fr)=0.5mf • mf= frequency modulation index=fc/fr • ma= Amplitude modulation index=Ar/Ac 138 Carrier (fc) Reference(fr) 2π π π/2 AC Ar vab +Vd -Vd By comparing carrier and reference signal, the intersection of them determines switching instants of modulated pulses Vd b T3 T2 a T1 T4 T1, T2 on, Vab=+Vd T3, T4 on, Vab=-Vd T1, T3 on, Vab= 0 T2, T4 on, Vab= 0
  • 139.
    Unipolar Sinusoidal PWM(Cont.) Notes: • Modulation index controls harmonic content of the output voltage. As ma increases, total harmonic distortion decreases. • Magnitude of fundamental component proportional to ma (linear relation). Vp1=ma Vd ,for 0<ma<1 • By varying ma from 0 to 1, the fundamental peak changes from 0 to Vd. • For ma<1, the largest harmonic amplitudes are associated with harmonics of order mf +1. • As mf increases, the order of dominant harmonic frequency can be raised, which can be filtered easily. But switching losses increase. • If ma>1 is used (Over modulation) lower order harmonics appear as pulse width is no longer a sinusoidal function of angular position of the pulse. 139
  • 140.
    Unipolar Sinusoidal PWM(Cont.) Notes: • For ma<1  harmonics order centered around mf , 2mf , 3mf are significant. 140 FFT n 1 mf maVd Low pass filter can be used to remove high order harmonic easily: fcut ~= 0.1fc 2mf
  • 141.
    FFT for outputvoltage at ma=0.75,mf=20, Vd=200 V 141 100%
  • 142.
    FFT for outputvoltage at ma=1.25,mf=20, Vd=200 V 142 Low order harmonics appear (Over modulation) bulk filter is needed 100%
  • 143.
    Unipolar Sinusoidal PWM(Cont.) Case II: Zero of triangle carrier coincident with zero of reference signal. Number of pulses per half cycle= (fc/2fr)-1=0.5mf-1 143 Carrier (fc) Reference(fr) 2π π π/2 AC Ar vab +Vd -Vd Vd b T3 T2 a T1 T4 Carrier (fc) Reference(fr)
  • 144.
    FFT for outputvoltage at ma=0.75,mf=20, Vd=200 V 144 100%
  • 145.
    Vp1 vs. ma(Unipolar SPWM) 145 Vp1 ma Vd 1 ma (saturation) (depends on fc) 4Vd/π Vd b T3 T2 a T1 T4
  • 146.
    Bipolar SPWM (Single-Phase) •Bipolar carrier is used with frequency (fc). • Bipolar output voltage is generated (+/- Vx), where; Vx= Vd (FB) Vx= 0.5Vd (HB) • ma=Ar/Ac • Mf=fc/fr 146 Vd b T3 T2 a T1 T4 T1, T2 on, Vab=+Vd T3, T4 on, Vab=-Vd Vd a T1 T2 b + 0.5Vd - + 0.5Vd - T1 on, Vab=+0.5Vd T2 on, Vab=-0.5Vd + - Ref. carrier T1 T2 + - Ref. carrier T1, T2 T3,T4 Ac -Ac Ar Carrier (fc) Reference(fr) π 2π vab +Vx -Vx iab RL load
  • 147.
    Bipolar SPWM (Single-Phase) Notes: •At ma=1, Vp1=0.5Vd (HB) or = Vd (FB) • Vp1 is proportional with ma (linear relation) for 0<ma <1 • Generally Vp1= 0.5ma Vd (HB) or= ma Vd (FB) • mf=fc/fr , it is recommended to choose odd mf to ensure output voltage wave symmetry. • At ma>1 (over-modulation): the relation between Vp1 and ma is non linear and magnitude of low order harmonics increases. • Vab rms = 0.5Vd (HB) or= Vd (FB) 147
  • 148.
    Vp1 vs. ma(Bipolar SPWM single-phase) 148 Vp1 ma Vx 1 ma (saturation) (depends on fc) 4Vx/π Vx=0.5Vd (HB) Vx=Vd (FB)
  • 149.
    Bipolar Sinusoidal PWM(FFT) Notes: • For ma<1  harmonics order centered around mf , 2mf , 3mf are significant. 149 FFT n 1 mf maVx Low pass filter can be used to remove high order harmonic easily: fcut ~= 0.1fc 2mf
  • 150.
    FFT for vabat ma=0.75,mf=20, Vd=200 V, FB 150
  • 151.
    FFT for Vabat ma=1.25,mf=20, Vd=200 V, FB 151 Low order harmonics appear (Over modulation) 100%
  • 152.
    Unipolar SPWM (usingBipolar PWM at each leg) 152 Ta+ on, Vao=+0.5Vd Ta- on, Vao=-0.5Vd + - Ref. carrier Ta+ Ta- Ac -Ac Ar Carrier (fc) Ref.(fr) π 2π -Ref. 0.5Vd b Tb+ Tb- a Ta+ Ta- 0.5Vd 0 Tb+ on, Vbo=+0.5Vd Tb- on, Vbo=-0.5Vd + - -Ref. carrier Tb+ Tb-
  • 153.
    fc=450, fr=50 (mf=9),Vd=200V, ma=1 153 vao vbo vab -100 +100 +200 -200
  • 154.
    FFT of Vabat fc=450, fr=50, Vd=200 V, ma=1 154 Note: For ma<1, harmonics order centered around 2mf are significant. Harmonics around mf do not appear, as they are in- phase in vao and vbo. As Vab=Vao-Vbo, these harmonics do not appear in the FFT of Vab. 100% 900Hz
  • 155.
    FFT of Vabat fc=450, fr=50, Vd=200 V, ma=1.25 155 100% Low order harmonics appear (Over modulation) 900Hz
  • 156.
  • 157.
    Three-phase two-level inverterwith bipolar SPWM: 3x (1φ HB) bipolar with SPWM 157 Vd + Vd/2 - o a b c T1 T4 T5 T2 T3 T6 n Vao Vco Vbo ia ib ic van id + Vd/2 - T1 on, Vao=+0.5Vd T4 on, Vao=-0.5Vd + - v*aO pu Carrier pu T1 T4 T3 on, Vbo=+0.5Vd T6 on, Vbo=-0.5Vd + - v*bO pu T3 T6 T5 on, Vco=+0.5Vd T2 on, Vco=-0.5Vd + - v*cO pu T5 T2 v*aO pu= v*aO / (0.5Vd) v*bO pu= v*bO / (0.5Vd) v*cO pu= v*cO / (0.5Vd) Ref. voltages:
  • 158.
    Three-phase two-level inverterwith bipolar SPWM. Vd=300V, ma=0.8, fc=350Hz, fr=50Hz, Z=15∠450 Ω 158
  • 159.
    Three-phase two-level inverterwith bipolar SPWM. Vd=300V, ma=0.25, fc=350Hz, fr=50Hz, Z=15∠450 Ω 159
  • 160.
    Three-phase two-level inverterwith bipolar SPWM. Vd=300V, ma=0, fc=350Hz, fr=50Hz, Z=15∠450 Ω 160
  • 161.
    Three-phase two-level inverterwith bipolar SPWM. Vd=300V, ma=1.5, fc=350Hz, fr=50Hz, Z=15∠450 Ω 161
  • 162.
    Three-phase two-level inverterwith bipolar SPWM. Vd=300V, ma=0.8, fc=3500Hz, fr=50Hz, Z=15∠450 Ω 162
  • 163.
    Three-phase two-level inverterwith bipolar SPWM. • As modulation index decreases, the total harmonic distortion of the output current (THDi) increases. • During over-modulation (ma>1), as ma increases, the total harmonic distortion of the output current increases. 163 THDi ma 1 Over-modulation
  • 164.
    Three-phase two-level inverterwith bipolar SPWM. Notes: • At ma=1, Vp1 of van(t) =0.5Vd • Vp1 of van(t) is proportional with ma (linear relation) for 0<ma<1 • Vp1 of van(t) = 0.5ma Vd • Vp1 of vab(t) = 0.5 3ma Vd • mf=fc/fr , it is recommended to choose odd mf to ensure output voltage wave symmetry. • At ma>1 (over-modulation): the relation between Vp1 of van(t) and ma is non linear and magnitude of low order harmonics increases. 164
  • 165.
    Three-phase two-level inverterwith bipolar SPWM. 165 VLL rms 1/Vd ma 1 ma (saturation) (depends on fc) Saturation (square-wave) 3/(2 2) 6/π 120o 180o -Vd Vd Vp1 of Vab(t)= (4Vd/π) cos(π/6) Vrms 1 of Vab(t)= (4Vd/ 2π) cos(π/6)= (4Vd/ 2π) ( 3/2) ( 6/ π)Vd
  • 166.
    Three-phase two-level inverterwith bipolar SPWM. Notes: • For ma<1  harmonics order centered around mf , 2mf , 3mf are significant. 166 FFT of phase voltage n 1 mf ma(0.5Vd) Low pass filter can be used to remove high order harmonic easily: fcut ~= 0.1fc 2mf
  • 167.
    Three-phase two-level inverterwith bipolar SPWM. fc=3500 Hz, fr=50Hz. FFT for the Phase voltage. 167 During over-modulation (ma>1), low order harmonics appear. ma=0.8 ma=1.5 100% 100%
  • 168.
    Three-phase two-level inverter withbipolar Third harmonic Injection PWM (THIPWM) 168
  • 169.
    Three-phase two-level inverterwith bipolar Third harmonic Injection PWM (THIPWM) • In case of three-phase inverter with SPWM as ma changes from 0 to 1, the peak of fundamental component of the phase voltage changes from 0 to 0.5Vd. • To enhance this range and increase DC voltage utilization (by 15%), third harmonic injection (THI) can be used, i.e. V*ao pu= ma(1.15sin wt + 0.19 sin3wt), where ma is the modulation index (01) in linear region. 169 at ma=1 i.e. (Ar/Ac)=1 Ref.
  • 170.
    Three-phase two-level inverterwith bipolar Third harmonic Injection PWM (THIPWM) • Generally, the p.u. reference voltages in THIPWM are given by; V*ao pu= ma(1.15sin wt + 0.19 sin3wt) V*bo pu= ma(1.15sin(wt-1200) + 0.19 sin3wt) V*co pu= ma(1.15sin(wt+1200) + 0.19 sin3wt) The corresponding line voltages references are as follows; V*ab pu=V*ao pu-V*bo pu= 3ma (1.15sin (wt+30o)) “no third harmonic”. Similar for the other line voltages,i.e. line voltages have no 3rd harmonic. 170 at ma=Ar/Ac=1
  • 171.
    Three-phase two-level inverterwith bipolar Third harmonic Injection PWM (THIPWM) • The corresponding phase voltages in Y- connected load are as follows; Van= 0.5Vdma (1.15)sin wt Vbn= 0.5Vdma (1.15)sin(wt-1200) Vcn= 0.5Vd ma (1.15)sin(wt+1200) As ma at 1, the reference signals peak is unity as shown in figure, i.e. a phase voltage with peak of 0.5Vd (1.15) can be obtained with THIPWM, i.e. 15% higher than SPWM without 3rd harmonic injection. We can conclude that by applying THIPWM, DC voltage utilization increases by 15%. 171 at ma=1
  • 172.
    Three-phase two-level inverterwith THIPWM. Vd=300V, ma=1, fc=3500Hz, fr=50Hz, Z=15∠450 Ω 172 100% Phase voltage Vp1=1.15*ma*0.5Vd =1.15*1*150 =172.5 V 3rd harmonic=0
  • 173.
  • 174.
    Bipolar PWM Multi-PhaseInverters • By increasing number of inverter legs, Multi-phase output can be generated (i.e. 1 leg per phase). • Following figure shows the five-phase inverter which is used to fed five-phase induction motor (multi-phase machine). Here we have 5 reference signals (v*ao ,v*bo ,v*co ,v*do ,v*eo with 3600/5=720 phase shift) and 1 carrier. 174 Vd o a b c d e v*ao pu =ma sin wt v*bo pu =ma sin (wt-720) v*co pu =ma sin (wt-1440) v*do pu =ma sin (wt+1440) v*eo pu =ma sin (wt+720) + - v*aO pu Carrier pu Ta+ Ta- + - v*cO pu Tc+ Tc- + - v*eO pu Te+ Te- + - v*bO pu Tb+ Tb- + - v*dO pu Td+ Td- Ta+ Tb+ Tc+ Td+ Te+ Ta- Tb- Tc- Td- Te-
  • 175.
    Space Vector Modulation(SVM) of Three-phase two-level Inverter 175
  • 176.
    SVM of Three-phasetwo-level Inverter • Any three phase set of variables that add up to zero in the stationary a-b-c frame can be represented in a complex plane by a complex vector that contains a real α and imaginary β component. • Space vector definition of three-phase voltages: vs = (2/3)[va ej0+ vb ej(2π/3)+ vc ej(4π/3)] • Space vector represents three phase quantities as a single rotating vector where the three phases are assumed as only one quantity. • For the balanced three-phase voltages, the space vector is continuously rotating with a speed of (2πf) rad/s, where f is the frequency. So If we create a rotating space vector via changing switching states of the inverter, three-phase output voltages will be generated successfully. 176
  • 177.
    177 T1 T3 T5=10 1 T1 T3 T5=1 0 0 T1 T3 T5=1 1 0 T1 T3 T5=0 1 0 T1 T3 T5=0 1 1 T1 T3 T5=0 0 1 Vd n a c b Z Z Z Van=vcn=vd/3 Vbn= -2vd/3 Vd n a c b Z Z Z Van=2vd/3 Vbn= Vcn = -vd/3 Vd n a c Z Z Z Van=vbn=vd/3 Vcn= -2vd/3 b n b Z Z Z Vbn=2vd/3 Van= Vcn = -vd/3 a c Vd n b c a Z Z Z Vbn=vcn=vd/3 Van= -2vd/3 n c a b Z Z Z Vcn=2vd/3 Van= Vbn = -vd/3 Vd Vd Vd + Vd/2 - o a b c T1 T4 T5 T2 T3 T6 n van + Vd/2 - Phase voltages during different switching states for T1 T3 T5 in three-phase two- level inverter
  • 178.
    SVM of Three-phasetwo-level Inverter 178 T1 T3 T5 van vbn vcn Vs Vector # 0 0 0 0 0 0 0 V0 1 0 0 +(2/3)Vd -(1/3)Vd -(1/3)Vd (2/3)Vd∠00 V1 0 1 0 -(1/3)Vd (2/3)Vd -(1/3)Vd (2/3)Vd∠1200 V3 1 1 0 (1/3)Vd (1/3)Vd -(2/3)Vd (2/3)Vd∠600 V2 0 0 1 -(1/3)Vd -(1/3)Vd (2/3)Vd (2/3)Vd∠-1200 V5 1 0 1 (1/3)Vd -(2/3)Vd (1/3)Vd (2/3)Vd∠-600 V6 0 1 1 -(2/3)Vd (1/3)Vd (1/3)Vd (2/3)Vd∠1800 V4 1 1 1 0 0 0 0 V7 Space vector during different existing switching states for T1 T3 T5 V1 (100) V2 (110) V3 (010) V4 (011) V5 (001) V6 (101) S1 S2 S3 S4 S5 S6 V0 (000) V7 (111) (2/3)Vd
  • 179.
    SVM of Three-phasetwo-level Inverter • The tip of the active state vectors, when joined together form a hexagon. The hexagon consists of six distinct sectors (S1 to S6) spinning over 360 degrees (one sinusoidal wave cycle corresponds to one rotation of the hexagon) with each sector of 60 degrees. • The vectors V1 to V6 are called active state vectors while V7 and V0 are called zero state vectors. The magnitude of each of the six active vectors is equal to (2/3)Vd. The zero state vectors are redundant vectors but they are used to minimize the switching frequency. 179
  • 180.
    SVM of Three-phasetwo-level Inverter • The active state vectors (V1 to V6) are stationary while the reference space vector Vref is rotating at speed of the fundamental frequency (ω). It circles once for one cycle i.e. it takes time=T (periodic time) to complete one cycle rotation. • For generating desired voltage waveforms (v* a,v* b,v* c), the space vector Vref should be created to move through the sectors with the change of wt via changing switching states of the inverter. 180
  • 181.
    SVM of Three-phasetwo-level Inverter • Each sampling time Ts, the instantaneous values of reference three-phase voltages are used to extract the reference space vector magnitude and position. The angle indicates which sector ,of the involved six sectors, contains the Vref. • The Vref vector is kept in its position for Ts before receiving the new sample values, i.e. The reference vector rotates with step angle of Δθ each Ts ,whereΔθ= 2π (Ts/T). As Δθ decreases, more smooth motion is achieved, i.e. better three- phase output is generated. • The reference space vector Vref can be achieved as a resultant of active state vectors in the estimated sector (with the help projections as shown in figure). • As shown in figure, Vref vector inS1 can be created by enabling V1 vector of a time t1 and V2 vector for a time t2 , and enabling suitable zero vector for a time t0, where t0=Ts-t1-t2. 181 V1 V2 Vref t1V1/Ts
  • 182.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#1: To create this vector the switching states to be changed as follows to minimize switching losses and harmonics. T1 T3 T5: 000 100110111110100000 (start right) It has to be noted that in each change, there is a single change in one switch. • 000 and 111 represent the zero vectors V0 and V7, so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0 • 100 represents V1 vector, so each 100 state lasts for 0.5t1 • 110 represents V2 vector, , so each 110 state lasts for 0.5t2 182 V1(100) V2(110) Vref t1V1/Ts 000 100 110 110 111 100 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t1/2 t1/2 t2/2 t2/2 Ts
  • 183.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#2: To create this vector the switching states to be changed as follows T1 T3 T5: 000 010110111110010000 (start left) • 000 and 111 represent the zero vectors V0 and V7, so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0. • 010 represents V3 vector, , so each 010 state lasts for 0.5t2 • 110 represents V2 vector, so each 110 state lasts for 0.5t1 183 000 010 110 110 111 010 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t2/2 t2/2 t1/2 t1/2 Ts
  • 184.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#3: To create this vector the switching states to be changed as follows T1 T3 T5: 000 010011111011010000 (start right) • 000 and 111 represent the zero vectors V0 and V7,so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0. • 010 represents V3 vector, , so each 010 state lasts for 0.5t1 • 011 represents V4 vector, so each 011 state lasts for 0.5t2 184 000 010 011 011 111 010 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t1/2 t1/2 t2/2 t2/2 Ts
  • 185.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#4: To create this vector the switching states to be changed as follows T1 T3 T5: 000 001011111011001000 (start left) • 000 and 111 represent the zero vectors V0 and V7,so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0. • 001 represents V5 vector, , so each 001 state lasts for 0.5t2 • 011 represents V4 vector, so each 011 state lasts for 0.5t1 185 V4(011) V5(001) 000 001 011 011 111 001 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t2/2 t2/2 t1/2 t1/2 Ts
  • 186.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#5: To create this vector the switching states to be changed as follows T1 T3 T5: 000 001101111101001000 (start right) • 000 and 111 represent the zero vectors V0 and V7,so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0. • 001 represents V5 vector, , so each 001 state lasts for 0.5t1 • 101 represents V6 vector, so each 101 state lasts for 0.5t2 186 V5(001) V6(101) 000 001 101 101 111 001 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t1/2 t1/2 t2/2 t2/2 Ts
  • 187.
    SVM of Three-phasetwo-level Inverter • If Vref in Sector#6: To create this vector the switching states to be changed as follows T1 T3 T5: 000 100101111101100000 (start left) • 000 and 111 represent the zero vectors V0 and V7,so 000 state lasts for 0.25t0 and 111 lasts for 0.5t0. • 100 represents V1 vector, , so each 100 state lasts for 0.5t2 • 101 represents V6 vector, so each 101 state lasts for 0.5t1 187 V6(101) V1(100) t2V1/Ts 000 100 101 101 111 100 000 T1T3T5 T1 T3 T5 t0/4 t0/4 t0/2 t2/2 t2/2 t1/2 t1/2 Ts
  • 188.
    SVM of Three-phasetwo-level Inverter • The hexagon is divided into triangles, where the sides of each triangle are equal • To ensure that Vref is inside the sectors, the radius of the shown tangential circle represents the largest value of the reference space vector which is Vd/ 3=0.578Vd= 1.15(0.5Vd), i.e. SVM provides higher DC voltage utilization compared to SPWM (15% higher). 188 V1 (100) V2 (110) V3 (010) V4 (011) V5 (001) V6 (101) S1 S2 S3 S4 S5 S6 V0 (000) V7 (111) (2/3)Vd Vref V2 ref=((2/3)Vd)2- ((1/3)Vd)2 =(1/3) V2 d
  • 189.
    SVM of Three-phasetwo-level Inverter • For 50 Hz and switching frequency of 10 kHz, the differential angle or step angle (Δθ) is the step with which the space vector will rotate with time each Ts • T=1/50  3600 (full circle), Δθ=?? • Δθ/(1/10kHz)= 3600/(1/50) Δθ= 1.80 • Vref vector is continuously rotating but in steps. • Each position of Vref lasts for Ts. In each position, (1)sector # is estimated , (2) times t1, t2, t0 are calculated based on the projections on the involved active vectors in the sector, (3) based on the sector number, gate pulses are generated for T1, T3 , T5 as illustrated before. 189 V1 V2 Vref
  • 190.
    Times calculations (t1,t2 ,t0) Starting from voltage balance equation (assume sector1) • VrefTs=V1t1+V2t2+V0t0 , Vref= Vref∠ , V1= (2/3)Vd∠00 , V2= (2/3)Vd∠600 • Real=Real Vref cos Ts=(2/3)Vd t1+(1/3)Vd t2 • Imaginary=Imaginary  Vref sin Ts=(1/ 3)Vd t2 Also t1+ t2 +t0=Ts By solving  t1= 3Ts (Vref/Vd) sin (600- ) and t2= 3Ts (Vref/Vd) sin for 00< <600 190 V1 V2 Vref θ Finally, t0=Ts- t1- t2
  • 191.
    Times calculations (t1,t2 ,t0) • For other sectors • ’= -600(k-1), where k is the sector number i.e. the times in any sector is given by; t1= 3Ts (Vref/Vd) sin (600- ′) and t2= 3Ts (Vref/Vd) sin ′ t0=Ts-t1-t2 Where Vref magnitude can be controlled from 0 to Vd/ 3. i.e. Vref= ma(Vd/ 3) where ma is the modulation index (01) 191
  • 192.
    FFT for SVMof three-phase inverter Notes: • For Vref<0.578Vd  harmonics order centered around mf ,2mf , 3mf ,…. 192 FFT of phase voltage n 1 mf Vp1 Low pass filter can be used to remove high order harmonic easily 2mf
  • 193.
    SVM of Three-phasetwo-level Inverter • Advantages: 1- low switching losses 2- increase DC voltage utilization by 15% 3- low harmonic content. 193
  • 194.
    Implementation SVM ofThree-phase two- level Inverter 194 Reference vector calc. v*an v*bn v*cn Vref 0 3600 Changes in steps each Ts Comparator Sector #, k 1 600 + - - ’ + Times calc. Vref Vd Ts ’ t1 t2 t0 Gate Pulses generator T1 T3 T5 Sector #, k
  • 195.
    Implementation SVM ofThree-phase two- level Inverter (Cont.) 195 t1 t2 t0 Gate Pulses generator ??????? T1 T3 T5 Sector #, k Ts carrier 0.5t0 0.5t0+t2 Ts 0.5t0+t1 0.5t0+t1+t2 0 Z1 X1 Y1 Y2 Sector # T1 T3 T5 S1 X1 Y1 Z1 S2 Y2 X1 Z1 S3 Z1 X1 Y1 S4 Z1 Y2 X1 S5 Y1 Z1 X1 S6 X1 Z1 Y2
  • 196.
    Simulation results ofthe implemented SVM Vd=200V,Vref=115V , Ts=1/10kHz, Z=10∠450Ω 196 Phase voltages, V Phase currents , A The resultant Vao, has a fundamental component of 115 V . (15% voltage enhancement) Fundamental +3rd
  • 197.
    Multilevel Inverters The mainpurpose of multilevel circuits is to generate AC voltage pattern that contains defined discrete steps to be more close to the sine-wave shape.
  • 198.
    Introduction • To obtainhigh-quality AC voltage or current with a two-level converter requires high switching frequencies. Such high frequencies cause significant switching losses. • Multilevel converters use an array of modules to build the required AC voltage level from a number of individual DC power supplies as shown. • The DC voltage sources are typically formed using capacitors and a charge- balancing scheme is used to maintain the capacitor voltages constant. • Input voltage in all types is Vdc and Per-phase peak voltage is 0.5Vdc. (½Vdc or −½Vdc) (½Vdc, −½Vdc or 0) (-0.25Vdc, -0.5Vdc , 0, 0.25Vdc, 0.5Vdc) Va0/Vdc Va0/Vdc Va0/Vdc Va0
  • 199.
    The features ofmultilevel converters • Low THD distortion and lower dv/dt compared to conventional two- level converters at the same effective switching frequency. • Reduced footprint because of reduced filtering requirements. • Blocking voltage of each module/switch is clamped to a cell capacitor voltage level. This also reduces switching losses. • Modularity and ability to scale converters to high voltage and power levels.
  • 200.
    Multilevel converter disadvantages •Control becomes complex with increased number of levels. • Multiple DC voltages are required, which are usually provided by capacitors. • Balancing the capacitor voltage is a challenge, because of the requirement for very fast simultaneous feedback control of large number of cells. • Conduction losses increase with an increase in the number of switches. • Typically two times (or more) switches are required compared with two-level converters.
  • 201.
    Multilevel Modulation techniques •High switching PWM : Multicarrier SPWM For N-level, (N-1) carriers are employed as shown (Level shifted modulation). The carriers are compared with the reference voltage, based on the level of reference voltage and its intersections with carrier waves, suitable output voltage state is selected. 0.5Vdc 0.25Vdc 0 -0.25Vdc -0.5Vdc va0 Ref. +1 -1 +0.5 -0.5 ma Five-level (N=5)
  • 202.
    Multilevel Modulation techniques •High switching PWM : Multicarrier SPWM (Number of carriers= number of levels-1) Example: Five-level 1/fc 1/fr Output voltage Modulated signal Carrier1 Carrier2 Carrier3 Carrier4 Reference voltage (ma=1) • Amplitude modulation index=ma= V* a0/0.5Vdc where 0<ma <1 • Fundamental output voltage peak = 0.5maVdc • Frequency modulation index= mf =fc/fr Ref.
  • 203.
    Multilevel Modulation techniques •Fundamental frequency modulation: Nearest level modulation (NLM) Example: Seven-level (output)
  • 204.
    The Classical multileveltopologies • Diode/Neutral Point Clamped Converter (NPC) • Flying Capacitor Converter (FC) • H-bridge Cascade Converter
  • 205.
    Diode/Neutral Point ClampedConverter • The DC bus voltage is split into three voltage levels by two series-connected capacitors, C1 and C2. The connection point between the two capacitors is defined as the zero voltage point (label 0). • The AC voltage Va0 has three states/levels: 0, ½VDC and −½VDC. 1. for voltage level ½VDC, switches Sa1 and Sa2 are turned on 2. for 0 voltage level, Sa2 and Sa3 are turned on 3. for a −½VDC level, Sa3 and Sa4 are turned on. • The components that distinguish this circuit from a conventional two-level converter are clamping diodes Da5 and Da6. the diodes clamp specific switch voltages to half the DC bus voltage in three- level topology. Single-phase, Three-level (N=3)
  • 206.
    Diode/Neutral Point ClampedConverter • Three-phase converter with 3 legs is shown, where each leg is controlled independently, where three phase references with 1200 phase shift are defined (reference for each leg) . For SPWM, The references are compared with multi-carriers (two carriers for N=3) to generate the gate pulses of the involved IGBTs. Three-phase, Three-level (N=3)
  • 207.
  • 208.
    Five-level NPC (N=5) Generallyfor N-level NPC converter, (N-1) storage capacitors are required, the voltage stress across each switching device is clamped to Vdc/(N-1) , (N-1) consecutive switching devices in each leg are turned on.
  • 209.
    Multilevel NPC difficulties •It requires high-speed clamping diodes that must be able to carry the full load current. • If the number of levels is more than three, the clamping diodes are subjected to different voltage stress. Therefore a series connection of diodes is required (complexity and cost). • Maintaining the charge balance of the DC capacitors with more than three levels needs careful attention.
  • 210.
    Flying Capacitor MultilevelConverter • Figure illustrates a three-level flying capacitor converter. All capacitors have the same voltage rating (Vdc/2). • The converter leg provides a three-level output voltage Va0 = {0, ½Vdc or −½Vdc}. 1. for voltage level ½Vdc, switches Sa1 and Sa2 are ON. 2. for a 0 level, switches (Sa1 and Sa3)or (Sa2 and Sa4) are ON. Capacitor Ca therefore introduces negative voltage in series with either C1 or C2. 3. for a −½Vdc level, switches Sa3 and Sa4 are ON. Single-phase, Three-level (N=3) + - + - + -
  • 211.
  • 212.
    Five-level Flying capacitorConverter • All capacitors have the same voltage rating (Vdc/4), the series connection of capacitors indicates that the voltage sharing between these capacitors should be equal. • Voltage rating of the involved switches is Vdc/4. + - + - + - + - + - + - + - + - + - + -
  • 213.
  • 214.
    Flying capacitor converterdisadvantages • an excessive number of storage capacitors are required when the number of AC levels is high; • inverter control is complicated, while the switching frequency and switching losses will be high. • high-level systems become difficult to package and are expensive.
  • 215.
    H-Bridge Cascaded Converter •The cascaded multilevel converters use series connection of single-phase H-bridge modules each with a separate DC source (capacitors) as shown for a five-level topology. • Each module is capable of producing an output voltage of +Vcell, 0 and −Vcell, by connecting the capacitors to the AC terminals by different combinations of the four switches, Sa1, Sa2, Sa3 and Sa4. • The resulting AC voltage swings from +2Vcell to −2Vcell with five- levels. The main advantages are: • It requires fewer components than the diode-clamped and capacitor-clamped circuits for the same number of levels. • The charge balance of the separate DC capacitors can be achieved. The major disadvantage is: • Each DC capacitor must be isolated+ no common DC bus. Single-phase, five-level (N=5)
  • 216.
  • 217.
  • 218.
  • 219.
    UPS Overview • AUPS system can be a helpful device for ensuring accurate power supply performance. • An Uninterruptible Power Supply, or UPS, is an electronic device that provides an alternative electric power supply to connected equipment when the primary power source is not available. • Unlike auxiliary power, a UPS can provide instant power to connected equipment, which can protect sensitive electronic devices by allowing them to shut down properly and preventing extensive physical damage. • However, a UPS can only supply energy for a limited amount of time.
  • 220.
    UPS Overview • AUPS for emergency systems and lighting may support the system for 90-120 minutes. For other applications like computer backup power, a UPS may typically support the system for 15-20 minutes. • If power is not restored during that time, the system will be shut down. • If a longer backup period is considered, a larger battery is required.
  • 221.
    Types of UPSSystems A typical UPS for computers has four basic protection roles: being able to cope with power surges, voltage shortage, complete power failure and wide variations in the electric current frequency. There are three types of UPS systems, depending on how the electric power is being stored and relayed to the electronic device connected to them: 1- Offline UPS (also known as Stand-by UPS) 2- Line-Interactive (or Continuous UPS) 3- Online UPS (often called double conversion supply)
  • 222.
    • The standbyUPS system works with the switch arrangement to select the AC input as a primary power source, and interchanging to the battery & inverter as backup sources in case of primary power gets disrupted. • The inverter normally relies on standby, only triggering when the power fails and the transfer switch routinely switches the load to the backup units. • This kind of UPS system offers a small size, high degree of efficiency, & low costs.
  • 223.
    OFFLINE UPS • Alsoreferred to as VFD Voltage and Frequency Dependent or Standby UPS. • It offers the most basic level of power protection. • During normal conditions, the load is fed from the AC input. Meanwhile the battery is charged from the AC input. • In normal operation, with mains supply present, both output voltage and frequency will track the input voltage and frequency respectively. the UPS output ,during grid availability, is supplied via a built-in filter which provides the load with protection from spikes and transients by clamping peak voltage to pre-defined levels.
  • 224.
    OFFLINE UPS • Duringabnormal conditions (when a problem is detected in the utility power), a relay connects the load to the inverter output and the power is provided from battery to the load through the DC/AC converter. Performing this action usually takes a few milliseconds (4-8ms transfer time), during which time the power inverter starts supplying electric energy from the battery to the load. • As the inverter is switched off when the UPS is operating normally, the term 'Offline' is given to any UPS of this design. The inverter output on Offline UPS is typically a square-wave.
  • 226.
    OFFLINE UPS • OfflineUPS are the most basic models and designed for use in small, non-critical applications that require protection against momentary loss of power. They are used to protect workstations, terminals, or equipment below 1 kVA. • Typical internal battery with Offline UPS lasts for just a few minutes. • It is not advised to use a VFD UPS to protect critical loads or sensitive electrical equipment. It is generally used for PCs.
  • 227.
    • It isthe most common UPS used for small business. • The designing of line interactive UPS is alike to a standby UPS, in addition the design Line Interactive generally includes an automatic voltage regulator (AVR) or a tap- changing transformer. • This enhances the regulation of voltage by regulating transformer taps as the input voltage differs. • The features of this UPS are small size, low cost, high efficiency can make the UPS in the range of 0.5-5kVA power
  • 228.
    Line Interactive UPSsystems • also referred to as VI - Voltage Independent - operate similarly to an Offline UPS, with the addition of a built-in Automatic Voltage Stabilizer (AVS). • The AVS ensures the output voltage remains within a pre-defined voltage window regardless of any voltage variations on the mains input supply. This enables Line Interactive UPS to provide protection against power sags, surges, and brownouts. A filter is used to protect the AVS and load from spikes and transients by clamping their peak voltages to more acceptable levels.
  • 229.
    Line Interactive UPSsystems • When the mains power supply fails or fluctuates outside of the pre-set window, the load is transferred via a relay (introducing a 4-8ms transfer time) to the inverter output. • Most Line Interactive UPS provides a sine-wave output. • Line Interactive UPS are typically used in some applications, such as PCs, telephone systems, non-critical networking equipment and small motor loads. • Typically a line-interactive UPS is only available up to 5kVA.
  • 230.
    The online UPSis also called as double conversion online UPS (most commonly used UPS). The primary power source is the inverter instead of the AC main. In this UPS design, loss of the input AC does not cause triggering of transfer switch, because the input AC is charging the battery source which delivers power to the output inverter (i.e., no transfer time).
  • 231.
    ONLINE UPS alsoreferred to as VFI – Voltage Frequency Independent or Double-Conversion • An Online UPS , combines the two basic technologies of the previously described UPS models, with rectifiers and inverter systems working all of the time. • As is the case with a Line- Interactive UPS, the power transfer is made instantly as an outage occurs, with the rectifier simply being turned off while the inverter draws power from the battery.
  • 232.
    ONLINE UPS alsoreferred to as VFI – Voltage Frequency Independent or Double-Conversion • As utility power is again established, the inverter continues to supply power to the connected devices, while the rectifier resumes its activity, recharging the battery. • This design is sometimes fitted with an additional transfer switch for bypass during a malfunction or overload.
  • 233.
    What Power ProblemsDo The Different UPS Topologies Protect Against?