This document presents a new DFT-based approach for detecting and correcting gain mismatch in time-interleaved ADCs. It introduces the gain mismatch problem in TI-ADCs and how it reduces the spurious free dynamic range. The proposed method uses the discrete Fourier transform to detect the gain mismatch between ADC sub-channels based on the difference between the ideal DFT and actual DFT. It then introduces a feedback system using this difference signal to iteratively correct the gain mismatch. Simulation results show the approach improves SFDR by more than 30dB by correcting a ±2% gain mismatch in a two-channel TI-ADC.

1. A New DFT based Approach for Gain Mismatch
Detection and Correction in Time-Interleaved ADCs
Yashar Hesamiafshar#1, Sanaz Momeni*2
#
School of Electrical and Computer Engineering, University of Tehran
College of Engineering (Campus No. 2), North Kargar Ave., Tehran, Iran
1
y.hesamiafshar@ece.ut.ac.ir
*
Microelectronics Research Lab
Urmia University
Abstract— This report introduces a new approach for detection
and correction of gain mismatch between ADC sub-channels in II. GAIN MISMATCH PROBLEM
time- interleaved ADCs. Based on discrete Fourier transform, Fig. 1 illustrates the architecture of a two-channel TI-ADC.
this technique uses a simple approach for gain mismatch
Ideally, both ADC sub-channels have identical gain i.e. α=0.
correction. MATLAB simulation results are represented for
correction of ±2% gain mismatch in a two-channel time-
In practice however there exists a finite gain mismatch
interleaved ADC where the proposed approach improves the between ADC sub-channels modeled by a non-zero value of α.
SFDR by more than 30dB. In order to maintain the resolution of the TI-ADC within the
resolution of each sub-channel ADC the mismatch issue must
I. INTRODUCTION be addressed. The scope of this paper is elimination of the
With increasing number of wideband signal sources the gain mismatch in a two-channel TI-ADC.
demand for high speed high resolution analog to digital
converters (ADCs) is soaring. Time-interleaved (TI) ADCs
have found to be the only solution for digitization of very high
bandwidth signals by surpassing the single ADC speed limit
[1]. However the efficacy of the TI-ADCs can easily be
compromised by the mismatch between the ADC sub-
channels. Mismatch in terms of offset, gain and timing
degrades the spurious free dynamic range (SFDR) and signal
to noise and distortion ratio (SNDR) of the whole ADC by
introducing mismatch induced harmonic distortion [2,3]. Fig. 1. Time Interleaved ADC Architecture
However the impairments incurred by mismatch in TI-ADCs
can be corrected by incorporating a calibration scheme [2-6]. Fig. 2 shows how the gain mismatch between two ADC sub-
In [2] the mismatch calibration is carried out by utilizing an channels reduces the SFDR of a 12b TI-ADC by drawing the
extra ADC or so called reference ADC with the subsequent SFDR versus different mismatch values. For example only 1%
least squares correction method. In [3] the mismatch problem of gain mismatch between ADC sub-channels reduces the
is tackled by incorporating an equalizer structure imposing SFDR of the TI-ADC to 45dB which is almost equivalent to
additional power consumption overhead by utilizing a resolution of an 8b ADC. Next section describes the proposed
complicated structure. In [4] linear and nonlinear mismatches approach for detection and correction of the gain mismatch in
are attenuated by use of specific signal sources for foreground a two-channel TI-ADC.
calibration which limits its application for special cases such
as automatic test equipments. This report addresses the gain
mismatch problem by proposing an efficient structure for gain
mismatch detection and correction. Uniqueness of this
approach is detection and correction of the gain mismatch in
an efficient way. The structure of this report is as following.
In section II the effect of gain mismatch on the SFDR of the
TI-ADC is discussed. Part III introduces the proposed method
for detection and correction of the gain mismatch. Section IV
suggests a more efficient implementation of the invented idea.
Finally, the MATLAB simulation results of the proposed
system are shown in section V.
Fig. 2. Effect of gain mismatch between ADC sub-channels on SFDR
978-1-4244-8971-8/10$26.00 c 2010 IEEE

2. III. PROPOSED DFT BASED CONCEPT FOR GAIN MISMATCH The second term in (6) is due to the gain mismatch being
CORRECTION proportional with mismatch value of α. This term is the basis
for the proposed gain error detection mechanism. The
Discrete Fourier transform (DFT) of a periodic difference between the ideal DFT and the gain mismatched
sequence, X ( e j 2π nk / N ) , is defined by the following equation: DFT is define by D1 as following (7):
N −1
X k = ∑ x [ n] e
− j 2π kn / N
(1)
D1 = Y2 e( ) − Y ( e ) = α sin π [t ]
jπ
1
jπ
T
0 (7)
n =0 Note that the sign of D1 is uncertain due to random nature of
Where the x[n] denotes the periodic sequence with period t0 . In order to determine the sign of the gain mismatch value
N. The DFT of the output sequence of TI-ADC will be the the difference D1 is further evolved to obtain D2, defined as
integral part of the proposed approach for gain mismatch following (8):
detection. For simplicity of implementation the DFT of TI- π
ADC output is carried out at Nyquist frequency where the D2 = α sin [t0 ] (8)
T
angular frequency is equivalent to π , by assuming k=1, and
The term D2 is the very signal for detecting the sign and
the resulting sequence period is N=2. In this case (1) is
magnitude of the gain mismatch. This difference when applied
reduced to (2) by:
2 −1 2−1
to an accumulator within a closed loop as shown in Fig. 3 will
X 1 = ∑ x [ n] e = ∑ x [ n](−1)n
− jπ n
(2) result in complete removal of gain mismatch due to infinite
n=0 n=0 loop gain of the proposed feedback system.
Where the only calculation required is addition and
subtraction operations with no need for multiplication. The
output sequence of the TI-ADC is defined by y[n]. For
further simplification of the system implementation, DFT of
samples of a sinusoid located at Nyquist frequency is utilized
as the basis for gain mismatch detection resulting in a
sequence with period of two. In ideal case when no mismatch
incurs between ADC sub-channels the proposed output
sequence is defined by y1 [n] as:
⎧ π π
⎪ sin T [t0 + nT ] = sin T [t0 ] n = even
⎪
y1[n] = ⎨ (3)
⎪sin π [t + nT ] = − sin π [t ] n = odd Fig. 3. Proposed system for gain mismatches detection and correction
⎪ T 0
⎩ T
0
IV. SIMPLE IMPLEMENTATION BY DECIMATION
Where T denotes the sampling period and t0 is the initial
time of the waveform. The DFT of the y1 [n] is defined as: As discussed in section II, the gain mismatch detection
2 −1
π mechanism relies on the DFT of a sinusoid located at the
( )
Y1 e = ∑ sin [t0 + nT ] e
jπ
T
− jπ n
= Nyquist frequency. This structure can efficiently be
n =0
implemented by virtue of decimation. Note that K times
⎛ π π ⎞ π decimation of a sinusoid located at frequency Fs/2K will alias
⎜ sin [t0 ] − sin [t0 + T ] ⎟ = 2sin [t0 ] (4)
⎝ T T ⎠ T it to the Nyquist frequency. This fact is utilized for modifying
Note that the proposed DFT value is equivalent to the the system of Fig. 3 into Fig. 4. The new system receives the
channel output with even index of samples (3). In practice ADC output samples at K times lower rate resulting in lower
however, gain mismatch between ADC sub-channels, defined clock frequency for the proposed systems with K times lower
by α, deviates the TI-ADC output sequence from samples of a power consumption as a consequence. Note that with
pure sinusoid (5): increasing the value of K the settling time of the coefficient
⎧ π π correction is also increasing which is quite negligible.
⎪ sin [ t0 + nT ] = sin [t0 ] n = even
⎪ T T
y2 [n] = ⎨ (5)
⎪(1 + α ) sin π [t + nT ] = − (1 + α ) sin π [t ] n = odd
⎪
⎩ T
0
T
0
where outputs of ADC sub-channels are distinguished by
even and odd sequences. DFT for y2 [n] is obtained as
following:
2 −1
⎛ π π ⎞
( )
Y2 e = ∑ y2 [ n ] e
jπ
n =0
− jπ n
= ⎜ sin [ t0 ] − (1 + α ) sin [ t0 + T ] ⎟
⎝ T T ⎠
π π
= 2 sin [t0 ] + α sin [t0 ] (6)
Fig. 4. Efficient Implementation of proposed calibration scheme
T T

3. 40 40
20
Fs /10 tone
20 Fs /10 tone used
40dB for gain
0 used for gain 0
mismatch 72dB
Power Spectral Density
Power Spectral Density
mismatch
-20
detection
-20 detection
-40 -40
Distortion Component Distortion Component
-60 -60
-80 -80
-100 -100
-120 -120
-140 -140
0 5 10 15 20 25 30 35 40 45 50 20
0 5 10 15 25 30 35 40 45 50
Frequency (kHz) Frequency (kHz)
(a) (b)
Fig. 5. Spectral response of the TI-ADC: (a) before and (b) after gain mismatch correction, gain mismatch=-2% and +2%
V. MATLAB SIMULATION RESULTS gain error in the next ADC sub-channel. Fig. 7 shows the
settling behaviour of the correction coefficient for gain
This section introduces the simulation results of the
mismatch of ±2% respectively. The small fluctuation of the
proposed system modeled in SIMULINK. The TI-ADC
coefficient is tolerable within the accuracy of the ADC
sub-channels are substituted by 12b quantizer blocks in
provided that the output of the accumulator is attenuated
MATLAB. The simulation is carried out for two cases
enough through 1/2N block which is nothing more than a shift
of ±2% gain mismatches respectively.
operation.
The sampling frequency of the TI-ADC is assumed to be 100
kHz for simplification of MATLAB simulation. Nevertheless 40
the simulation results can be generalized to any sampling
20
frequency. Moreover a decimation factor of 5 is selected FS /10 tone
used for 40 dB
0 general input
throughout the simulations with no loss of generality.
Power Spectral Density
-20
gain frequency
mismatch
-40
detection
Distortion Components
A. Foreground and Background Calibration -60
The proposed system can be operated in both foreground -80
and background calibration modes. The system level -100
simulations are carried out for both of these scenarios. In -120
foreground calibration mode it is assumed that a calibration -140
tone located at Fs/10 frequency, which will be aliased into -160
0 5 10 15 20 25 30 35 40 45 50
Nyquist frequency after 5 times decimation, is applied to the
TI-ADC. Fig. 5 shows the spectral response of the TI-ADC Frequency (kHz)
(a)
output with and without the proposed gain mismatch
calibration. It is notable that the invented approach suppresses
mismatch induced harmonic component by 32dB.
Furthermore the gain mismatch correction system is examined
Power Spectral Density
in background mode as well. At this case it is assumed that the
input to the TI-ADC includes two frequency components one
of which located at Fs/10. This input pattern is likely to
happen during normal operation of the ADC. Fig. 6 illustrates
the spectral response of the TI-ADC with and without gain
mismatch correction. In all cases it is observed that after
settlement of the correction coefficient the gain of both ADC
paths are equalized within the accuracy of the whole ADC
which is assumed as a 12b ADC here.
(b)
B. Settling Behaviour of the Correction Coefficient Fig. 6. Spectral response of the TI-ADC for two tone input : (a) before and (b)
after gain mismatch correction, gain mismatch=-2% and +2%
The proposed approach for gain mismatch correction
utilizes closed loop architecture. The correction coefficient, as
depicted by Fig. 7, evolves until it approaches the amount of

4. 0.005
0
Correction Coefficient
Correction Coefficient
-0.005
-0.0203
-0.01
-0.0204
-0.015 -0.0205
-0.02
-0.025
0 20 40 60 80 100 120
Time (secs)
(a) (b)
Fig. 7. Settling behaviour of the correction coefficient in the proposed system, (a) gain mismatch= +2%, (b) gain mismatch= -2%
CONCLUSION
An efficient architecture is proposed for gain mismatch frequency. The MSB of the ramp signal is taken as its
detection and correction in TI-ADCs. The uniqueness of sign bit assuming a signed representation.
the proposed approach is the low power consumption as
well as simplicity of the implementation. This approach
is verified by modeling of the gain mismatch correction REFERENCES
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