0.35um cmos
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This document provides the transistor parameters for a 0.35 μm TSMC CMOS process for both NMOS and PMOS devices. Key parameters include threshold voltage, oxide thickness, mobility, doping concentration, and capacitances. The models define the electrical behavior for circuit simulation.
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0.35um cmos
- 1. *0.35 μm TSMC CMOS transistorparameters: *NMOS Model: .MODEL NMOSNMOS ( LEVEL = 3 + TOX= 7.9E-9 NSUB = 1E17 GAMMA = 0.5827871 + PHI= 0.7 VTO= 0.5445549 DELTA = 0 + UO = 436.256147 ETA = 0 THETA = 0.1749684 + KP= 2.055786E-4 VMAX= 8.309444E4 +KAPPA = 0.2574081 RSH = 0.0559398 NFS= 1E12 TPG = 1 + XJ= 3E-7 LD = 3.162278E-11 WD = 7.046724E-8 + CGDO = 2.82E-10 CGSO = 2.82E-10 CGBO = 1E-10 + CJ= 1E-3 PB = 0.9758533 MJ = 0.3448504 + CJSW= 3.777852E-10 MJSW = 0.3508721 ) *PMOS Model: .MODEL PMOS PMOS( LEVEL = 3 + TOX= 7.9E-9 NSUB = 1E17 GAMMA = 0.4083894 + PHI= 0.7 VTO= -0.7140674 DELTA = 0 + UO = 212.2319801 ETA = 9.999762E-4 +THETA = 0.2020774 KP= 6.733755E-5 +VMAX = 1.181551E5 KAPPA = 1.5 RSH = 30.0712458 +NFS = 1E12 TPG = -1 XJ = 2E-7 LD = 5.000001E-13 +WD = 1.249872E-7 CGDO = 3.09E-10 CGSO = 3.09E-10 +CGBO = 1E-10 CJ=1.419508E-3 PB=0.8152753 MJ=0.5 + CJSW = 4.813504E-10 MJSW = 0.5 )