Computer Architecture & Organization
Books:
• David A. Patterson, John L. Hennessy,
"Computer Architecture: A Quantitative
Approach", 3rd Edition, Morgan
Kaufmann.
• 2. William Stallings, “ Computer
Architecture & Organization: Designing for
Performance”, 9th Edition, Pearson
COURSE LEARNING OUTCOME (CLO):
After completion of the course the student will be/will have:
• CLO1. Able to understand the basics of computer
hardware and how computer interacts with computer
hardware
• CLO2. Able to demonstrate how computers represents
and manipulate data and basics of ISA Instruction Set
Architecture – MIPS.
• CLO3. Ability to determine a simple computer with
hardware design including data format, instruction format,
instruction set, addressing modes, bus structure,
input/output, memory, Arithmetic/Logic unit, control unit,
and data, instruction and address flow.
Marks Distribution
• 50 Marks Sessionals
—20 Marks Assignments( 04 Assignments)
—30 Marks Class Presentation(02 Presentations)
• 50 Marks Paper(Open Book Exam)
Chapter 1
Introduction
Architecture & Organization 1
• Architecture is those attributes visible to
the programmer
—Instruction set, number of bits used for data
representation, I/O mechanisms, addressing
techniques.
—e.g. Is there a multiply instruction?
• Organization is how features are
implemented
—Control signals, interfaces, memory
technology.
—e.g. Is there a hardware multiply unit or is it
done by repeated addition?
Architecture & Organization 2
• All Intel x86 family share the same basic
architecture
• The IBM System/370 family share the
same basic architecture
• This gives code compatibility
—At least backwards
• Organization differs between different
versions
Structure & Function
• Structure is the way in which components
relate to each other
• Function is the operation of individual
components as part of the structure
Function
• All computer functions are:
—Data processing
—Data storage
—Data movement
—Control
Functional View
Operations (a) Data movement
Operations (b) Storage
Operation (c) Processing from/to storage
Operation (d)
Processing from storage to I/O
Structure - Top Level
Computer
Main
Memory
Input
Output
Systems
Interconnection
Peripherals
Communication
lines
Central
Processing
Unit
Computer
Structure - The CPU
Computer Arithmetic
and
Login Unit
Control
Unit
Internal CPU
Interconnection
Registers
CPU
I/O
Memory
System
Bus
CPU
Structure - The Control Unit
CPU
Control
Memory
Control Unit
Registers and
Decoders
Sequencing
Login
Control
Unit
ALU
Registers
Internal
Bus
Control Unit
Outline of the Book (1)
• Computer Evolution and Performance
• Computer Interconnection Structures
• Internal Memory
• External Memory
• Input/Output
• Operating Systems Support
• Computer Arithmetic
• Instruction Sets
Outline of the Book (2)
• CPU Structure and Function
• Reduced Instruction Set Computers
• Superscalar Processors
• Control Unit Operation
• Microprogrammed Control
• Multiprocessors and Vector Processing
• Digital Logic (Appendix)
Internet Resources
- Web site for book
• http://WilliamStallings.com/COA/COA7e.html
—links to sites of interest
—links to sites for courses that use the book
—errata list for book
—information on other books by W. Stallings
• http://WilliamStallings.com/StudentSupport.html
—Math
—How-to
—Research resources
—Misc
Internet Resources
- Web sites to look for
• WWW Computer Architecture Home Page
• CPU Info Center
• Processor Emporium
• ACM Special Interest Group on Computer
Architecture
• IEEE Technical Committee on Computer
Architecture
• Intel Technology Journal
• Manufacturer’s sites
—Intel, IBM, etc.
Internet Resources
- Usenet News Groups
• comp.arch
• comp.arch.arithmetic
• comp.arch.storage
• comp.parallel

01_Introduction.ppt

  • 1.
    Computer Architecture &Organization Books: • David A. Patterson, John L. Hennessy, "Computer Architecture: A Quantitative Approach", 3rd Edition, Morgan Kaufmann. • 2. William Stallings, “ Computer Architecture & Organization: Designing for Performance”, 9th Edition, Pearson
  • 2.
    COURSE LEARNING OUTCOME(CLO): After completion of the course the student will be/will have: • CLO1. Able to understand the basics of computer hardware and how computer interacts with computer hardware • CLO2. Able to demonstrate how computers represents and manipulate data and basics of ISA Instruction Set Architecture – MIPS. • CLO3. Ability to determine a simple computer with hardware design including data format, instruction format, instruction set, addressing modes, bus structure, input/output, memory, Arithmetic/Logic unit, control unit, and data, instruction and address flow.
  • 3.
    Marks Distribution • 50Marks Sessionals —20 Marks Assignments( 04 Assignments) —30 Marks Class Presentation(02 Presentations) • 50 Marks Paper(Open Book Exam)
  • 4.
  • 5.
    Architecture & Organization1 • Architecture is those attributes visible to the programmer —Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques. —e.g. Is there a multiply instruction? • Organization is how features are implemented —Control signals, interfaces, memory technology. —e.g. Is there a hardware multiply unit or is it done by repeated addition?
  • 6.
    Architecture & Organization2 • All Intel x86 family share the same basic architecture • The IBM System/370 family share the same basic architecture • This gives code compatibility —At least backwards • Organization differs between different versions
  • 7.
    Structure & Function •Structure is the way in which components relate to each other • Function is the operation of individual components as part of the structure
  • 8.
    Function • All computerfunctions are: —Data processing —Data storage —Data movement —Control
  • 9.
  • 10.
  • 11.
  • 12.
    Operation (c) Processingfrom/to storage
  • 13.
  • 14.
    Structure - TopLevel Computer Main Memory Input Output Systems Interconnection Peripherals Communication lines Central Processing Unit Computer
  • 15.
    Structure - TheCPU Computer Arithmetic and Login Unit Control Unit Internal CPU Interconnection Registers CPU I/O Memory System Bus CPU
  • 16.
    Structure - TheControl Unit CPU Control Memory Control Unit Registers and Decoders Sequencing Login Control Unit ALU Registers Internal Bus Control Unit
  • 17.
    Outline of theBook (1) • Computer Evolution and Performance • Computer Interconnection Structures • Internal Memory • External Memory • Input/Output • Operating Systems Support • Computer Arithmetic • Instruction Sets
  • 18.
    Outline of theBook (2) • CPU Structure and Function • Reduced Instruction Set Computers • Superscalar Processors • Control Unit Operation • Microprogrammed Control • Multiprocessors and Vector Processing • Digital Logic (Appendix)
  • 19.
    Internet Resources - Website for book • http://WilliamStallings.com/COA/COA7e.html —links to sites of interest —links to sites for courses that use the book —errata list for book —information on other books by W. Stallings • http://WilliamStallings.com/StudentSupport.html —Math —How-to —Research resources —Misc
  • 20.
    Internet Resources - Websites to look for • WWW Computer Architecture Home Page • CPU Info Center • Processor Emporium • ACM Special Interest Group on Computer Architecture • IEEE Technical Committee on Computer Architecture • Intel Technology Journal • Manufacturer’s sites —Intel, IBM, etc.
  • 21.
    Internet Resources - UsenetNews Groups • comp.arch • comp.arch.arithmetic • comp.arch.storage • comp.parallel