1. CURRICULUM VITAE
· NIDHIN JOE KUTTIKKAT
Address : Blk No:- J, # 101, Ajmera Infinity Apartments, Electronic City
Bangalore-560100
Mobile No. +91-8861553721
E-mail : nidhin.joe@gmail.com
· Career Objective
To discover through continuing persistence my potential in hardware industry, and to
harness this potential in aiding my Team to scale greater heights.
· Reason to change
Reason to change: Contract is over in Nov 14th ,2014
Experience : 2 years in Teaching & 3.8 years in industry.
Current CTC: On request
Notice period: 2 Months
· Work Experience
Professional Summary:
Company: Tessolve Semiconductors Pvt. Ltd, Bangalore.
Designation: Sr. Test Engineer.
Period of Employment: April 2011 to till date
11 3.8 Years of Experience in Post Silicon validation on Bench as silicon validation Engineer
and System level test engineer.
11 Extensively worked on characterization of Buck-Boost DC-DC Converters, ADC (SAR &
Pipe-line ADCs), GPS @ Bench Level & Field Trial activities.
11 Proficient in developing Lab Automation Sequence using LabVIEW-2011on Bench Setup
11 Automation Tools/software worked: TESTSTAND by NI and SPOTFIRE DXP (Data
Analysis Tool).
11 Programming knowledge – C ‘Basics. NI LABVIEW
Roles & Responsibilities
1. Feasibility Analysis: Understood IP requirements and analyzed the feasibility of validation
parameters as per the specifications.
2. Test / Validation Plan: Developed test / validation plan for AC & DC parameters to be
validated with the given specification limits and simulated values from IP design
3. Measurement & Automation: Prepared testchip interface documents for the GUI
automation and developed macros, test sequences, simple VI’s using Test stand / Lab view
for bench automation.
4. Coordinate different team: As SLT engineer closely work with ATE, VI and SW teams
for various SATs test to reduce DPM and maintain proper report for the analysis.
Hands on experience on equipments such as:
2. 1. Signal Generators (SMA / SML03).
2. Digital phosphorus Oscilloscope (2GHz).
3. Source meters (kiethely 2420)
4. Spectrum analyzer(RSA3308A)
5. Pattern/Arbitrary waveform generatorAgilent-33250A
11 Temptronics Thermo-stream
Projects worked on
Project #1:
Title : System level testing of various Android and windows chips.
Description: Worked on various Android chips like Bagheera (MSM8916), Shere (MSM8939),
Dino (MSM8610), Frodo (MSM8266), Gimli (MSM8926) and Aragorn Pro/Rev 2.2
(MSM8974)
Client : Qualcomm PTE Ltd, Singapore
Role : System Level Testing (SLT) Engineer.
· Make the set up for the Boot-Up test with latest build load on various SATs Reject.
· SATs reject boot up fails will give to ATE retest.
· Make the debug arrangements for VI test for the ATE retest pass devices using
JTAG.
· Collect serial log or Crash dump for Software debug.
· Closely work with ATE, VI and SW teams for various SATs test to reduce DPM
and maintain proper report for the analysis.
Project #2:
Title : Bolero (ASL4500) Booster Converter Device
Description: 6-Channel 12V to 80V / 120W DC – DC Converter. Used in conjunction
with Laguna (ASL3415) – a Buck Converter
Client : NXP, Bangalore, India
Role : Functional Verification Engineer.
· Device Bring up, Functional Verification and Debug after Si arrival
· Generating Test Validation plan
· Developing the test procedure and Automation. Carried out Electrical
measurements on PWM, Current Sense Resistance measurements, ON-OFF Timing
measurements, Leakage test, Oscillator trim test, Slope comp test & Testing of
Open & Closed Loop modes of operation
· Data analysis across PVT (Process ,Voltage, Temperature)
Project #3:
Title : Laguna (ASL3415) Buck Converter Device
Description : 6-Channel 80V to 3V / 120W DC – DC Converter. Used in conjunction
with Bolero (ASL3415) – a Boost Converter
Client : NXP, Bangalore, India
Role : Functional Verification Engineer.
· Device Bring up, Functional Verification and Debug after Si arrival
· Generating Test Validation plan
· Developing the test procedure and Automation.
· Carried out Electrical measurements on PWM, Current Sense Resistance
measurements, ON-OFF Timing measurements, Gate Driver Test, Vgg Test, Osc
3. Trim test. Testing of Open & Closed Loop modes of operation
· Data analysis across PVT (Process ,Voltage, Temperature)
Project #4:
Title : Photon (ASL10xx) Buck-Boost Converter Device
Description : Single Channel 3V LED Driver / 30W Buck-Boost Converter. Stand-alone
device meant for Automotive Application
Client : NXP, Bangalore, India
Role : Functional Verification Engineer.
· Device Bring up, Functional Verification and Debug after Si arrival
· Generating Test Validation plan
· Developing the test procedure and Automation.
· Carried out Electrical measurements on PWM, Current Sense Resistance
measurements, ON-OFF Timing measurements,Loop regulation, Short Circuit
protection test,Thermal regulation & Thermal shutdown test,UV-OV Test, Testing
of Open & Closed Loop modes of operation
· Data analysis across PVT (Process ,Voltage, Temperature)
Project #5:
Title : 18xx Wireless Controller Test Chip
Description : Test Chip that carried WLAN, BT, NFC, GPS, FM.
Client : TI, Bangalore, India
Role : Bench Characterization Engineer
· Device Bring up, Functional Verification and Debug after Si arrival
· Worked on ADCs meant for BT, NFC, GPS (which are Pipe-lines) & WLAN-ADC
(SAR ADC)
· Generating Test Validation plan
· Developing the test procedure and Automation.
· Carried out Electrical measurements on Static and Dynamic Parameters, Stand-alone
mode and Full-chain mode
· Data analysis across PVT (Process ,Voltage, Temperature)
Project #6:
Title : 31xx Wireless Controller Test Chip
Description : Test Chip that carried WLAN, BT, NFC, GPS, FM.
Client : TI, Bangalore, India
Role : Bench Characterization Engineer
· Device Bring up, Functional Verification and Debug after Si arrival
· Worked on ADCs meant for BT, NFC, GPS (which are Pipe-lines) & WLAN-ADC
(SAR ADC)
· Generating Test Validation plan
· Developing the test procedure and Automation.
· Carried out Electrical measurements on Static and Dynamic Parameters, Stand-alone
mode and Full-chain mode
· Data analysis across PVT (Process ,Voltage, Temperature)
Project #7:
Title : SD interface
Description : SD card interface into MSP430F5529 using SPI communication..
4. Client : TI, Bangalore, India
Role : Bench Characterization Engineer
· MSP430 microcontroller wake up
· Interface with SD/microSD card using SPI Communication
· Code development using Code Composer Studio.
Project #8:
Title : GPS system validation
Description : Recreate the practical environment using GPS playback system
Client : TI, Bangalore, India
Role : Bench Characterization Engineer
· GPS board Bring up, Functional Verification and Debug after Si arrival
· Board debug on GPS receiver and GLONASS
· Field Trial set up creation
· Field path regeneration on google map.
College: Jyothi Engineering College,Cheruthuruthy.
Designation: Asst. Professor.
Period of Employment: June2009 to Mar2011.
· After completing M.E., I worked as a Asst. Professor in Jyothi Engineering
College, Cheruthuruthy, Thrissur, Kerala around 2 years.
· Skill Set
Software Languages : C, VBT
Hardware Language : 8085 Assembly Language, VHDL, Verilog.
Operating System : WINDOWS 9X/XP.
EDA Tools : LAB VIEW 2011,Win Spice, Xilinx ISE,ORCAD,PERL,
T-Spice., Code Composer Studio, HCI Tester, ACMB
GUI
· Achievements
11 Participate in State level science exhibition on chemistry project
11 Winner of scholarships like PCM, national Talent Search Examination.
11 Lead the team to victory in many inter-school tournaments.
11 Got Best paper Award for M.E. project in National Conference on Computing, Control
and Communication Systems on 5th and 6th March 2009 ,conducted at Hindustan
College of Engineering & Technology, Coimbatore
· Synopsis of M.E. Project Work
Title: An Efficient VLSI Architecture for Adaptive FIR Filter
Using Modified Bit- Oriented Structures
5. Description: Our project is focused on the design of an efficient VLSI architecture for adaptive FIR
filter which aims at reducing the power consumption and also to increase the computational speed.
In the proposed method, modified bit- oriented architecture is used instead of variable FIR filter and
it will give the adaptive coefficients. The proposed method of modified bit-oriented architecture
utilizes new word level operand, namely six-to-double compressor, which can merge operands
efficiently without long carry propagation. Due to the lesser carry propagation, the proposed
method can achieve low power consumption and higher computational speed. The circuit is
simulated in T-Spice in 0.25μm technology. Power estimation can be obtained through transistor
level design simulation.
B.Tech Main Project Work
Title: Remote Access of DSO DL1720E using LabVIEW 7.1 Software
Description:
The project is based on the new innovative software in Electronics and Electrical industry,
LABVIEW released by the National Instruments. Using this graphical user interface software
we developed Burn Rate Evaluator of a solid rocket propellant.
· Paper(s) Presented
1. Presented paper based on “Reactive Routing Protocols for Mobile Ad-hoc Network” at
Sahrdaya College of Engineering & Technology, Thrissur.
2. Presented paper based on “An Efficient VLSI Architecture for Adaptive FIR Filter
Using Modified Bit- Oriented Structures” at Hindustan College of Engineering &
Technology, Coimbatore and got best paper award .
· Education Qualifications
· B Tech in Electronics & Communication Engineering from College of
Engineering, Chengannur, Kerala with First division 67.75 % (2003-2007)
· ME in VLSI Design from Kongu Engineering College, Erode, Tamilnadu (Anna
University, Chennai) with CGPA 8.37 (2007-2009)
· Training Program Attended
· Virtual Instrumentation using LabVIEW organized by College of Engineering,
Chengannur, Kerala
· Semiconductor Testing In Automatic Test Equipment from “Tessolve
Training and Development Institute”, Chennai during Aug 12 to Oct 12, 2009.
· Personal Strengths
Hardworking, Adaptable, honest, Optimistic, Leadership and Management Skills
· Hobbies
Playing Guitar, Drawing, Listening to music.
6. · Personal Profile
Name : Nidhin Joe Kuttikkat
Sex : Male
Date of Birth : 28-4-1985
Marital Status : Married
Citizenship : Indian
Languages Known : English, Hindi, Tamil, and Malayalam
Place: Bangalore (NIDHIN JOE KUTTIKKAT)
7. · Personal Profile
Name : Nidhin Joe Kuttikkat
Sex : Male
Date of Birth : 28-4-1985
Marital Status : Married
Citizenship : Indian
Languages Known : English, Hindi, Tamil, and Malayalam
Place: Bangalore (NIDHIN JOE KUTTIKKAT)