DMA controller Presentation

2. Group Members:
• Maryam Khalid (BCS18-002)
• Mahnoor Malik (BCS18-004)
• Abeera Mughal (BCS18-029)
• Aima Mohsin (BCS18-039)
• Linta Nasir (BCS18-038)
• Nimra Amjad (BCS18-033)

3. TOPICS:
• DMA(Direst Memory Access)
• Working Of DMA
• OS using DMA hardware
• Explanation of polling
• Explanation of interrupts
• Comparison of polling and interrupts

4. What is DMA?
Direct memory access (DMA) is a feature of most computers that
allows certain hardware submodules to access system the
memory for reading and writing. The interaction between the
subsystems and the memory is carried out independently of the
CPU. Some systems that use DMA include disk drive controllers,
graphics cards, network cards, sound cards, etc.

5. 2 cycles
CPU
Memory
I/O
devices

6. 1 cycle
CPU
Memory
I/O
devices

7. Why there is a need of DMA?
• Slow data transmission may easily cause a bottleneck on
program execution
• I/O devices cannot get synchronize with CPU.

8. Advantages and Disadvantages
Advantages of DMA include:
• high transfer rates
• fewer CPU cycles for each transfer
Some disadvantages include:
• DMA transfer requires a DMA controller to carry out
the operation, hence more expensive system,
• synchronization mechanisms must be provided in order
to avoid accessing non-updated information from RAM.

9. DMA CONTROLLER
• Direct Memory Access needs a special
hardware called DMA controller (DMAC) that
manages the data transfers.
• The Direct Memory Access (DMA) controller
enables the movement of blocks of data from
peripheral to memory, memory to peripheral,
or memory to memory without burdening the
processor.

10. How DMA Controller Operations are Performed?
• Following is the sequence of operations performed by a DMA −
• Initially, when any device has to send data between the device
and the memory, the device has to send DMA request (DRQ)
to DMA controller.
• The DMA controller sends Hold request (HRQ) to the CPU and
waits for the CPU for acknowledgement signal the HLDA.
• The CPU leaves the control over bus and acknowledges the
HOLD request through HLDA signal.
• Now the CPU is in HOLD state and the DMA controller has to
manage the operations over buses between the CPU,
memory, and I/O devices.

13. DMA Controller Transfer Mode
• The DMA transfers the data in three modes which include
the following.
• a) Burst Mode: In this mode DMA handover the buses to
CPU only after completion of whole data transfer.
• b) Cycle Stealing Mode: In this mode, DMA gives control
of buses to CPU after transfer of every byte.
• c) Transparent Mode: Here, DMA transfers data only when
CPU is executing the instruction which does not require the
use of buses.

14. Features
• It has four channels which can be used over four I/O devices.
• Each channel has 16-bit address and 14-bit counter.
• Each channel can transfer data up to 64kb.
• Each channel can be programmed independently.
• Each channel can perform read transfer, write transfer and
verify transfer operations

15. • THE OPERATING SYSTEM
USES DMA HARDWARE AS
FOLLOW:

16. • Step1:
Device driver is instructed to transfer
disk data to a buffer address X

17. • Step 2:
Device driver then instruct disk
controller to transfer data to buffer

18. • Step 3:
Disk controller then starts DMA transfer.

19. • Step 4:
Disk Controller then sends each byte to
DMA controller.

20. • Step 5:
DMA controller transfers bytes to buffer,
increases the memory
address,decreases the counter C until
C becomes zero.

22. Polling:
The process of periodically checking status of
the device to see if it is time for the next I/O
operation, is called polling.
Polling is the simplest way for an I/O device to
communicate with the processor
The I/O device simply puts the information in a
Status register, and the processor must come
and get the information
Most of the time, devices will not require
attention and when one does it will have to
wait until it is next interrogated by the polling
program.

23. Example:
Compare this method to a teacher
continually asking every student in a class,
one after another, if they need help.
Obviously the more efficient method would
be for a student to inform the teacher
whenever they require assistance.

24. Diagram:
DEVICE
A
DEVICE
B
DEVICE C
CPU
First
second
third

25. Advantages & Disadvantages of Polling:
• Advantages:
Simple program
Transmission reliability
No need for additional chips
• Disadvantages:
In efficient method as much of the processor
time wasted in unnecessary polls

26. Interrupt
An interrupt means to break the sequence of
operations
It is a hardware signal from a device to a CPU. It tells the CPU
that the device needs attention and that the CPU should stop
performing what it is doing and respond to the device. If a CPU
is available (it is not performing a task with higher priority), it
suspends the current thread and eventually invokes the interrupt
handler for that device. The job of the interrupt handler is to
service the device and stop it from interrupting.
Once the handler returns, the CPU resumes what it was doing
before the interrupt occurred.

27. Types
There are two types of interrupts:
1:Hardware Interupts
2:Software Interupts
Basic Operations of Interrupt
• CPU issues read command.
• I/O module gets data from peripheral
whilst CPU does other work.
• I/O module interrupts CPU.
• CPU requests data.
• I/O module transfers data.

28. Advantages&DisadvantagesofInterruptDriveI/O
Advantages
• Fast
• Efficient
Disadvantages
• can be tricky to write if using a low level language
• can be tough to get various pieces to work well
together
• usually done by the hardware manufacturer / OS
maker, e.g. Microsoft

29. Interrups vs Polling
• A computer must have a way of detecting
the arrival of any type of input. There are
two ways that this can happen, known
as polling and interrupts. Both of these
techniques allow the processor to deal with
events that can happen at any time and
that are not related to the process it is
currently running.

30. Interrups vs Polling
• CPU attention
• Protocol and mechanism
• Device serviced by..
• Time of services
• Request line & command ready
• Disturbance