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Balasubramanian.R
Tech Support
FEATURESFEATURES
 8-bit CPU optimized for control applications
 Extensive Boolean processing (Single-bit logic) capabili...
Contents:Contents:
IntroductionIntroduction
Block Diagram andBlock Diagram and Pin Description of the 8051Pin Description ...
Why do we need to learnWhy do we need to learn
Microprocessors/controllers?Microprocessors/controllers?
The microprocessor...
Different aspects of a
microprocessor/controller
Hardware :Interface to the real world
Software :order how to deal with in...
The necessary tools for aThe necessary tools for a
microprocessor/controllermicroprocessor/controller
CPU: Central Process...
CPU
General-
Purpose
Micro-
processor
RAM ROM I/O
Port
Timer
Serial
COM
Port
Data Bus
Address Bus
General-Purpose Micropro...
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
A smaller computer
On-chip RAM, ROM, I/O ports...
Example : Mot...
Microprocessor
CPU is stand-alone, RAM,
ROM, I/O, timer are separate
designer can decide on the
amount of ROM, RAM and
I/O...
Embedded system means the processor is embedded into that
application.
An embedded product uses a microprocessor or microc...
1. meeting the computing needs of the task efficiently and cost
effectively
• speed, the amount of ROM and RAM, the number...
Interrupt
Control
CPU
4K
ROM
128
RAM
OSC Bus
Control 4 I/O Ports
Serial
Port
Timer 1
Timer 0
BLOCK DIAGRAMBLOCK DIAGRAM
TX...
BLOCK DIAGRAMBLOCK DIAGRAM
1414SKB'sSKB's
PIN DETAILSPIN DETAILS
P1
P3
P0
P2
XTAL
+
_
RESET
Pins of 8051Pins of 8051 (( 1/41/4 ))
Vcc ( pin 40 ):

Vcc provides supply voltage to the chip.

The voltage source is +...
Figure (a). XTAL Connection to 8051Figure (a). XTAL Connection to 8051
C2
30pF
C1
30pF
XTAL2
XTAL1
GND
 Using a quartz cr...
Pins of 8051Pins of 8051 (( 2/42/4 ))
RST ( pin 9 ): reset

It is an input pin and is active high ( normally low ) .
The ...
Figure (b). Power-On RESET CircuitFigure (b). Power-On RESET Circuit
30 pF
30 pF
8.2 K
10 uF
+
Vcc
11.0592 MHz
EA/VPP
X1
X...
Pins of 8051Pins of 8051 (( 3/43/4 ))
/EA ( pin 31 ): external access

There is no on-chip ROM in 8031 and 8032 .

The /...
Pins of 8051Pins of 8051 (( 4/44/4 ))
ALE ( pin 30 ): address latch enable

It is an output pin and is active high.

805...
Pins of I/O PortPins of I/O Port
The 8051 has four I/O ports

Port 0 ( pins 32-39 ): P0 ( P0.0 ~ P0.7 )

Port 1 ( pins 1...
Hardware Structure of I/O PinHardware Structure of I/O Pin
Each pin of I/O ports

Internal CPU bus : communicate with CPU...
D LatchD Latch::
A Pin of Port 1A Pin of Port 1
8051 IC
D Q
Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P1.X
...
Writing “1” to Output Pin P1.XWriting “1” to Output Pin P1.X
D Q
Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Int...
Writing “0” to Output Pin P1.XWriting “0” to Output Pin P1.X
D Q
Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Int...
Reading “High” at Input PinReading “High” at Input Pin
D Q
Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal ...
Reading “Low” at Input PinReading “Low” at Input Pin
D Q
Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CP...
Other PinsOther Pins
P1, P2, and P3 have internal pull-up resisters.

P1, P2, and P3 are not open drain.
P0 has no intern...
A Pin of Port 0A Pin of Port 0
8051 IC
D Q
Clk Q
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P0.X
pinP1.X
TB1
T...
Port 0 with Pull-Up ResistorsPort 0 with Pull-Up Resistors
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
DS5000
8751
8951
Vcc
10...
Port 3 Alternate FunctionsPort 3 Alternate Functions
1717RDRDP3.7P3.7
1616WRWRP3.6P3.6
1515T1T1P3.5P3.5
1414T0T0P3.4P3.4
1...
RESET Value of Some 8051 Registers:RESET Value of Some 8051 Registers:
0000DPTR
0007SP
0000PSW
0000B
0000ACC
0000PC
Reset ...
INTERNAL RAM STRUCTUREINTERNAL RAM STRUCTURE
Direct &
Indirect
Addressing
Inirect
Addressing
Only
Direct
Addressing
Only S...
Registers
A
B
R0
R1
R3
R4
R2
R5
R7
R6
DPH DPL
PC
DPTR
PC
Some 8051 16-bit Register
Some 8-bitt Registers of
the 8051
128 BYTE RAM128 BYTE RAM
128 BYTE
INTERNAL RAM
Register Banks
Reg Bank 0
Reg Bank 1
Reg Bank 2
Reg Bank 3
BIT Addressable
...
RAM memory space allocation in the 8051
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
)Stack) Register B...
REGISTER BANK STRUCTUREREGISTER BANK STRUCTURE
R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7Bank 0
R0R0 R1R1 R2R2 R3R3 R4R4 R5R5...
F8 FF
F0 B F7
E8 EF
E0 Acc E7
D8 DF
D0 PSW D7
C8 CF
C0 C7
B8 IP BF
B0 P3 B7
A8 IE AF
A0 P2 A7
98 SCON SBUF 9F
90 P1 97
88 ...
Memory mapping in 8051Memory mapping in 8051
ROM memory map in 8051 family
0000H
0FFFH
0000H
1FFFH
0000H
7FFFH
8751
AT89C5...
Stack in the 8051Stack in the 8051
The register used to access
the stack is called SP (stack
pointer) register.
The stack ...
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operation G...
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operation G...
4545
Arithmetic Operation GroupArithmetic Operation Group
ADDC A,DirectADDC A,Direct
ADDC A,RnADDC A,Rn
ADDC A,@RiADDC ...
4646
Arithmetic Operation GroupArithmetic Operation Group
ADD A,DirectADD A,Direct
ADD A,RnADD A,Rn
ADD A,@RiADD A,@Ri
...
4747
Arithmetic Operation GroupArithmetic Operation Group
SUBB A,DirectSUBB A,Direct
SUBB A,RnSUBB A,Rn
SUBB A,@RiSUBB ...
4848
Arithmetic Operation GroupArithmetic Operation Group
INCINC AA
INCINC DirectDirect
INCINC RnRn
INCINC @Ri@Ri
4949
Arithmetic Operation GroupArithmetic Operation Group
DECDEC AA
DECDEC DirectDirect
DECDEC RnRn
DECDEC @Ri@Ri
5050
Arithmetic Operation GroupArithmetic Operation Group
INCINC DPTRDPTR
MULMUL ABAB
DIVDIV ABAB
DADA AA
5151
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operat...
5252
Logical Operation GroupLogical Operation Group
ANL A,DirectANL A,Direct
ANL A,RnANL A,Rn
ANL A,@RiANL A,@Ri
ANL A...
5353
Logical Operation GroupLogical Operation Group
ORL A,DirectORL A,Direct
ORL A,RnORL A,Rn
ORL A,@RiORL A,@Ri
ORL A...
5454
Logical Operation GroupLogical Operation Group
XRL A,DirectXRL A,Direct
XRL A,RnXRL A,Rn
XRL A,@RiXRL A,@Ri
XRL A...
5555
Logical Operation GroupLogical Operation Group
CLRCLR AA
CPLCPL AA
RLRL AA
RLCRLC AA
RRRR AA
RRCRRC AA
SWAP AS...
5656
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operat...
5757
Data Transfer GroupData Transfer Group
MOV A,DirectMOV A,Direct
MOV A,RnMOV A,Rn
MOV A,@RiMOV A,@Ri
MOV A,#DataMO...
5858
Data Transfer GroupData Transfer Group
MOV Direct,DirectMOV Direct,Direct
MOV Direct,RnMOV Direct,Rn
MOV Direct,@R...
5959
Data Transfer GroupData Transfer Group
MOV @Ri,DirectMOV @Ri,Direct
MOV DPTR,#DATA16MOV DPTR,#DATA16
MOVC A,@A+DPT...
6060
Data Transfer GroupData Transfer Group
PUSH DirectPUSH Direct
POPPOP DirectDirect
XCHXCH A,RnA,Rn
XCHXCH A,Direct...
6161
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operat...
6262
Boolean Variable Manipulation GroupBoolean Variable Manipulation Group
CLRCLR CC
CLRCLR bitbit
SETBSETB CC
SETB b...
6363
Boolean Variable Manipulation GroupBoolean Variable Manipulation Group
ANLANL C,bitC,bit
ANLANL C,/bitC,/bit
ORLOR...
6464
Boolean Variable Manipulation GroupBoolean Variable Manipulation Group
JCJC relrel
JNCJNC relrel
JBJB bit,relbit,r...
6565
Instruction SetInstruction Set
5 Groups5 Groups
Arithmetic Operation GroupArithmetic Operation Group
Logical Operat...
6666
Program Branching GroupProgram Branching Group
ACALLACALL addr11addr11
LCALLLCALL addr16addr16
RETRET
RETIRETI
A...
6767SKB'sSKB's
Program Branching GroupProgram Branching Group
JMPJMP @A+DPTR@A+DPTR
JZJZ relrel
JNZJNZ relrel
CJNECJNE...
6868
Program Branching GroupProgram Branching Group
DJNZ Rn,relDJNZ Rn,rel
DJNZ Direct,relDJNZ Direct,rel
NOPNOP
7070
TIMERS
SERIAL PORT
INTERRUPTS
7171
TIMERS
SERIAL PORT
INTERRUPTS
TMOD RegisterTMOD Register::
Gate : When set, timer only runs while INT(0,1) is
high.
C/T : Counter/Timer select bit.
M1 :...
TCON Register:TCON Register:
TF1: Timer 1 overflow flag.
TR1: Timer 1 run control bit.
TF0: Timer 0 overflag.
TR0: Timer 0...
7474
M0M0M1M1C/C/ŤŤGateGateM0M0M1M1C/C/ŤŤGateGate
TMODTMOD
IT0IT0IE0IE0IT1IT1IE1IE1TR0TR0TF0TF0TR1TR1TF1TF1
TCONTCON
Timer...
7575
Timer 0
Mode 3Mode 3
Mode 2Mode 2
Mode 1Mode 1
Mode 0Mode 0
Mode 2Mode 2
Mode 1Mode 1
Mode 0Mode 0
Timer 1
TIMERS
7676
OSC ÷12
TL
(8 Bit)
/ 0C T =
/ 1C T =
INT PIN
Gate
TR
T PIN
TH
(8 Bit)
TF
(1 Bit)
INTERRUPT
TIMER / COUNTER
7777
OSC ÷12
TL0
/ 0C T =
/ 1C T =
0INT PIN
Gate
0TR
0T PIN
TH0
INTERRUPT
TIMER 0
x
TF0
7878
TL0
(5 Bit)
INTERRUPT
TIMER 0 – Mode 0
OSC ÷12 / 0C T =
/ 1C T =
0INT PIN
Gate
0TR
0T PIN
X
TH0
(8 Bit)
TF0
13 Bit Ti...
7979
TL0
(8 Bit)
INTERRUPT
TIMER 0 – Mode 1
OSC ÷12 / 0C T =
/ 1C T =
0INT PIN
Gate
0TR
0T PIN
X
TH0
(8 Bit)
TF0
16 Bit Ti...
8080
TL0
(8 Bit)
INTERRUPT
OSC ÷12 / 0C T =
/ 1C T =
0INT PIN
Gate
0TR
0T PIN
X
TH0
(8 Bit)
TF0
Maximum Count = FFh (11111...
8181
TL0
(8 Bit)
OSC ÷12 / 0C T =
/ 1C T =
0INT PIN
Gate
0TR
0T PIN
X
TIMER 0 – Mode 3
Two - 8 Bit Timer / Counter
OSC ÷12...
8282
OSC ÷12
TL1
/ 0C T =
/ 1C T =
1INT PIN
Gate
1TR
1T PIN
TH1 TF1
INTERRUPT
TIMER 1
8383
TL1
Gate
OSC ÷12
/ 0C T =
/ 1C T =
1INT PIN
1TR
1T PIN
TH1 TF1
INTERRUPT
TIMER 1
Y
8484
TL1
(5 Bit)
INTERRUPT
TIMER 1 – Mode 0
TH1
(8 Bit)
TF1
13 Bit Timer / Counter
Maximum Count = 1FFFh (1111111111111)
G...
8585
TL1
(8 Bit)
INTERRUPT
TIMER 1 – Mode 1
TH1
(8 Bit)
TF1
16 Bit Timer / Counter
Maximum Count = FFFFh (1111111111111111...
8686
TL1
(8 Bit)
INTERRUPT
TH1
(8 Bit)
TF1
Maximum Count = FFh (11111111)
Reload
TIMER 1 – Mode 2
8 Bit Timer / Counter wi...
8787
TIMERS
SERIAL PORT
INTERRUPTS
8888SKB'sSKB's
SBUFF
Zero Detector
TX Control
TX Clock
Start Shift
SendTI
SBUFF
Input Shift Register
RX Control
Start
RX C...
8989
RIRITITIRB8RB8TB8TB8RENRENSM2SM2SM1SM1SM0SM0
SCONSCON
IDLIDLPDPDGF0GF0GF1GF1------SMODSMOD
PCONPCON
SFRs Related to S...
9090
SERIAL PORT– Mode 0
The Serial Port in Mode-0 has the following
features:
• Serial data enters and exits through RXD
...
9191SKB'sSKB's
SERIAL PORT– Mode 0
9292
SERIAL PORT– Mode 0
9393
SERIAL PORT– Mode 1
The Serial Port in Mode-1 has the following features:
• Serial data enters RXD
• Serial data exit...
9494SKB'sSKB's
SERIAL PORT– Mode 1
9595
SERIAL PORT– Mode 1
9696
SERIAL PORT– Mode 2
The Serial Port in Mode-2 has the following features:
• Serial data enters RXD
• Serial data exit...
9797SKB'sSKB's
SERIAL PORT– Mode 2
9898
SERIAL PORT– Mode 2
9999
SERIAL PORT– Mode 3
The Serial Port in Mode-3 has the following features:
• Serial data enters RXD
• Serial data exit...
100100SKB'sSKB's
SERIAL PORT– Mode 3
101101
SERIAL PORT– Mode 3
102102SKB'sSKB's
SERIAL PORT INTERACE WITH RS-232
103103
TIMERS
SERIAL PORT
INTERRUPTS
Interrupt :Interrupt :
105105
INTERRUPTS
The Interrupt structure has the following features:
• 6 sources / 5 vectored interrupts
• Each interrupt...
Interrupt Enable Register :Interrupt Enable Register :
EA : Global enable/disable.
--- : Undefined.
ET2 :Enable Timer 2 in...
107107
EX0EX0ET0ET0EX1EX1ET1ET1ESES----EAEA
IEIE
PX0PX0PT0PT0PX1PX1PT1PT1PSPS------
IPIP
SFRs Related to INTERRUPTS
Priori...
108108
IT0IT0IE0IE0IT1IT1IE1IE1TR0TR0TF0TF0TR1TR1TF1TF1
TCONTCON
InterruptInterrupt
SFRs Related to INTERRUPTS
IE0IE0TF0TF...
109109
1INT
INTERRUPTS
0INT
0TF
1TF
TI
RI
INTERRUPT
SOURCES
IE0
IE1
110110
1INT
Over all Interrupt Block Diagram
0INT
0TF
1TF
TI
RI
IE0
IE1
Individual
Enable
Global
Disable
Low Priority
Inte...
111111
112112
MEMORY INTERFACING
External RAM Interfacing :-
MCS 51
ALE
EXT
RAM
Data
Address
RDWR RD WR
ALE
P0
P2
P1
P3
113113
MEMORY INTERFACING
External RAM Interfacing :-
D
CLK
Q
D
CLK
Q
D
CLK
Q
D
CLK
Q
AD0
AD1
AD2
AD3
D0
D1
D2
D3
A0
A1
A2...
114114
MEMORY INTERFACING
External ROM Interfacing :-
MCS 51
ALE
EXT
ROM
Instr
Address
PSEN CE
ALE
P0
P2
P1
P3
EA
EEPROM
117117
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
24 Programmable I/O pins
Three Config...
118118SKB'sSKB's
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
119119
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
120120
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
A1 A0 Select
0 0 PA
0 1 PB
1 0 PC
1 1 C...
121121SKB'sSKB's
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
Group B
PortC (Lower)
1 = Inp...
122122
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
X X X
Not Used
Bit Select
000 = Bit 0
0...
123123
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
Mode 0 :-
124124
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
Mode 1 :-
125125
82558255
Programmable Peripheral InterfaceProgrammable Peripheral Interface
Mode 2 :-
126126
82538253
Programmable Interval TimerProgrammable Interval Timer
3 Independent 16bit Counters
DC - 2.6MHz
BCD or ...
127127
82538253
Programmable Interval TimerProgrammable Interval Timer
Pin Diagram :-
128128SKB'sSKB's
82538253
Programmable Interval TimerProgrammable Interval Timer
Block Diagram :-
129129
82538253
Programmable Interval TimerProgrammable Interval Timer
System Interface :-
130130
82538253
Programmable Interval TimerProgrammable Interval Timer
Mode Select
000 = Mode 0
001 = Mode 1
X10 = Mode 2
...
131131
82538253
Programmable Interval TimerProgrammable Interval Timer
Mode 0 :-
132132
Mode 1 :-
82538253
Programmable Interval TimerProgrammable Interval Timer
133133
Mode 2 :-
82538253
Programmable Interval TimerProgrammable Interval Timer
134134
Mode 3 :-
82538253
Programmable Interval TimerProgrammable Interval Timer
135135
Mode 4 :-
82538253
Programmable Interval TimerProgrammable Interval Timer
136136
Mode 5 :-
82538253
Programmable Interval TimerProgrammable Interval Timer
137137SKB'sSKB's
82798279
Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
Simultaneous...
138138SKB'sSKB's
Pin Diagram :-
82798279
Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
139139SKB'sSKB's
Signal Diagram :-
82798279
Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Inter...
140140SKB'sSKB's
Block Diagram :-
82798279
Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interf...
141141SKB'sSKB's
System Interface :-
82798279
Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Int...
142142
82518251
Programmable Communication InterfaceProgrammable Communication Interface
Pin Diagram :-
143143
Block Diagram :-
82518251
Programmable Communication InterfaceProgrammable Communication Interface
144144
System Interface :-
82518251
Programmable Communication InterfaceProgrammable Communication Interface
145145
82518251
Programmable Communication InterfaceProgrammable Communication Interface
Mode Instruction Format
146146SKB'sSKB's
82518251
Programmable Communication InterfaceProgrammable Communication Interface
Command Instruction For...
148148
1) Stepper Motor Control
2) Matrix Keyboard
3) Dynamic 7 Segment Display
4) Analog to Digital converter
5) DC Motor...
STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL
 Stepper MotorStepper Motor
 Winding DiagramWinding Diagram
 SpecificationsS...
STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL
W1 W2 W3 W4
1 1 0 0
0 0 1 1
1 0 0 1
0 1 1 0
0 0 1 1
1 0 0 1
1 1 0 0
0 1 1 0
STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL
MATRIX KEYBOARDMATRIX KEYBOARD
 General Keyboard StructureGeneral Keyboard Structure
 Adv & Disadv of General KeyboardAd...
MATRIX KEYBOARDMATRIX KEYBOARD
1 2 3
4 5 6
7 8 9
 0 #
ScanLinesSenseLines
MATRIXKEYBOARDDRIVER
MATRIX KEYBOARDMATRIX KEYBOARD
1 2 3
4 5 6
7 8 9
 0 #
RL0
RL1
SL0
RL2
SL1
SL2
SL3
ScanLinesSenseLines
MATRIX KEYBOARDMATRIX KEYBOARD
11000000
110000
RL0RL0RL1RL1RL2RL2SL0SL0SL1SL1SL2SL2SL3SL3
001100
000011
11
22
33
00110000
...
MATRIX KEYBOARDMATRIX KEYBOARD
MATRIX KEYBOARDMATRIX KEYBOARD
DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
 Seven Segment DisplaySeven Segment Display
 Eight LEDsEight LEDs
 T...
DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
V
Seven Segment Display
a
b
c
d
e
f
g
dp
a b c d e f g dp Common
7 SEGMENT DISPLAY7 SEGMENT DISPLAY
DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
ANALOG TO DIGITAL CONVERTERANALOG TO DIGITAL CONVERTER
 ADCADC
 WorkingWorking
 TypesTypes
 ApplicationsApplications
...
ANALOG TO DIGITAL CONVERTERANALOG TO DIGITAL CONVERTER
DIGITAL TO ANALOG CONVERTERDIGITAL TO ANALOG CONVERTER
DC MOTOR CONTROLDC MOTOR CONTROL
 DC MotorDC Motor
 Speed Control MethodsSpeed Control Methods
 Advantage of PWM Method...
DC MOTOR CONTROLDC MOTOR CONTROL
LCD DISPLAYLCD DISPLAY
 Principle of LCDPrinciple of LCD
 16x2 LCD16x2 LCD
 LCD Module –LCD Module – Driver & ScreenDri...
LCD DISPLAYLCD DISPLAY
LCD DISPLAYLCD DISPLAY
LCD DISPLAYLCD DISPLAY
172172SKB'sSKB's
Pin number Symbol Level I/O Function
1 Vss - - Power supply (GND)
2 Vcc - - Power supply (+5V)
3 Vee - - ...
173173SKB'sSKB's
Instruction
Code
Description
Executi
on time
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Clear
display 0 0 0 0...
8051 full ppt
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8051 full ppt

  1. 1. Balasubramanian.R Tech Support
  2. 2. FEATURESFEATURES  8-bit CPU optimized for control applications  Extensive Boolean processing (Single-bit logic) capabilities  64K Program Memory address space  64K Data Memory address space  4K bytes of on-chip Program Memory  128 bytes of on-chip Data RAM  32 bidirectional and individually addressable 1/0 lines  Two 16-bit timer/counters  Full duplex UART  6-source/5-vector interrupt structure with two priority levels  On-chip clock oscillator
  3. 3. Contents:Contents: IntroductionIntroduction Block Diagram andBlock Diagram and Pin Description of the 8051Pin Description of the 8051 RegistersRegisters Memory mapping in 8051Memory mapping in 8051 Stack in the 8051Stack in the 8051 I/O Port ProgrammingI/O Port Programming TimerTimer InterruptInterrupt
  4. 4. Why do we need to learnWhy do we need to learn Microprocessors/controllers?Microprocessors/controllers? The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable..
  5. 5. Different aspects of a microprocessor/controller Hardware :Interface to the real world Software :order how to deal with inputs
  6. 6. The necessary tools for aThe necessary tools for a microprocessor/controllermicroprocessor/controller CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port
  7. 7. CPU General- Purpose Micro- processor RAM ROM I/O Port Timer Serial COM Port Data Bus Address Bus General-Purpose Microprocessor System Microprocessors:Microprocessors: CPU for Computers No RAM, ROM, I/O on CPU chip itself Example : Intel’s x86, Motorola’s 680x0 Many chips on mother’s board General-purpose microprocessor
  8. 8. RAM ROM I/O Port Timer Serial COM Port Microcontroller CPU A smaller computer On-chip RAM, ROM, I/O ports... Example : Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X A single chip Microcontroller :
  9. 9. Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate designer can decide on the amount of ROM, RAM and I/O ports. expansive versatility general-purpose Microcontroller • CPU, RAM, ROM, I/O and timer are all on a single chip • fix amount of on-chip ROM, RAM, I/O ports • for applications in which cost, power and space are critical • single-purpose Microprocessor vs. Microcontroller
  10. 10. Embedded system means the processor is embedded into that application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Example : printer, keyboard, video game player Embedded System
  11. 11. 1. meeting the computing needs of the task efficiently and cost effectively • speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption • easy to upgrade • cost per unit 1. availability of software development tools • assemblers, debuggers, C compilers, emulator, simulator, technical support 1. wide availability and reliable sources of the microcontrollers. Three criteria in Choosing a Microcontroller
  12. 12. Interrupt Control CPU 4K ROM 128 RAM OSC Bus Control 4 I/O Ports Serial Port Timer 1 Timer 0 BLOCK DIAGRAMBLOCK DIAGRAM TXD RXD P0 P1 P2 P3
  13. 13. BLOCK DIAGRAMBLOCK DIAGRAM
  14. 14. 1414SKB'sSKB's PIN DETAILSPIN DETAILS P1 P3 P0 P2 XTAL + _ RESET
  15. 15. Pins of 8051Pins of 8051 (( 1/41/4 )) Vcc ( pin 40 ):  Vcc provides supply voltage to the chip.  The voltage source is +5V. GND ( pin 20 ): ground XTAL1 and XTAL2 ( pins 19,18 )
  16. 16. Figure (a). XTAL Connection to 8051Figure (a). XTAL Connection to 8051 C2 30pF C1 30pF XTAL2 XTAL1 GND  Using a quartz crystal oscillator  We can observe the frequency on the XTAL2 pin. 
  17. 17. Pins of 8051Pins of 8051 (( 2/42/4 )) RST ( pin 9 ): reset  It is an input pin and is active high ( normally low ) . The high pulse must be high at least 2 machine cycles.  It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers 
  18. 18. Figure (b). Power-On RESET CircuitFigure (b). Power-On RESET Circuit 30 pF 30 pF 8.2 K 10 uF + Vcc 11.0592 MHz EA/VPP X1 X2 RST 31 19 18 9 
  19. 19. Pins of 8051Pins of 8051 (( 3/43/4 )) /EA ( pin 31 ): external access  There is no on-chip ROM in 8031 and 8032 .  The /EA pin is connected to GND to indicate the code is stored externally.  /PSEN & ALE are used for external ROM.  For 8051, /EA pin is connected to Vcc.  “/” means active low. /PSEN ( pin 29 ): program store enable  This is an output pin and is connected to the OE pin of the ROM.
  20. 20. Pins of 8051Pins of 8051 (( 4/44/4 )) ALE ( pin 30 ): address latch enable  It is an output pin and is active high.  8051 port 0 provides both address and data.  The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins  The four ports P0, P1, P2, and P3.  Each port uses 8 pins.  All I/O pins are bi-directional..
  21. 21. Pins of I/O PortPins of I/O Port The 8051 has four I/O ports  Port 0 ( pins 32-39 ): P0 ( P0.0 ~ P0.7 )  Port 1 ( pins 1-8 ) : P1 ( P1.0 ~ P1.7 )  Port 2 ( pins 21-28 ): P2 ( P2.0 ~ P2.7 )  Port 3 ( pins 10-17 ): P3 ( P3.0 ~ P3.7 )  Each port has 8 pins. Named P0.X ( X=0,1,...,7 ) , P1.X, P2.X, P3.X Ex : P0.0 is the bit 0 ( LSB ) of P0 Ex : P0.7 is the bit 7 ( MSB ) of P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction). 
  22. 22. Hardware Structure of I/O PinHardware Structure of I/O Pin Each pin of I/O ports  Internal CPU bus : communicate with CPU  A D latch store the value of this pin D latch is controlled by “Write to latch”  Write to latch = 1 : write data into the D latch  2 Tri-state buffer : TB1: controlled by “Read pin”  Read pin = 1 : really read the data present at the pin TB2: controlled by “Read latch”  Read latch = 1 : read value from internal latch  A transistor M1 gate Gate=0: open Gate=1: close
  23. 23. D LatchD Latch::
  24. 24. A Pin of Port 1A Pin of Port 1 8051 IC D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pinP1.X TB1 TB2 P0.x
  25. 25. Writing “1” to Output Pin P1.XWriting “1” to Output Pin P1.X D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pinP1.X 8051 IC 2. output pin is Vcc1. write a 1 to the pin 1 0 output 1 TB1 TB2
  26. 26. Writing “0” to Output Pin P1.XWriting “0” to Output Pin P1.X D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pinP1.X 8051 IC 2. output pin is ground1. write a 0 to the pin 0 1 output 0 TB1 TB2
  27. 27. Reading “High” at Input PinReading “High” at Input Pin D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X 8051 IC 2. MOV A,P1 external pin=High 1. write a 1 to the pin MOV P1,#0FFH 1 0 3. Read pin=1 Read latch=0 Write to latch=1 1 TB1 TB2
  28. 28. Reading “Low” at Input PinReading “Low” at Input Pin D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X 8051 IC 2. MOV A,P1 external pin=Low1. write a 1 to the pin MOV P1,#0FFH 1 0 3. Read pin=1 Read latch=0 Write to latch=1 0 TB1 TB2
  29. 29. Other PinsOther Pins P1, P2, and P3 have internal pull-up resisters.  P1, P2, and P3 are not open drain. P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051.  P0 is open drain.  Compare the figures of P1.X and P0.X.  However, for a programmer, it is the same to program P0, P1, P2 and P3. All the ports upon RESET are configured as output.
  30. 30. A Pin of Port 0A Pin of Port 0 8051 IC D Q Clk Q Read latch Read pin Write to latch Internal CPU bus M1 P0.X pinP1.X TB1 TB2 P1.x
  31. 31. Port 0 with Pull-Up ResistorsPort 0 with Pull-Up Resistors P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 DS5000 8751 8951 Vcc 10 K Port0
  32. 32. Port 3 Alternate FunctionsPort 3 Alternate Functions 1717RDRDP3.7P3.7 1616WRWRP3.6P3.6 1515T1T1P3.5P3.5 1414T0T0P3.4P3.4 1313INT1INT1P3.3P3.3 1212INT0INT0P3.2P3.2 1111TxDTxDP3.1P3.1 1010RxDRxDP3.0P3.0 PinPinFunctionFunctionP3 BitP3 Bit 
  33. 33. RESET Value of Some 8051 Registers:RESET Value of Some 8051 Registers: 0000DPTR 0007SP 0000PSW 0000B 0000ACC 0000PC Reset ValueRegister RAM are all zero.. 
  34. 34. INTERNAL RAM STRUCTUREINTERNAL RAM STRUCTURE Direct & Indirect Addressing Inirect Addressing Only Direct Addressing Only SFR 128 Byte Internal RAM
  35. 35. Registers A B R0 R1 R3 R4 R2 R5 R7 R6 DPH DPL PC DPTR PC Some 8051 16-bit Register Some 8-bitt Registers of the 8051
  36. 36. 128 BYTE RAM128 BYTE RAM 128 BYTE INTERNAL RAM Register Banks Reg Bank 0 Reg Bank 1 Reg Bank 2 Reg Bank 3 BIT Addressable Area General Purpose Area
  37. 37. RAM memory space allocation in the 8051 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 )Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
  38. 38. REGISTER BANK STRUCTUREREGISTER BANK STRUCTURE R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7Bank 0 R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7Bank 3 R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7Bank 2 R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7Bank 1 CYCY ACAC F0F0 RS1RS1 RS0RS0 OVOV -- PP Program Status Word -Program Status Word - PSWPSW
  39. 39. F8 FF F0 B F7 E8 EF E0 Acc E7 D8 DF D0 PSW D7 C8 CF C0 C7 B8 IP BF B0 P3 B7 A8 IE AF A0 P2 A7 98 SCON SBUF 9F 90 P1 97 88 TCON TMOD TL0 TL1 TH0 TH1 8F 80 P0 SP DPL DPH PCON 87 SFRSFR
  40. 40. Memory mapping in 8051Memory mapping in 8051 ROM memory map in 8051 family 0000H 0FFFH 0000H 1FFFH 0000H 7FFFH 8751 AT89C51 8752 AT89C52 4k DS5000-32 8k 32k from Atmel Corporation from Dallas Semiconductor
  41. 41. Stack in the 8051Stack in the 8051 The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07. 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 )Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
  42. 42. Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  43. 43. Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  44. 44. 4545 Arithmetic Operation GroupArithmetic Operation Group ADDC A,DirectADDC A,Direct ADDC A,RnADDC A,Rn ADDC A,@RiADDC A,@Ri ADDC A,#DataADDC A,#Data
  45. 45. 4646 Arithmetic Operation GroupArithmetic Operation Group ADD A,DirectADD A,Direct ADD A,RnADD A,Rn ADD A,@RiADD A,@Ri ADD A,#DataADD A,#Data
  46. 46. 4747 Arithmetic Operation GroupArithmetic Operation Group SUBB A,DirectSUBB A,Direct SUBB A,RnSUBB A,Rn SUBB A,@RiSUBB A,@Ri SUBB A,#DataSUBB A,#Data
  47. 47. 4848 Arithmetic Operation GroupArithmetic Operation Group INCINC AA INCINC DirectDirect INCINC RnRn INCINC @Ri@Ri
  48. 48. 4949 Arithmetic Operation GroupArithmetic Operation Group DECDEC AA DECDEC DirectDirect DECDEC RnRn DECDEC @Ri@Ri
  49. 49. 5050 Arithmetic Operation GroupArithmetic Operation Group INCINC DPTRDPTR MULMUL ABAB DIVDIV ABAB DADA AA
  50. 50. 5151 Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  51. 51. 5252 Logical Operation GroupLogical Operation Group ANL A,DirectANL A,Direct ANL A,RnANL A,Rn ANL A,@RiANL A,@Ri ANL A,#DataANL A,#Data ANL Direct,AANL Direct,A ANL Direct,#DataANL Direct,#Data
  52. 52. 5353 Logical Operation GroupLogical Operation Group ORL A,DirectORL A,Direct ORL A,RnORL A,Rn ORL A,@RiORL A,@Ri ORL A,#DataORL A,#Data ORL Direct,AORL Direct,A ORL Direct,#DataORL Direct,#Data
  53. 53. 5454 Logical Operation GroupLogical Operation Group XRL A,DirectXRL A,Direct XRL A,RnXRL A,Rn XRL A,@RiXRL A,@Ri XRL A,#DataXRL A,#Data XRL Direct,AXRL Direct,A XRL Direct,#DataXRL Direct,#Data
  54. 54. 5555 Logical Operation GroupLogical Operation Group CLRCLR AA CPLCPL AA RLRL AA RLCRLC AA RRRR AA RRCRRC AA SWAP ASWAP A
  55. 55. 5656 Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  56. 56. 5757 Data Transfer GroupData Transfer Group MOV A,DirectMOV A,Direct MOV A,RnMOV A,Rn MOV A,@RiMOV A,@Ri MOV A,#DataMOV A,#Data MOV Rn,DirectMOV Rn,Direct MOV Rn,@RiMOV Rn,@Ri MOV Rn,#DataMOV Rn,#Data
  57. 57. 5858 Data Transfer GroupData Transfer Group MOV Direct,DirectMOV Direct,Direct MOV Direct,RnMOV Direct,Rn MOV Direct,@RiMOV Direct,@Ri MOV Direct,#DataMOV Direct,#Data MOV Direct,AMOV Direct,A MOV @Ri,AMOV @Ri,A MOV @Ri,#DataMOV @Ri,#Data
  58. 58. 5959 Data Transfer GroupData Transfer Group MOV @Ri,DirectMOV @Ri,Direct MOV DPTR,#DATA16MOV DPTR,#DATA16 MOVC A,@A+DPTRMOVC A,@A+DPTR MOVC A,@A+PCMOVC A,@A+PC MOVX A,@RiMOVX A,@Ri MOVX @Ri,AMOVX @Ri,A MOVX @DPTR,AMOVX @DPTR,A
  59. 59. 6060 Data Transfer GroupData Transfer Group PUSH DirectPUSH Direct POPPOP DirectDirect XCHXCH A,RnA,Rn XCHXCH A,DirectA,Direct XCHXCH A,@RiA,@Ri XCHD A,@RiXCHD A,@Ri
  60. 60. 6161 Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  61. 61. 6262 Boolean Variable Manipulation GroupBoolean Variable Manipulation Group CLRCLR CC CLRCLR bitbit SETBSETB CC SETB bitSETB bit CPLCPL CC CPLCPL bitbit
  62. 62. 6363 Boolean Variable Manipulation GroupBoolean Variable Manipulation Group ANLANL C,bitC,bit ANLANL C,/bitC,/bit ORLORL C,bitC,bit ORLORL C,/bitC,/bit MOVMOV C,bitC,bit MOVMOV bit,Cbit,C
  63. 63. 6464 Boolean Variable Manipulation GroupBoolean Variable Manipulation Group JCJC relrel JNCJNC relrel JBJB bit,relbit,rel JNBJNB bit,relbit,rel JBCJBC bit,relbit,rel
  64. 64. 6565 Instruction SetInstruction Set 5 Groups5 Groups Arithmetic Operation GroupArithmetic Operation Group Logical Operation GroupLogical Operation Group Data Transfer GroupData Transfer Group Boolean Variable Manipulation GroupBoolean Variable Manipulation Group Program Branching GroupProgram Branching Group
  65. 65. 6666 Program Branching GroupProgram Branching Group ACALLACALL addr11addr11 LCALLLCALL addr16addr16 RETRET RETIRETI AJMPAJMP addr11addr11 LJMPLJMP addr16addr16 SJMPSJMP relrel
  66. 66. 6767SKB'sSKB's Program Branching GroupProgram Branching Group JMPJMP @A+DPTR@A+DPTR JZJZ relrel JNZJNZ relrel CJNECJNE A,Direct,relA,Direct,rel CJNE A,#Data,relCJNE A,#Data,rel CJNE Rn,#Data,relCJNE Rn,#Data,rel CJNE @Ri,#Data,relCJNE @Ri,#Data,rel
  67. 67. 6868 Program Branching GroupProgram Branching Group DJNZ Rn,relDJNZ Rn,rel DJNZ Direct,relDJNZ Direct,rel NOPNOP
  68. 68. 7070 TIMERS SERIAL PORT INTERRUPTS
  69. 69. 7171 TIMERS SERIAL PORT INTERRUPTS
  70. 70. TMOD RegisterTMOD Register:: Gate : When set, timer only runs while INT(0,1) is high. C/T : Counter/Timer select bit. M1 : Mode bit 1. M0 : Mode bit 0.
  71. 71. TCON Register:TCON Register: TF1: Timer 1 overflow flag. TR1: Timer 1 run control bit. TF0: Timer 0 overflag. TR0: Timer 0 run control bit. IE1: External interrupt 1 edge flag. IT1: External interrupt 1 type flag. IE0: External interrupt 0 edge flag. IT0: External interrupt 0 type flag.
  72. 72. 7474 M0M0M1M1C/C/ŤŤGateGateM0M0M1M1C/C/ŤŤGateGate TMODTMOD IT0IT0IE0IE0IT1IT1IE1IE1TR0TR0TF0TF0TR1TR1TF1TF1 TCONTCON Timer 0Timer 0Timer 1Timer 1 TimersTimers SFRs Related to TIMER
  73. 73. 7575 Timer 0 Mode 3Mode 3 Mode 2Mode 2 Mode 1Mode 1 Mode 0Mode 0 Mode 2Mode 2 Mode 1Mode 1 Mode 0Mode 0 Timer 1 TIMERS
  74. 74. 7676 OSC ÷12 TL (8 Bit) / 0C T = / 1C T = INT PIN Gate TR T PIN TH (8 Bit) TF (1 Bit) INTERRUPT TIMER / COUNTER
  75. 75. 7777 OSC ÷12 TL0 / 0C T = / 1C T = 0INT PIN Gate 0TR 0T PIN TH0 INTERRUPT TIMER 0 x TF0
  76. 76. 7878 TL0 (5 Bit) INTERRUPT TIMER 0 – Mode 0 OSC ÷12 / 0C T = / 1C T = 0INT PIN Gate 0TR 0T PIN X TH0 (8 Bit) TF0 13 Bit Timer / Counter Maximum Count = 1FFFh (1111111111111)
  77. 77. 7979 TL0 (8 Bit) INTERRUPT TIMER 0 – Mode 1 OSC ÷12 / 0C T = / 1C T = 0INT PIN Gate 0TR 0T PIN X TH0 (8 Bit) TF0 16 Bit Timer / Counter Maximum Count = FFFFh (1111111111111111)
  78. 78. 8080 TL0 (8 Bit) INTERRUPT OSC ÷12 / 0C T = / 1C T = 0INT PIN Gate 0TR 0T PIN X TH0 (8 Bit) TF0 Maximum Count = FFh (11111111) Reload TIMER 0 – Mode 2 8 Bit Timer / Counter with AUTORELOAD
  79. 79. 8181 TL0 (8 Bit) OSC ÷12 / 0C T = / 1C T = 0INT PIN Gate 0TR 0T PIN X TIMER 0 – Mode 3 Two - 8 Bit Timer / Counter OSC ÷12 1TR TH0 (8 Bit) INTERRUPTTF1 INTERRUPTTF0
  80. 80. 8282 OSC ÷12 TL1 / 0C T = / 1C T = 1INT PIN Gate 1TR 1T PIN TH1 TF1 INTERRUPT TIMER 1
  81. 81. 8383 TL1 Gate OSC ÷12 / 0C T = / 1C T = 1INT PIN 1TR 1T PIN TH1 TF1 INTERRUPT TIMER 1 Y
  82. 82. 8484 TL1 (5 Bit) INTERRUPT TIMER 1 – Mode 0 TH1 (8 Bit) TF1 13 Bit Timer / Counter Maximum Count = 1FFFh (1111111111111) Gate OSC ÷12 / 0C T = / 1C T = 1INT PIN 1TR 1T PIN Y
  83. 83. 8585 TL1 (8 Bit) INTERRUPT TIMER 1 – Mode 1 TH1 (8 Bit) TF1 16 Bit Timer / Counter Maximum Count = FFFFh (1111111111111111) Gate OSC ÷12 / 0C T = / 1C T = 1INT PIN 1TR 1T PIN Y
  84. 84. 8686 TL1 (8 Bit) INTERRUPT TH1 (8 Bit) TF1 Maximum Count = FFh (11111111) Reload TIMER 1 – Mode 2 8 Bit Timer / Counter with AUTORELOAD Gate OSC ÷12 / 0C T = / 1C T = 1INT PIN 1TR 1T PIN Y
  85. 85. 8787 TIMERS SERIAL PORT INTERRUPTS
  86. 86. 8888SKB'sSKB's SBUFF Zero Detector TX Control TX Clock Start Shift SendTI SBUFF Input Shift Register RX Control Start RX Clock Receive Shift RI 1 1 1 1 1 1 1 0 Shift Clock CL QD S RXD O/P TXD RI REN CLK Write to BUFFER Serial Port Interrupt RXD I/P Load to BUFFER Read From BUFFER
  87. 87. 8989 RIRITITIRB8RB8TB8TB8RENRENSM2SM2SM1SM1SM0SM0 SCONSCON IDLIDLPDPDGF0GF0GF1GF1------SMODSMOD PCONPCON SFRs Related to SERIAL PORT
  88. 88. 9090 SERIAL PORT– Mode 0 The Serial Port in Mode-0 has the following features: • Serial data enters and exits through RXD • TXD outputs the shifl clock • 8 bits are transmitted / received • The baud rate is fixed at (1/12) of the oscillator frequency
  89. 89. 9191SKB'sSKB's SERIAL PORT– Mode 0
  90. 90. 9292 SERIAL PORT– Mode 0
  91. 91. 9393 SERIAL PORT– Mode 1 The Serial Port in Mode-1 has the following features: • Serial data enters RXD • Serial data exits through TXD • On receive, the stop bit goes into RB8 in SCON • 10 bits are transmitted / received  Start bit (0)  Data bits (8)  Stop Bit (1) • Baud rate is determined by the Timer 1 over flow rate.
  92. 92. 9494SKB'sSKB's SERIAL PORT– Mode 1
  93. 93. 9595 SERIAL PORT– Mode 1
  94. 94. 9696 SERIAL PORT– Mode 2 The Serial Port in Mode-2 has the following features: • Serial data enters RXD • Serial data exits through TXD • 9th data bit (TB8) can be assign value 0 or 1 • On receive, the 9th data bit goes into RB8 in SCON • 11 bits are transmitted / received  Start bit (0)  Data bits (9)  Stop Bit (1) • Baud rate is programmable – (1/32) or (1/64) of the oscillator frequency
  95. 95. 9797SKB'sSKB's SERIAL PORT– Mode 2
  96. 96. 9898 SERIAL PORT– Mode 2
  97. 97. 9999 SERIAL PORT– Mode 3 The Serial Port in Mode-3 has the following features: • Serial data enters RXD • Serial data exits through TXD • 9th data bit (TB8) can be assign value 0 or 1 • On receive, the 9th data bit goes into RB8 in SCON • 11 bits are transmitted / received  Start bit (0)  Data bits (9)  Stop Bit (1) • Baud rate is determined by the Timer 1 over flow rate.
  98. 98. 100100SKB'sSKB's SERIAL PORT– Mode 3
  99. 99. 101101 SERIAL PORT– Mode 3
  100. 100. 102102SKB'sSKB's SERIAL PORT INTERACE WITH RS-232
  101. 101. 103103 TIMERS SERIAL PORT INTERRUPTS
  102. 102. Interrupt :Interrupt :
  103. 103. 105105 INTERRUPTS The Interrupt structure has the following features: • 6 sources / 5 vectored interrupts • Each interrupts can be individually programmable • Each interrupts can have two priority levels • Priority levels can be programmed • All interrupts can be masked by a single bit - EA • External interrupt type can be programmed  Edge triggered  Level Triggered
  104. 104. Interrupt Enable Register :Interrupt Enable Register : EA : Global enable/disable. --- : Undefined. ET2 :Enable Timer 2 interrupt. ES :Enable Serial port interrupt. ET1 :Enable Timer 1 interrupt. EX1 :Enable External 1 interrupt. ET0 : Enable Timer 0 interrupt. EX0 : Enable External 0 interrupt..
  105. 105. 107107 EX0EX0ET0ET0EX1EX1ET1ET1ESES----EAEA IEIE PX0PX0PT0PT0PX1PX1PT1PT1PSPS------ IPIP SFRs Related to INTERRUPTS Priority Within LevelPriority Within Level
  106. 106. 108108 IT0IT0IE0IE0IT1IT1IE1IE1TR0TR0TF0TF0TR1TR1TF1TF1 TCONTCON InterruptInterrupt SFRs Related to INTERRUPTS IE0IE0TF0TF0IE1IE1TF1TF1RI / TIRI / TI LOW HIGH
  107. 107. 109109 1INT INTERRUPTS 0INT 0TF 1TF TI RI INTERRUPT SOURCES IE0 IE1
  108. 108. 110110 1INT Over all Interrupt Block Diagram 0INT 0TF 1TF TI RI IE0 IE1 Individual Enable Global Disable Low Priority Interrupt High Priority Interrupt Interrupt Polling Sequence IE Reg IP Reg 0IT 1IT 0 0 1 1
  109. 109. 111111
  110. 110. 112112 MEMORY INTERFACING External RAM Interfacing :- MCS 51 ALE EXT RAM Data Address RDWR RD WR ALE P0 P2 P1 P3
  111. 111. 113113 MEMORY INTERFACING External RAM Interfacing :- D CLK Q D CLK Q D CLK Q D CLK Q AD0 AD1 AD2 AD3 D0 D1 D2 D3 A0 A1 A2 A3
  112. 112. 114114 MEMORY INTERFACING External ROM Interfacing :- MCS 51 ALE EXT ROM Instr Address PSEN CE ALE P0 P2 P1 P3 EA EEPROM
  113. 113. 117117 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface 24 Programmable I/O pins Three Configurable Ports - A,B & C BSR Mode TTL Compatible
  114. 114. 118118SKB'sSKB's 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface
  115. 115. 119119 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface
  116. 116. 120120 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface A1 A0 Select 0 0 PA 0 1 PB 1 0 PC 1 1 Control reg.
  117. 117. 121121SKB'sSKB's 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface Group B PortC (Lower) 1 = Input 0 = Output PortB 1 = Input 0 = Output Mode Selection 0 = Mode 0 1 = Mode 1 Group A PortC (Upper) 1 = Input 0 = Output PortA 1 = Input 0 = Output Mode Selection 00 = Mode 0 01 = Mode 1 1x = Mode 2 D0D0D1D1D2D2D3D3D4D4D5D5D6D6D7D7 Control Word - General BSR Mode Select 0 = BSR Mode Enabled 1 = BSR Mode Enabled
  118. 118. 122122 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface X X X Not Used Bit Select 000 = Bit 0 001 = Bit 1 010 = Bit 2 011 = Bit 3 100 = Bit 4 101 = Bit 5 110 = Bit 6 111 = Bit 7 D0D0D1D1D2D2D3D3D4D4D5D5D6D6D7D7 0 BSR Mode Selected Control Word – BSR Mode Bit Set/Reset 1 = Set 0 = Reset
  119. 119. 123123 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface Mode 0 :-
  120. 120. 124124 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface Mode 1 :-
  121. 121. 125125 82558255 Programmable Peripheral InterfaceProgrammable Peripheral Interface Mode 2 :-
  122. 122. 126126 82538253 Programmable Interval TimerProgrammable Interval Timer 3 Independent 16bit Counters DC - 2.6MHz BCD or Binary Counting Programmable Counting Modes Single Supply Operations
  123. 123. 127127 82538253 Programmable Interval TimerProgrammable Interval Timer Pin Diagram :-
  124. 124. 128128SKB'sSKB's 82538253 Programmable Interval TimerProgrammable Interval Timer Block Diagram :-
  125. 125. 129129 82538253 Programmable Interval TimerProgrammable Interval Timer System Interface :-
  126. 126. 130130 82538253 Programmable Interval TimerProgrammable Interval Timer Mode Select 000 = Mode 0 001 = Mode 1 X10 = Mode 2 X11 = Mode 3 100 = Mode 4 101 = Mode 5 BCDBCDM0M0M1M1M2M2RL0RL0RL1RL1SC0SC0SC1SC1 Select Counter 00 = Select Counter 0 01 = Select Counter 1 10 = Select Counter 2 11 = Illegal Control Word Binary / BCD 1 = BCD 0 = Binary Read / Load 00 = Counter Latching 01 = Read/Load MSB only 10 = Read/Load LSB only 11 = Read/Load LSB first then MSB
  127. 127. 131131 82538253 Programmable Interval TimerProgrammable Interval Timer Mode 0 :-
  128. 128. 132132 Mode 1 :- 82538253 Programmable Interval TimerProgrammable Interval Timer
  129. 129. 133133 Mode 2 :- 82538253 Programmable Interval TimerProgrammable Interval Timer
  130. 130. 134134 Mode 3 :- 82538253 Programmable Interval TimerProgrammable Interval Timer
  131. 131. 135135 Mode 4 :- 82538253 Programmable Interval TimerProgrammable Interval Timer
  132. 132. 136136 Mode 5 :- 82538253 Programmable Interval TimerProgrammable Interval Timer
  133. 133. 137137SKB'sSKB's 82798279 Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface Simultaneous Keyboard & Display Drive Scanned Keyboard Mode Scanned Sensor Mode 8-Character Keyboard FIFO Duel 8 / 16 Numerical Display R / L Entry 16 bit Display RAM Mode Programmable From CPU Programmable Scan Timing Interrupt Output on Key Entry
  134. 134. 138138SKB'sSKB's Pin Diagram :- 82798279 Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
  135. 135. 139139SKB'sSKB's Signal Diagram :- 82798279 Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
  136. 136. 140140SKB'sSKB's Block Diagram :- 82798279 Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
  137. 137. 141141SKB'sSKB's System Interface :- 82798279 Programmable Keyboard / Display InterfaceProgrammable Keyboard / Display Interface
  138. 138. 142142 82518251 Programmable Communication InterfaceProgrammable Communication Interface Pin Diagram :-
  139. 139. 143143 Block Diagram :- 82518251 Programmable Communication InterfaceProgrammable Communication Interface
  140. 140. 144144 System Interface :- 82518251 Programmable Communication InterfaceProgrammable Communication Interface
  141. 141. 145145 82518251 Programmable Communication InterfaceProgrammable Communication Interface Mode Instruction Format
  142. 142. 146146SKB'sSKB's 82518251 Programmable Communication InterfaceProgrammable Communication Interface Command Instruction Format
  143. 143. 148148 1) Stepper Motor Control 2) Matrix Keyboard 3) Dynamic 7 Segment Display 4) Analog to Digital converter 5) DC Motor Control 6) LCD Display 7) Serial Data Transfer
  144. 144. STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL  Stepper MotorStepper Motor  Winding DiagramWinding Diagram  SpecificationsSpecifications  Rotation / Excitation methodsRotation / Excitation methods  Clockwise / Anti Clockwise SequenceClockwise / Anti Clockwise Sequence  Single & Multi Winding ExcitationSingle & Multi Winding Excitation  Driving unit Digital & AnalogDriving unit Digital & Analog
  145. 145. STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL W1 W2 W3 W4 1 1 0 0 0 0 1 1 1 0 0 1 0 1 1 0 0 0 1 1 1 0 0 1 1 1 0 0 0 1 1 0
  146. 146. STEPPER MOTOR CONTROLSTEPPER MOTOR CONTROL
  147. 147. MATRIX KEYBOARDMATRIX KEYBOARD  General Keyboard StructureGeneral Keyboard Structure  Adv & Disadv of General KeyboardAdv & Disadv of General Keyboard  Layout of Matrix KeyboardLayout of Matrix Keyboard  Scanning and Sense LinesScanning and Sense Lines  Scan SequenceScan Sequence  Key De-bounce MethodsKey De-bounce Methods
  148. 148. MATRIX KEYBOARDMATRIX KEYBOARD 1 2 3 4 5 6 7 8 9  0 # ScanLinesSenseLines MATRIXKEYBOARDDRIVER
  149. 149. MATRIX KEYBOARDMATRIX KEYBOARD 1 2 3 4 5 6 7 8 9  0 # RL0 RL1 SL0 RL2 SL1 SL2 SL3 ScanLinesSenseLines
  150. 150. MATRIX KEYBOARDMATRIX KEYBOARD 11000000 110000 RL0RL0RL1RL1RL2RL2SL0SL0SL1SL1SL2SL2SL3SL3 001100 000011 11 22 33 00110000 110000 001100 000011 44 55 66 00001100 110000 001100 000011 77 88 99 0000000101 110000 001100 000011  00 ## 1 2 3 4 5 6 7 8 9  0 # RL0 RL1 SL0 RL2 SL1 SL2 SL3 1 2 3 4 5 6 7 8 9  0 # RL0 RL1 SL0 RL2 SL1 SL2 SL3
  151. 151. MATRIX KEYBOARDMATRIX KEYBOARD
  152. 152. MATRIX KEYBOARDMATRIX KEYBOARD
  153. 153. DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY  Seven Segment DisplaySeven Segment Display  Eight LEDsEight LEDs  Two types –Two types – Common Anode & Common CathodeCommon Anode & Common Cathode  Dynamic Seven Segment DisplayDynamic Seven Segment Display  Scan SequenceScan Sequence
  154. 154. DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY V Seven Segment Display a b c d e f g dp a b c d e f g dp Common
  155. 155. 7 SEGMENT DISPLAY7 SEGMENT DISPLAY
  156. 156. DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
  157. 157. DYNAMIC 7 SEGMENT DISPLAYDYNAMIC 7 SEGMENT DISPLAY
  158. 158. ANALOG TO DIGITAL CONVERTERANALOG TO DIGITAL CONVERTER  ADCADC  WorkingWorking  TypesTypes  ApplicationsApplications  Specifications –Specifications – No of Bits, i/p, o/p etcNo of Bits, i/p, o/p etc
  159. 159. ANALOG TO DIGITAL CONVERTERANALOG TO DIGITAL CONVERTER
  160. 160. DIGITAL TO ANALOG CONVERTERDIGITAL TO ANALOG CONVERTER
  161. 161. DC MOTOR CONTROLDC MOTOR CONTROL  DC MotorDC Motor  Speed Control MethodsSpeed Control Methods  Advantage of PWM MethodAdvantage of PWM Method  Driving CircuitDriving Circuit
  162. 162. DC MOTOR CONTROLDC MOTOR CONTROL
  163. 163. LCD DISPLAYLCD DISPLAY  Principle of LCDPrinciple of LCD  16x2 LCD16x2 LCD  LCD Module –LCD Module – Driver & ScreenDriver & Screen  RAMRAM  Character MoldingCharacter Molding  Display Type –Display Type – Cursor, L/R Entry etcCursor, L/R Entry etc
  164. 164. LCD DISPLAYLCD DISPLAY
  165. 165. LCD DISPLAYLCD DISPLAY
  166. 166. LCD DISPLAYLCD DISPLAY
  167. 167. 172172SKB'sSKB's Pin number Symbol Level I/O Function 1 Vss - - Power supply (GND) 2 Vcc - - Power supply (+5V) 3 Vee - - Contrast adjust 4 RS 0/1 I 0 = Instruction input, 1 = Data input 5 R/W 0/1 I 0 = Write to LCD module, 1 = Read from LCD module 6 E 1, 1->0 I Enable signal 7 DB0 0/1 I/O Data bus line 0 (LSB) 8 DB1 0/1 I/O Data bus line 1 9 DB2 0/1 I/O Data bus line 2 10 DB3 0/1 I/O Data bus line 3 11 DB4 0/1 I/O Data bus line 4 12 DB5 0/1 I/O Data bus line 5 13 DB6 0/1 I/O Data bus line 6 14 DB7 0/1 I/O Data bus line 7 (MSB)
  168. 168. 173173SKB'sSKB's Instruction Code Description Executi on time RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Clear display 0 0 0 0 0 0 0 0 0 1 Clears display and returns cursor to the home position (address 0). 1.64mS Cursor home 0 0 0 0 0 0 0 0 1 * Returns cursor to home position (address 0). Also returns display being shifted to the original position. DDRAM contents remains unchanged. 1.64mS Entry mode set 0 0 0 0 0 0 0 1 I/D S Sets cursor move direction (I/D), specifies to shift the display (S). These operations are performed during data read/write. 40uS Display On/Off control 0 0 0 0 0 0 1 D C B Sets On/Off of all display (D), cursor On/Off (C) and blink of cursor position character (B). 40uS Cursor/disp lay shift 0 0 0 0 0 1 S/C R/L * * Sets cursor-move or display-shift (S/C), shift direction (R/L). DDRAM contents remains unchanged. 40uS Function set 0 0 0 0 1 DL N F * * Sets interface data length (DL), number of display line (N) and character font(F). 40uS Set CGRAM address 0 0 0 1 CGRAM address Sets the CGRAM address. CGRAM data is sent and received after this setting. 40uS Set DDRAM address 0 0 1 DDRAM address Sets the DDRAM address. DDRAM data is sent and received after this setting. 40uS Read busy- flag and address counter 0 1 BF CGRAM / DDRAM address Reads Busy-flag (BF) indicating internal operation is being performed and reads CGRAM or DDRAM address counter contents (depending on previous instruction). 0uS Write to CGRAM or DDRAM 1 0 write data Writes data to CGRAM or DDRAM. 40uS Read from CGRAM or DDRAM 1 1 read data Reads data from CGRAM or DDRAM. 40uS

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