This document summarizes a research paper presented at the International Conference on Emerging Trends in Engineering and Management in 2014. The paper proposes a stand-alone regulated single phase five level inverter with a coupled inductor. It includes a high step-up DC-DC converter as a front-end stage to stabilize the output voltage from a variable DC source. The converter uses a coupled inductor to attain high voltage gain. The inverter can produce a five level AC output without variation in amplitude. The operation of the DC-DC converter and inverter are explained. Simulation and experimental results demonstrate the circuit can provide a constant output voltage waveform from different DC input voltages.
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Multilevel inverters with coupled inductors need only one source besides split capacitors are not required. For
the inverter with coupled inductor, a three limb coupled inductor is the most desirable one, however coupled inductor
with high inductance value is not preferred [10]. The analysis of the coupled-inductor designs in [11] suggests that
reducing the target inductance of the coupled inductor could improve the overall balance of losses in the coupled
inductor, with only a minor increase in ripple current. The number of voltage levels can be increased by using a split-
wound coupled inductor within each inverter-leg and using interleaved pwm switching of the upper and lower switches
[12]. The reference [15] proposed a circuit which increase the output current, while the switched current through the HF
power devices is reduced. The coupled inductor provides excellent protection against dc-rail shoot-through conditions.
The paper is organized as follows. In Section 2 the operation principles of converter and inverter are explained.
In Section 3 simulation and their results are presented. Finally, experimental results and conclusions are given in Section
4 and Section 5.
2. BASIC OPERATIONAL PRINCIPLES
The circuit used in this paper can synthesis a constant amplitude five level AC voltage from a varying DC
source. The basic block diagram is given in the Fig. 1.
This topology configuration consists of a high step-up DC-DC converter and a simplified multilevel inverter. By
using the independent voltage regulation control of the high step-up converter, the output of the inverter can be made a
constant amplitude five level AC voltage. The Fig. 2 is the overall circuit diagram. The operation mechanism of DC-DC
converter and the inverter is discussed separately.
Fig. 1: Overall System Block Diagram
Fig. 2: Main circuit diagram
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2.1 HIGH STEP-UP DC-DC CONVERTER
In this paper, a high step-up converter is used as a front
output DC voltage of various DERs such as photovoltaic and fuel cell modules for use with
Fig. 3: Circuit diagram of the DC
The circuit diagram of the high step
coupled inductor, three diodes, and three capacitors. The converter combines boost, flyback and charge
to attain high voltage gain. The coupled inductor is
turns ratio of NS:NP , primary leakage inductor L
Five modes of operations are there for this circuit. The
waveform vgs is the gating signal of the active switch S; i
the primary leakage inductor; iLm is the current of the magnetizing inductor L
leakage inductor; the vds is the drain-to-source voltage of the active switch S; the v
Cc; the vDo is the voltage of the output diode D
the voltage waveform of the magnetizing inductor L
Fig. 4: Key waveform of high step up converter [17].
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DC CONVERTER
up converter is used as a front-end stage to boost the DC voltage and to stabilize the
output DC voltage of various DERs such as photovoltaic and fuel cell modules for use with the multilevel inverter.
Fig. 3: Circuit diagram of the DC-DC converter
The circuit diagram of the high step-up converter is given in the Fig. 3. It consists of one power MOSFET, one
coupled inductor, three diodes, and three capacitors. The converter combines boost, flyback and charge
n. The coupled inductor is modelled as a magnetizing inductor Lm, an ideal transformer with a
, primary leakage inductor LLk1 and secondary leakage inductor LLk2.
Five modes of operations are there for this circuit. The key wave form is given in the Fig. 4. The voltage
is the gating signal of the active switch S; iCc is the current of the clamp capacitor C
is the current of the magnetizing inductor Lm; the iLK2 is the current of the secondary
source voltage of the active switch S; the vCc is the voltage of the clamp capacitor
is the voltage of the output diode Do; the vCpump is the voltage of the charge pump capacitor C
the voltage waveform of the magnetizing inductor Lm.
Fig. 4: Key waveform of high step up converter [17].
International Conference on Emerging Trends in Engineering and Management (ICETEM14)
, December, 2014, Ernakulam, India
end stage to boost the DC voltage and to stabilize the
the multilevel inverter.
up converter is given in the Fig. 3. It consists of one power MOSFET, one
coupled inductor, three diodes, and three capacitors. The converter combines boost, flyback and charge-pump topologies
, an ideal transformer with a
form is given in the Fig. 4. The voltage
is the current of the clamp capacitor Cc; iLK1 is the current of
is the current of the secondary
is the voltage of the clamp capacitor
p capacitor Cpump; the vLm is
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2.1.1 MODE-1 (t0 < t <t1)
In this mode MOSFET is turned ON.
increases on primary side. The energy is stored in the primary winding. The output diode D
2.1.2 MODE-2 (t1 < t <t2)
In mode-2, the MOSFET is turned OFF. Two paths are created to complete the circuit: throgh C
Cpump. The primary leakage current decreases. The secondary current increases. The energy in the leakage inductance of
the primary side is recycled. In this mode output diode D
2.1.3 MODE-3 (t2 < t <t3)
In this mode the Cc completely charged and thus D
windings are in series. The primary current
energy of the source, pump capacitor and the coupled inductor is given as the output.
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In this mode MOSFET is turned ON. Voltage is applied to the transformer primary side.The leakage current
increases on primary side. The energy is stored in the primary winding. The output diode Do is turned OFF.
Fig. 5: Mode 1
2, the MOSFET is turned OFF. Two paths are created to complete the circuit: throgh C
. The primary leakage current decreases. The secondary current increases. The energy in the leakage inductance of
In this mode output diode Do is ON and pump diode Dpump is OFF.
Fig. 6: Mode 2
completely charged and thus Dc turned OFF. Therefore Cpump
windings are in series. The primary current is continuous and is decreasing. In this mode, diode D
energy of the source, pump capacitor and the coupled inductor is given as the output.
Fig. 7: Mode 3
International Conference on Emerging Trends in Engineering and Management (ICETEM14)
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Voltage is applied to the transformer primary side.The leakage current
is turned OFF.
2, the MOSFET is turned OFF. Two paths are created to complete the circuit: throgh CC and through
. The primary leakage current decreases. The secondary current increases. The energy in the leakage inductance of
is OFF.
pump, primary and secondary
and is decreasing. In this mode, diode Do is in ON state and the
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2.1.4 MODE-4 (t3 < t <t4)
In this mode the MOSFET is turned ON. It creates a new path for Cc to discharge: through the Cpump. Primary
leakage current increases and the secondary current decreases. The output diode Do is ON.
Fig. 8: Mode 4
2.1.5 MODE-5 (t4 < t <t5)
In this mode MOFET remains ON. The secondary current decreases to zero, output diode turns off. Cc continues
the discharging through the pump diode and Cpump. The primary current iLk1 increases. At t5, voltage of Cpump equals
voltage of Cc, and the state returns to initial condition.
Fig. 9: Mode 5
According to the voltage seconds balance condition of the magnetizing inductor; the voltage of the primary winding can
be derived a
vpri = vin
ଵି
(1)
where Vin represents the low voltage dc energy input and the voltage of the secondary winding is
vsec = vpri
ே௦
ே
= vin
ଵି
ே௦
ே
(2)
Similar to that of the boost converter, the voltage of the chargepump capacitor Cpump and clamp capacitor Cc can be
expressed as
vcp = vcc = vin
ଵି
(3)
Simplified voltage loop when output diode is on is given by the below figure.
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Fig. 10: DC
Hence, the voltage conversion ratio of the high step
inv
v0 = (2 +
2.2 FIVE LEVEL INVERTER
Fig
Fig. 11 shows the circuit of the single-phase five level inverter. 2E is the dc
inductors. The mutual inductance of the two inductors is M and the output terminals of this inverter are 1 and 2.
2.2.1 SWITCHING STATES FOR FIVE LEVEL OUTPUT VOLTAGE
The power switches in one arm are assumed to switch
switch S2 must made OFF and vice versa. Similarly in case of S
given in the below table.
TABLE I: Switching states for five
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Fig. 10: DC-DC converter when D0 is ON
ratio of the high step-up converter, named input voltage to bus voltage ratio is
+
p
s
N
N D) / (1-D) (4)
Fig. 11: Single-Phase Five-Level Inverter
phase five level inverter. 2E is the dc-link voltage and L
inductors. The mutual inductance of the two inductors is M and the output terminals of this inverter are 1 and 2.
SWITCHING STATES FOR FIVE LEVEL OUTPUT VOLTAGE
The power switches in one arm are assumed to switch complementarily. For an instant switch S
must made OFF and vice versa. Similarly in case of S3, S4 and S5, S6. The details of the switching state is
TABLE I: Switching states for five-level output voltage
S1 S3 S5 u12
1 0 0 +2E
1 0 1 +E
1 1 0 +E
1 1 1 0
0 0 0 0
0 0 1 -E
0 1 0 -E
0 1 1 -2E
International Conference on Emerging Trends in Engineering and Management (ICETEM14)
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up converter, named input voltage to bus voltage ratio is
link voltage and L1 and L2 are the coupled
inductors. The mutual inductance of the two inductors is M and the output terminals of this inverter are 1 and 2.
complementarily. For an instant switch S1 is ON then the
, S6. The details of the switching state is
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The number “1” is used to denote the ON state of one switch and “0” will be used to denote the OFF state.
There are mainly four switching states in this inverter circuit. In each case one of the upper switches or a combination of
the upper switches is made ON and similarly on the bottom switches. The assumption taken for explaining the cases are
the inductance L1, L2 of the coupled inductor are equal and the leakage inductance, Lk is zero.
2.2.1.1 Case-1 (+2E): In this case, the required output voltage level is +2E. To achieve this upper switch S1 is turned ON
along with the lower switches S4 and S6 are turned ON. The equivalent circuit becomes Fig. 12
Fig. 12: Equivalent circuit of case1
The inductors are parallel and opposing. So the net or equivalent inductance is
MLL
MLL
221
2
21
++ (5)
The inductance of the coupled inductor can be expressed as the sum of mutual inductance and the leakage
inductance. By considering the assumption it can be stated as L1 = L2 = (mutual inductance + leakage inductance) = M +
Lk. By substituting this in the above equation, the net equivalent inductance become
2
kL
(6)
So the net equivalent circuit become Fig. 13.
Fig. 13: Net equivalent circuit of case1
The leakage inductance, Lk is assumed to be zero. So +2E voltage across the load.
2.2.1.1 Case-2 (+E): In this case, the required output voltage level is +E. To achieve this there are two options. Option-1
with upper switches S1, S5 are turned ON along with lower switch S4 is turned ON. Option-2 with upper switch S1, S3 are
turned ON along with lower switch S6 is turned ON. The equivalent circuit becomes Fig. 14.
Fig. 14: Equivalent circuit of case2
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Now apply Thevenin theorem. Thevenin voltage is given by the Fig. 16. The inductors share the applied voltage
equally. So voltage across L2 is +E. Thevenin impedance is given by the Fig. 17. Inductors are parallel and opposing. So
the net inductance is given by
2
kL
(7)
Fig. 15: Load is removed from the equivalent circuit of case-2
Fig. 16: Thevenin voltage of case-2 Fig. 17: Thevenin impedance of case-2
Fig. 18: Thevenin equivalent circuit of case-2
The Thevenin circuit is given by the Fig. 8. The leakage inductance, Lk is assumed to be zero. So +E voltage
across the load.
2.2.1.1 Case-3 (-E): In this case, the required output voltage level is -E. To achieve this there are two options. Option-1
with upper switch S5 turned ON along with lower switches S2, S4 are turned ON. Option-2 with upper switch S3 turned
ON and lower switches S2, S6 are turned ON. The equivalent circuit becomes Fig. 19. By applying Thevenin theorem as
in the previous case, the Thevenin equivalent circuit is given as Fig. 20.
Fig. 19: Equivalent circuit of case3
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Fig.
The leakage inductance, Lk is assumed to be zero. So
2.2.1.1 Case-4 (-2E): In this case, the required output voltage level is 2E. To achieve this, upper switches S
turned ON along with the lower switch S
The inductors are parallel and opposing. So the net or equivalent inductance is
L
As in case-1, by considering the assumption it can be stated as L
inductance) = M + Lk. By substituting this in the above equation, the net equivalent inductance become
So the net equivalent circuit become Fig.
load as the load is connected from 2 to 1.
Fig
2.2.2 PLUSE WIDTH MODULATION
By proper modulation the existence of the DC component in the output voltage can be reduced. The DC
components in the output voltage result
the size and weight of the coupled inductor can be reduced.
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Fig. 20: Thevenin Equivalent Circuit of Case-3
is assumed to be zero. So -E voltage across the load as the load is connected from 2 to 1.
In this case, the required output voltage level is 2E. To achieve this, upper switches S
the lower switch S2 is turned ON. The equivalent circuit becomes Fig. 2
Fig. 21: Equivalent circuit of case4
The inductors are parallel and opposing. So the net or equivalent inductance is
MLL
MLL
221
2
21
++ (8)
1, by considering the assumption it can be stated as L1 = L2 = (mutual inductance + leakage
. By substituting this in the above equation, the net equivalent inductance become
2
kL
(9)
So the net equivalent circuit become Fig. 22 The leakage inductance, Lk is assumed to be zero. So
load as the load is connected from 2 to 1.
Fig. 22: Net Equivalent Circuit of Case4
PLUSE WIDTH MODULATION
By proper modulation the existence of the DC component in the output voltage can be reduced. The DC
components in the output voltage result in large current, which may result in the failure of the inverter. By modulation
the size and weight of the coupled inductor can be reduced.
International Conference on Emerging Trends in Engineering and Management (ICETEM14)
, December, 2014, Ernakulam, India
E voltage across the load as the load is connected from 2 to 1.
In this case, the required output voltage level is 2E. To achieve this, upper switches S3, S5 are
21.
= (mutual inductance + leakage
. By substituting this in the above equation, the net equivalent inductance become
is assumed to be zero. So -2E voltage across the
By proper modulation the existence of the DC component in the output voltage can be reduced. The DC
in large current, which may result in the failure of the inverter. By modulation
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3. SIMULATION RESULTS
To verify the validity of the paper, the circuit in this paper is simulated using MATLAB /Simulink tool. DC-DC
converter is combined with the inverter to provide a five level AC output voltage even if the input DC voltage varies.
Simulation is done with 18V DC and 12V DC inputs.
Fig. 23: Simulation of main circuit at 18V DC input
Fig. 24: Simulation result of main circuit at 18V DC
input
Fig. 25: Simulation result of main circuit at 12V DC
input
From above figures, it can be concluded that the the main circuit provided in the thesis provides a five level 70V
AC voltage even if the input DC voltage varies.
4. EXPERIMENTAL RESULTS
The inverter section and high step up converter section fabricated separately and are cascaded. Each section
consists of three parts; control circuit, drive circuit and power circuit. In the control circuit, to produce pulse width
modulated gate signal, PIC18F4550 is used. FAN7392 is used to drive the MOSFET. In the power circuit of converter,
polyester capacitor of 0.6mF is used as the pump capacitor. The switch used in the converter section is IRF830. The
coupled inductor wound over an “E” core with ten turns on one side and with thirty turns on other side is used. In
addition to this a small inductor is introduced to reduce the inrush current of the charge pump current loop. In the power
circuit of inverter, six numbers of IRF830 (MOSFET) is used to switch the coupled inductor. The coupled inductor is
wound over the ferrite “E” core with 22 SWG copper wire with mutual inductance of 1mH. The output is taken across
the load of 470 and 1.1mH.
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The input given to the prototype is 12V DC. This input is boosted to 70V by the DC-DC converter. The inverter
converts the 70V DC to five level AC with a peak of 70V. The input is varied to 18V. With the help of feedback loop, the
inverter can maintain the same 70V in the out. This shows that the DC-DC converter can give a regulated output of 70V.
The inverter converts this regulated output into AC waveform. The Fig 26 and Fig 28 shows the input voltages given to
the prototype. The Fig 27 and Fig 29 shows the output voltages respectively. In both case, the output is around 70V.
Fig. 26: Hardware-18V DC input Fig. 27: Hardware-70V five level AC output when
18V DC is given as input
Fig. 28: Hardware-12V DC input Fig. 29: Hardware-70V Five level AC output when 12V
DC is given as input
In the Fig 27 displays a max voltage of 80V. By analysing the figure (by considering the voltage scale) it is clear
that the output voltage is constant at 70V. DSO displays the max voltage as 80V due to the ripple.
4. CONCLUSION
Simulated and fabricated a circuit for the regulated five level inverter. The input to this inverter is a low voltage
DC and a boosted, regulated AC is the output. This circuit can be used for converting the low voltages from PV panels or
from fuel cells to a boosted AC voltage, capable of using in micro grid system. It has the following features: By proper
switching technique, the no-load current drawn by the coupled inductor can be made negligible. This inverter can give a
five level AC output from a single source. This circuit is suitable for the PV system and fuel cell system if the input
voltage change in wide range. This circuit can deliver a premium power to the loads.
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Fig. 30: Hardware- DC-DC converter section Fig. 31: Hardware- Inverter section
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AUTHORS DETAILS
JOHN NINAN was born in Kerala. He received the B. Tech degree in Electrical and Electronics
Engineering from Mar Baselios Christian College of Engineering and Technology affiliated to
Mahatma Gandhi University, Kerala in 2007. He is currently pursuing his M. Tech Degree in
Power Electronics from Vidya Academy of Science and Technology, Thrissur, Kerala.
JASNA S.B was born in Kerala. She received M. Tech Degree in Applied Electronics. She is
currently Assistant Professor in the Department of Electrical and Electronics Engineering, Vidya
Academy of Science and Technology, Thrissur, India, where she has been a faculty member since
July 2007. She published a paper; An intelligent mobile robot navigation system using RF ID
technique with real time updation. Her interested areas are game theory, robotics etc
VIDHYA KG was born in Kerala. She received B.Tech degree in Electrical and Electronics
Engineering from Govt .Rajiv Gandhi Institute of Technology, Kottayam, Kerala in 2008.She
worked at MG UCE, Kerala from 2009-2012. She is currently pursuing her M. Tech Degree in
Power Electronics from Vidya Academy of Science and Technology, Thrissur, Kerala.